Lines Matching +full:0 +full:x1e6e2000
18 sendack = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x9b, 0xff); in send_ack()
19 sendack |= 0x80; in send_ack()
20 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x9b, 0x00, sendack); in send_ack()
26 sendack = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x9b, 0xff); in send_nack()
27 sendack &= ~0x80; in send_nack()
28 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x9b, 0x00, sendack); in send_nack()
34 u32 retry = 0; in wait_ack()
36 waitack = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd2, 0xff); in wait_ack()
37 waitack &= 0x80; in wait_ack()
50 u32 retry = 0; in wait_nack()
52 waitack = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd2, 0xff); in wait_nack()
53 waitack &= 0x80; in wait_nack()
65 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x9b, ~0x40, 0x40); in set_cmd_trigger()
70 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x9b, ~0x40, 0x00); in clear_cmd_trigger()
73 #if 0
77 u32 retry = 0;
79 waitready = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd2, 0xff);
80 waitready &= 0x40;
94 int retry = 0; in ast_write_cmd()
97 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x9a, 0x00, data); in ast_write_cmd()
119 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x9a, 0x00, data); in ast_write_data()
130 #if 0
136 *data = 0;
140 tmp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd3, 0xff);
153 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x9a, 0x00, 0x00);
159 ast_write_cmd(dev, 0x40); in ast_set_dp501_video_output()
167 return ast_mindwm(ast, 0x1e6e2104) & 0x7fffffff; in get_fw_base()
176 data = ast_mindwm(ast, 0x1e6e2100) & 0x01; in ast_backup_fw()
179 for (i = 0; i < size; i += 4) in ast_backup_fw()
189 u32 i, data, len = 0; in ast_launch_m68k()
194 data = ast_mindwm(ast, 0x1e6e2100) & 0x01; in ast_launch_m68k()
202 ast_load_dp501_microcode(dev) < 0) in ast_launch_m68k()
209 ast_moutdwm(ast, 0x1e6e2000, 0x1688a8a8); in ast_launch_m68k()
210 data = ast_mindwm(ast, 0x1e6e0004); in ast_launch_m68k()
211 switch (data & 0x03) { in ast_launch_m68k()
212 case 0: in ast_launch_m68k()
213 boot_address = 0x44000000; in ast_launch_m68k()
217 boot_address = 0x48000000; in ast_launch_m68k()
220 boot_address = 0x50000000; in ast_launch_m68k()
223 boot_address = 0x60000000; in ast_launch_m68k()
226 boot_address -= 0x200000; /* -2MB */ in ast_launch_m68k()
229 for (i = 0; i < len; i += 4) { in ast_launch_m68k()
235 ast_moutdwm(ast, 0x1e6e2000, 0x1688a8a8); in ast_launch_m68k()
238 ast_moutdwm(ast, 0x1e6e2104, 0x80000000 + boot_address); in ast_launch_m68k()
239 ast_moutdwm(ast, 0x1e6e2100, 1); in ast_launch_m68k()
242 data = ast_mindwm(ast, 0x1e6e2040) & 0xfffff1ff; /* D[11:9] = 100b: UEFI handling */ in ast_launch_m68k()
243 data |= 0x800; in ast_launch_m68k()
244 ast_moutdwm(ast, 0x1e6e2040, data); in ast_launch_m68k()
246 …jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x99, 0xfc); /* D[1:0]: Reserved Video Buffer… in ast_launch_m68k()
247 jreg |= 0x02; in ast_launch_m68k()
248 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x99, jreg); in ast_launch_m68k()
257 u8 linkcap[4], linkrate, linklanes, maxclk = 0xff; in ast_get_dp501_max_clk()
262 offset = 0xf000; in ast_get_dp501_max_clk()
264 if ((data & 0xf0) != 0x10) /* version: 1x */ in ast_get_dp501_max_clk()
268 offset = 0xf014; in ast_get_dp501_max_clk()
270 if (linkcap[2] == 0) { in ast_get_dp501_max_clk()
271 linkrate = linkcap[0]; in ast_get_dp501_max_clk()
273 data = (linkrate == 0x0a) ? (90 * linklanes) : (54 * linklanes); in ast_get_dp501_max_clk()
274 if (data > 0xff) in ast_get_dp501_max_clk()
275 data = 0xff; in ast_get_dp501_max_clk()
289 offset = 0xf000; in ast_dp501_read_edid()
291 if ((data & 0xf0) != 0x10) in ast_dp501_read_edid()
295 offset = 0xf010; in ast_dp501_read_edid()
297 if (!(data & 0x01)) in ast_dp501_read_edid()
301 offset = 0xf020; in ast_dp501_read_edid()
302 for (i = 0; i < 128; i += 4) { in ast_dp501_read_edid()
315 ast_write32(ast, 0xf004, 0x1e6e0000); in ast_init_dvo()
316 ast_write32(ast, 0xf000, 0x1); in ast_init_dvo()
317 ast_write32(ast, 0x12000, 0x1688a8a8); in ast_init_dvo()
319 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); in ast_init_dvo()
320 if (!(jreg & 0x80)) { in ast_init_dvo()
322 data = ast_read32(ast, 0x12008); in ast_init_dvo()
324 data &= 0xfffff8ff; in ast_init_dvo()
325 data |= 0x00000500; in ast_init_dvo()
326 ast_write32(ast, 0x12008, data); in ast_init_dvo()
329 data = ast_read32(ast, 0x12084); in ast_init_dvo()
331 data |= 0xfffe0000; in ast_init_dvo()
332 ast_write32(ast, 0x12084, data); in ast_init_dvo()
334 data = ast_read32(ast, 0x12088); in ast_init_dvo()
336 data |= 0x000fffff; in ast_init_dvo()
337 ast_write32(ast, 0x12088, data); in ast_init_dvo()
339 data = ast_read32(ast, 0x12090); in ast_init_dvo()
341 data &= 0xffffffcf; in ast_init_dvo()
342 data |= 0x00000020; in ast_init_dvo()
343 ast_write32(ast, 0x12090, data); in ast_init_dvo()
345 data = ast_read32(ast, 0x12088); in ast_init_dvo()
347 data |= 0x30000000; in ast_init_dvo()
348 ast_write32(ast, 0x12088, data); in ast_init_dvo()
350 data = ast_read32(ast, 0x1208c); in ast_init_dvo()
352 data |= 0x000000cf; in ast_init_dvo()
353 ast_write32(ast, 0x1208c, data); in ast_init_dvo()
355 data = ast_read32(ast, 0x120a4); in ast_init_dvo()
357 data |= 0xffff0000; in ast_init_dvo()
358 ast_write32(ast, 0x120a4, data); in ast_init_dvo()
360 data = ast_read32(ast, 0x120a8); in ast_init_dvo()
362 data |= 0x0000000f; in ast_init_dvo()
363 ast_write32(ast, 0x120a8, data); in ast_init_dvo()
365 data = ast_read32(ast, 0x12094); in ast_init_dvo()
367 data |= 0x00000002; in ast_init_dvo()
368 ast_write32(ast, 0x12094, data); in ast_init_dvo()
373 data = ast_read32(ast, 0x1202c); in ast_init_dvo()
374 data &= 0xfffbffff; in ast_init_dvo()
375 ast_write32(ast, 0x1202c, data); in ast_init_dvo()
378 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xcf, 0x80); in ast_init_dvo()
393 ast_write32(ast, 0xf004, 0x1e6e0000); in ast_init_analog()
394 ast_write32(ast, 0xf000, 0x1); in ast_init_analog()
397 ast_write32(ast, 0x12000, 0x1688a8a8); in ast_init_analog()
398 ast_write32(ast, 0x12000, 0x1688a8a8); in ast_init_analog()
399 ast_write32(ast, 0x12000, 0x1688a8a8); in ast_init_analog()
402 data = ast_read32(ast, 0x1202c); in ast_init_analog()
403 data &= 0xfffcffff; in ast_init_analog()
404 ast_write32(ast, 0, data); in ast_init_analog()
407 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xcf, 0x00); in ast_init_analog()
416 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); in ast_init_3rdtx()
417 switch (jreg & 0x0e) { in ast_init_3rdtx()
418 case 0x04: in ast_init_3rdtx()
421 case 0x08: in ast_init_3rdtx()
424 case 0x0c: in ast_init_3rdtx()