35 	const struct drm_i915_mocs_entry *table;  member
167  * @table:      Output table that will be made to point at appropriate
170  * This function will return the values of the MOCS table that needs to
177 			      struct drm_i915_mocs_table *table)  in get_mocs_settings()  argument
183 		table->size  = ARRAY_SIZE(skylake_mocs_table);  in get_mocs_settings()
184 		table->table = skylake_mocs_table;  in get_mocs_settings()
187 		table->size  = ARRAY_SIZE(broxton_mocs_table);  in get_mocs_settings()
188 		table->table = broxton_mocs_table;  in get_mocs_settings()
192 			  "Platform that should have a MOCS table does not.\n");  in get_mocs_settings()
199 		for (i = 0; i < table->size; i++)  in get_mocs_settings()
200 			if (WARN_ON(table->table[i].l3cc_value &  in get_mocs_settings()
230  * intel_mocs_init_engine() - emit the mocs control table
234  * given table starting at the given address.
241 	struct drm_i915_mocs_table table;  in intel_mocs_init_engine()  local
244 	if (!get_mocs_settings(dev_priv, &table))  in intel_mocs_init_engine()
247 	if (WARN_ON(table.size > GEN9_NUM_MOCS_ENTRIES))  in intel_mocs_init_engine()
250 	for (index = 0; index < table.size; index++)  in intel_mocs_init_engine()
252 			   table.table[index].control_value);  in intel_mocs_init_engine()
259 	 * Entry 0 in the table is uncached - so we are just writing  in intel_mocs_init_engine()
264 			   table.table[0].control_value);  in intel_mocs_init_engine()
270  * emit_mocs_control_table() - emit the mocs control table
271  * @rq:	Request to set up the MOCS table for.
272  * @table:	The values to program into the control regs.
275  * given table starting at the given address.
280 				   const struct drm_i915_mocs_table *table)  in emit_mocs_control_table()  argument
286 	if (WARN_ON(table->size > GEN9_NUM_MOCS_ENTRIES))  in emit_mocs_control_table()
295 	for (index = 0; index < table->size; index++) {  in emit_mocs_control_table()
297 		*cs++ = table->table[index].control_value;  in emit_mocs_control_table()
305 	 * Entry 0 in the table is uncached - so we are just writing  in emit_mocs_control_table()
310 		*cs++ = table->table[0].control_value;  in emit_mocs_control_table()
319 static inline u32 l3cc_combine(const struct drm_i915_mocs_table *table,  in l3cc_combine()  argument
323 	return table->table[low].l3cc_value |  in l3cc_combine()
324 	       table->table[high].l3cc_value << 16;  in l3cc_combine()
328  * emit_mocs_l3cc_table() - emit the mocs control table
329  * @rq:	Request to set up the MOCS table for.
330  * @table:	The values to program into the control regs.
333  * given table starting at the given address. This register set is
339 				const struct drm_i915_mocs_table *table)  in emit_mocs_l3cc_table()  argument
344 	if (WARN_ON(table->size > GEN9_NUM_MOCS_ENTRIES))  in emit_mocs_l3cc_table()
353 	for (i = 0; i < table->size/2; i++) {  in emit_mocs_l3cc_table()
355 		*cs++ = l3cc_combine(table, 2 * i, 2 * i + 1);  in emit_mocs_l3cc_table()
358 	if (table->size & 0x01) {  in emit_mocs_l3cc_table()
359 		/* Odd table size - 1 left over */  in emit_mocs_l3cc_table()
361 		*cs++ = l3cc_combine(table, 2 * i, 0);  in emit_mocs_l3cc_table()
366 	 * Now set the rest of the table to uncached - use entry 0 as  in emit_mocs_l3cc_table()
372 		*cs++ = l3cc_combine(table, 0, 0);  in emit_mocs_l3cc_table()
382  * intel_mocs_init_l3cc_table() - program the mocs control table
385  * This function simply programs the mocs registers for the given table
397 	struct drm_i915_mocs_table table;  in intel_mocs_init_l3cc_table()  local
400 	if (!get_mocs_settings(dev_priv, &table))  in intel_mocs_init_l3cc_table()
403 	for (i = 0; i < table.size/2; i++)  in intel_mocs_init_l3cc_table()
404 		I915_WRITE(GEN9_LNCFCMOCS(i), l3cc_combine(&table, 2*i, 2*i+1));  in intel_mocs_init_l3cc_table()
406 	/* Odd table size - 1 left over */  in intel_mocs_init_l3cc_table()
407 	if (table.size & 0x01) {  in intel_mocs_init_l3cc_table()
408 		I915_WRITE(GEN9_LNCFCMOCS(i), l3cc_combine(&table, 2*i, 0));  in intel_mocs_init_l3cc_table()
413 	 * Now set the rest of the table to uncached - use entry 0 as  in intel_mocs_init_l3cc_table()
418 		I915_WRITE(GEN9_LNCFCMOCS(i), l3cc_combine(&table, 0, 0));  in intel_mocs_init_l3cc_table()