Lines Matching +full:vga +full:- +full:connector
2 * i.MX drm driver - Television Encoder (TVEv2)
17 #include <linux/clk-provider.h>
29 #include <video/imx-ipu-v3.h>
31 #include "imx-drm.h"
109 struct drm_connector connector; member
129 return container_of(c, struct imx_tve, connector); in con_to_tve()
138 __acquires(&tve->lock) in tve_lock()
142 spin_lock(&tve->lock); in tve_lock()
146 __releases(&tve->lock) in tve_unlock()
150 spin_unlock(&tve->lock); in tve_unlock()
155 if (!tve->enabled) { in tve_enable()
156 tve->enabled = true; in tve_enable()
157 clk_prepare_enable(tve->clk); in tve_enable()
158 regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, in tve_enable()
163 regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff); in tve_enable()
165 /* cable detection irq disabled in VGA mode, enabled in TVOUT mode */ in tve_enable()
166 if (tve->mode == TVE_MODE_VGA) in tve_enable()
167 regmap_write(tve->regmap, TVE_INT_CONT_REG, 0); in tve_enable()
169 regmap_write(tve->regmap, TVE_INT_CONT_REG, in tve_enable()
177 if (tve->enabled) { in tve_disable()
178 tve->enabled = false; in tve_disable()
179 regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, TVE_EN, 0); in tve_disable()
180 clk_disable_unprepare(tve->clk); in tve_disable()
186 return -ENOTSUPP; in tve_setup_tvout()
195 /* set gain to (1 + 10/128) to provide 0.7V peak-to-peak amplitude */ in tve_setup_vga()
196 ret = regmap_update_bits(tve->regmap, TVE_TVDAC0_CONT_REG, in tve_setup_vga()
201 ret = regmap_update_bits(tve->regmap, TVE_TVDAC1_CONT_REG, in tve_setup_vga()
206 ret = regmap_update_bits(tve->regmap, TVE_TVDAC2_CONT_REG, in tve_setup_vga()
218 ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, mask, val); in tve_setup_vga()
223 return regmap_update_bits(tve->regmap, TVE_TST_MODE_REG, in tve_setup_vga()
227 static int imx_tve_connector_get_modes(struct drm_connector *connector) in imx_tve_connector_get_modes() argument
229 struct imx_tve *tve = con_to_tve(connector); in imx_tve_connector_get_modes()
233 if (!tve->ddc) in imx_tve_connector_get_modes()
236 edid = drm_get_edid(connector, tve->ddc); in imx_tve_connector_get_modes()
238 drm_connector_update_edid_property(connector, edid); in imx_tve_connector_get_modes()
239 ret = drm_add_edid_modes(connector, edid); in imx_tve_connector_get_modes()
246 static int imx_tve_connector_mode_valid(struct drm_connector *connector, in imx_tve_connector_mode_valid() argument
249 struct imx_tve *tve = con_to_tve(connector); in imx_tve_connector_mode_valid()
253 rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000; in imx_tve_connector_mode_valid()
254 if (rate == mode->clock) in imx_tve_connector_mode_valid()
258 rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000; in imx_tve_connector_mode_valid()
259 if (rate == mode->clock) in imx_tve_connector_mode_valid()
262 dev_warn(tve->dev, "ignoring mode %dx%d\n", in imx_tve_connector_mode_valid()
263 mode->hdisplay, mode->vdisplay); in imx_tve_connector_mode_valid()
269 struct drm_connector *connector) in imx_tve_connector_best_encoder() argument
271 struct imx_tve *tve = con_to_tve(connector); in imx_tve_connector_best_encoder()
273 return &tve->encoder; in imx_tve_connector_best_encoder()
288 * we should try 4k * mode->clock first, in imx_tve_encoder_mode_set()
291 rate = 2000UL * mode->clock; in imx_tve_encoder_mode_set()
292 clk_set_rate(tve->clk, rate); in imx_tve_encoder_mode_set()
293 rounded_rate = clk_get_rate(tve->clk); in imx_tve_encoder_mode_set()
296 clk_set_rate(tve->di_clk, rounded_rate / div); in imx_tve_encoder_mode_set()
298 ret = clk_set_parent(tve->di_sel_clk, tve->di_clk); in imx_tve_encoder_mode_set()
300 dev_err(tve->dev, "failed to set di_sel parent to tve_di: %d\n", in imx_tve_encoder_mode_set()
304 regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, in imx_tve_encoder_mode_set()
307 if (tve->mode == TVE_MODE_VGA) in imx_tve_encoder_mode_set()
312 dev_err(tve->dev, "failed to set configuration: %d\n", ret); in imx_tve_encoder_mode_set()
336 imx_crtc_state->bus_format = MEDIA_BUS_FMT_GBR888_1X24; in imx_tve_atomic_check()
337 imx_crtc_state->di_hsync_pin = tve->di_hsync_pin; in imx_tve_atomic_check()
338 imx_crtc_state->di_vsync_pin = tve->di_vsync_pin; in imx_tve_atomic_check()
373 regmap_read(tve->regmap, TVE_STAT_REG, &val); in imx_tve_irq_handler()
376 regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff); in imx_tve_irq_handler()
388 ret = regmap_read(tve->regmap, TVE_COM_CONF_REG, &val); in clk_tve_di_recalc_rate()
434 ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, in clk_tve_di_set_rate()
438 dev_err(tve->dev, "failed to set divider: %d\n", ret); in clk_tve_di_set_rate()
461 tve_di_parent[0] = __clk_get_name(tve->clk); in tve_clk_init()
464 tve->clk_hw_di.init = &init; in tve_clk_init()
465 tve->di_clk = clk_register(tve->dev, &tve->clk_hw_di); in tve_clk_init()
466 if (IS_ERR(tve->di_clk)) { in tve_clk_init()
467 dev_err(tve->dev, "failed to register TVE output clock: %ld\n", in tve_clk_init()
468 PTR_ERR(tve->di_clk)); in tve_clk_init()
469 return PTR_ERR(tve->di_clk); in tve_clk_init()
480 encoder_type = tve->mode == TVE_MODE_VGA ? in imx_tve_register()
483 ret = imx_drm_encoder_parse_of(drm, &tve->encoder, tve->dev->of_node); in imx_tve_register()
487 drm_encoder_helper_add(&tve->encoder, &imx_tve_encoder_helper_funcs); in imx_tve_register()
488 drm_encoder_init(drm, &tve->encoder, &imx_tve_encoder_funcs, in imx_tve_register()
491 drm_connector_helper_add(&tve->connector, in imx_tve_register()
493 drm_connector_init(drm, &tve->connector, &imx_tve_connector_funcs, in imx_tve_register()
496 drm_connector_attach_encoder(&tve->connector, &tve->encoder); in imx_tve_register()
505 regulator_disable(tve->dac_reg); in imx_tve_disable_regulator()
528 [TVE_MODE_VGA] = "vga",
536 ret = of_property_read_string(np, "fsl,tve-mode", &bm); in of_get_tve_mode()
544 return -EINVAL; in of_get_tve_mode()
551 struct device_node *np = dev->of_node; in imx_tve_bind()
562 return -ENOMEM; in imx_tve_bind()
564 tve->dev = dev; in imx_tve_bind()
565 spin_lock_init(&tve->lock); in imx_tve_bind()
567 ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0); in imx_tve_bind()
569 tve->ddc = of_find_i2c_adapter_by_node(ddc_node); in imx_tve_bind()
573 tve->mode = of_get_tve_mode(np); in imx_tve_bind()
574 if (tve->mode != TVE_MODE_VGA) { in imx_tve_bind()
575 dev_err(dev, "only VGA mode supported, currently\n"); in imx_tve_bind()
576 return -EINVAL; in imx_tve_bind()
579 if (tve->mode == TVE_MODE_VGA) { in imx_tve_bind()
580 ret = of_property_read_u32(np, "fsl,hsync-pin", in imx_tve_bind()
581 &tve->di_hsync_pin); in imx_tve_bind()
588 ret = of_property_read_u32(np, "fsl,vsync-pin", in imx_tve_bind()
589 &tve->di_vsync_pin); in imx_tve_bind()
603 tve->regmap = devm_regmap_init_mmio_clk(dev, "tve", base, in imx_tve_bind()
605 if (IS_ERR(tve->regmap)) { in imx_tve_bind()
607 PTR_ERR(tve->regmap)); in imx_tve_bind()
608 return PTR_ERR(tve->regmap); in imx_tve_bind()
619 "imx-tve", tve); in imx_tve_bind()
625 tve->dac_reg = devm_regulator_get(dev, "dac"); in imx_tve_bind()
626 if (!IS_ERR(tve->dac_reg)) { in imx_tve_bind()
627 if (regulator_get_voltage(tve->dac_reg) != IMX_TVE_DAC_VOLTAGE) in imx_tve_bind()
629 ret = regulator_enable(tve->dac_reg); in imx_tve_bind()
637 tve->clk = devm_clk_get(dev, "tve"); in imx_tve_bind()
638 if (IS_ERR(tve->clk)) { in imx_tve_bind()
640 PTR_ERR(tve->clk)); in imx_tve_bind()
641 return PTR_ERR(tve->clk); in imx_tve_bind()
645 tve->di_sel_clk = devm_clk_get(dev, "di_sel"); in imx_tve_bind()
646 if (IS_ERR(tve->di_sel_clk)) { in imx_tve_bind()
648 PTR_ERR(tve->di_sel_clk)); in imx_tve_bind()
649 return PTR_ERR(tve->di_sel_clk); in imx_tve_bind()
656 ret = regmap_read(tve->regmap, TVE_COM_CONF_REG, &val); in imx_tve_bind()
664 return -ENODEV; in imx_tve_bind()
667 /* disable cable detection for VGA mode */ in imx_tve_bind()
668 ret = regmap_write(tve->regmap, TVE_CD_CONT_REG, 0); in imx_tve_bind()
687 return component_add(&pdev->dev, &imx_tve_ops); in imx_tve_probe()
692 component_del(&pdev->dev, &imx_tve_ops); in imx_tve_remove()
697 { .compatible = "fsl,imx53-tve", },
707 .name = "imx-tve",
716 MODULE_ALIAS("platform:imx-tve");