Lines Matching full:pm
58 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_get_type_index()
59 if (rdev->pm.power_state[i].type == ps_type) { in radeon_pm_get_type_index()
66 return rdev->pm.default_power_state_index; in radeon_pm_get_type_index()
71 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { in radeon_pm_acpi_event_handler()
72 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
74 rdev->pm.dpm.ac_power = true; in radeon_pm_acpi_event_handler()
76 rdev->pm.dpm.ac_power = false; in radeon_pm_acpi_event_handler()
79 radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); in radeon_pm_acpi_event_handler()
81 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
82 } else if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_acpi_event_handler()
83 if (rdev->pm.profile == PM_PROFILE_AUTO) { in radeon_pm_acpi_event_handler()
84 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
87 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
94 switch (rdev->pm.profile) { in radeon_pm_update_profile()
96 rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX; in radeon_pm_update_profile()
100 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
101 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
103 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
105 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
106 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
108 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
112 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
113 rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX; in radeon_pm_update_profile()
115 rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; in radeon_pm_update_profile()
118 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
119 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
121 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
124 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
125 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
127 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
131 if (rdev->pm.active_crtc_count == 0) { in radeon_pm_update_profile()
132 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
133 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx; in radeon_pm_update_profile()
134 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
135 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx; in radeon_pm_update_profile()
137 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
138 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx; in radeon_pm_update_profile()
139 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
140 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx; in radeon_pm_update_profile()
159 if (rdev->pm.active_crtcs) { in radeon_sync_with_vblank()
160 rdev->pm.vblank_sync = false; in radeon_sync_with_vblank()
162 rdev->irq.vblank_queue, rdev->pm.vblank_sync, in radeon_sync_with_vblank()
172 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_set_power_state()
173 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_set_power_state()
177 sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
178 clock_info[rdev->pm.requested_clock_mode_index].sclk; in radeon_set_power_state()
179 if (sclk > rdev->pm.default_sclk) in radeon_set_power_state()
180 sclk = rdev->pm.default_sclk; in radeon_set_power_state()
186 if ((rdev->pm.pm_method == PM_METHOD_PROFILE) && in radeon_set_power_state()
188 rdev->pm.active_crtc_count && in radeon_set_power_state()
189 ((rdev->pm.profile_index == PM_PROFILE_MID_MH_IDX) || in radeon_set_power_state()
190 (rdev->pm.profile_index == PM_PROFILE_LOW_MH_IDX))) in radeon_set_power_state()
191 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
192 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk; in radeon_set_power_state()
194 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
195 clock_info[rdev->pm.requested_clock_mode_index].mclk; in radeon_set_power_state()
197 if (mclk > rdev->pm.default_mclk) in radeon_set_power_state()
198 mclk = rdev->pm.default_mclk; in radeon_set_power_state()
201 if (sclk < rdev->pm.current_sclk) in radeon_set_power_state()
206 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_set_power_state()
218 if (sclk != rdev->pm.current_sclk) { in radeon_set_power_state()
222 rdev->pm.current_sclk = sclk; in radeon_set_power_state()
227 if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) { in radeon_set_power_state()
231 rdev->pm.current_mclk = mclk; in radeon_set_power_state()
241 rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; in radeon_set_power_state()
242 rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index; in radeon_set_power_state()
244 DRM_DEBUG_DRIVER("pm: GUI not idle!!!\n"); in radeon_set_power_state()
253 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_pm_set_clocks()
254 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_pm_set_clocks()
257 down_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
270 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
280 if (rdev->pm.active_crtcs & (1 << i)) { in radeon_pm_set_clocks()
283 rdev->pm.req_vblank |= (1 << i); in radeon_pm_set_clocks()
297 if (rdev->pm.req_vblank & (1 << i)) { in radeon_pm_set_clocks()
298 rdev->pm.req_vblank &= ~(1 << i); in radeon_pm_set_clocks()
307 if (rdev->pm.active_crtc_count) in radeon_pm_set_clocks()
310 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_set_clocks()
313 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
322 DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states); in radeon_pm_print_states()
323 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_print_states()
324 power_state = &rdev->pm.power_state[i]; in radeon_pm_print_states()
327 if (i == rdev->pm.default_power_state_index) in radeon_pm_print_states()
356 int cp = rdev->pm.profile; in radeon_get_pm_profile()
378 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_profile()
379 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_set_pm_profile()
381 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_set_pm_profile()
383 rdev->pm.profile = PM_PROFILE_AUTO; in radeon_set_pm_profile()
385 rdev->pm.profile = PM_PROFILE_LOW; in radeon_set_pm_profile()
387 rdev->pm.profile = PM_PROFILE_MID; in radeon_set_pm_profile()
389 rdev->pm.profile = PM_PROFILE_HIGH; in radeon_set_pm_profile()
400 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_profile()
411 int pm = rdev->pm.pm_method; in radeon_get_pm_method() local
414 (pm == PM_METHOD_DYNPM) ? "dynpm" : in radeon_get_pm_method()
415 (pm == PM_METHOD_PROFILE) ? "profile" : "dpm"); in radeon_get_pm_method()
434 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_set_pm_method()
440 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
441 rdev->pm.pm_method = PM_METHOD_DYNPM; in radeon_set_pm_method()
442 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_set_pm_method()
443 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_set_pm_method()
444 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
446 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
448 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_set_pm_method()
449 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_set_pm_method()
450 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_set_pm_method()
451 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
452 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_set_pm_method()
468 enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; in radeon_get_dpm_state() local
471 (pm == POWER_STATE_TYPE_BATTERY) ? "battery" : in radeon_get_dpm_state()
472 (pm == POWER_STATE_TYPE_BALANCED) ? "balanced" : "performance"); in radeon_get_dpm_state()
483 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_state()
485 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; in radeon_set_dpm_state()
487 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_set_dpm_state()
489 rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE; in radeon_set_dpm_state()
491 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
495 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
512 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_get_dpm_forced_performance_level()
538 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
550 if (rdev->pm.dpm.thermal_active) { in radeon_set_dpm_forced_performance_level()
559 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
678 if (rdev->asic->pm.get_temperature) in radeon_hwmon_show_temp()
695 temp = rdev->pm.dpm.thermal.min_temp; in radeon_hwmon_show_temp_thresh()
697 temp = rdev->pm.dpm.thermal.max_temp; in radeon_hwmon_show_temp_thresh()
730 if (rdev->pm.pm_method != PM_METHOD_DPM && in hwmon_attributes_visible()
740 if (rdev->pm.no_fan && in hwmon_attributes_visible()
784 switch (rdev->pm.int_thermal_type) { in radeon_hwmon_init()
793 if (rdev->asic->pm.get_temperature == NULL) in radeon_hwmon_init()
795 rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev, in radeon_hwmon_init()
798 if (IS_ERR(rdev->pm.int_hwmon_dev)) { in radeon_hwmon_init()
799 err = PTR_ERR(rdev->pm.int_hwmon_dev); in radeon_hwmon_init()
813 if (rdev->pm.int_hwmon_dev) in radeon_hwmon_fini()
814 hwmon_device_unregister(rdev->pm.int_hwmon_dev); in radeon_hwmon_fini()
821 pm.dpm.thermal.work); in radeon_dpm_thermal_work_handler()
825 if (!rdev->pm.dpm_enabled) in radeon_dpm_thermal_work_handler()
828 if (rdev->asic->pm.get_temperature) { in radeon_dpm_thermal_work_handler()
831 if (temp < rdev->pm.dpm.thermal.min_temp) in radeon_dpm_thermal_work_handler()
833 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
835 if (rdev->pm.dpm.thermal.high_to_low) in radeon_dpm_thermal_work_handler()
837 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
839 mutex_lock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
841 rdev->pm.dpm.thermal_active = true; in radeon_dpm_thermal_work_handler()
843 rdev->pm.dpm.thermal_active = false; in radeon_dpm_thermal_work_handler()
844 rdev->pm.dpm.state = dpm_state; in radeon_dpm_thermal_work_handler()
845 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
852 bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ? in radeon_dpm_single_display()
889 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_pick_power_state()
890 ps = &rdev->pm.dpm.ps[i]; in radeon_dpm_pick_power_state()
923 if (rdev->pm.dpm.uvd_ps) in radeon_dpm_pick_power_state()
924 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
944 return rdev->pm.dpm.boot_ps; in radeon_dpm_pick_power_state()
973 if (rdev->pm.dpm.uvd_ps) { in radeon_dpm_pick_power_state()
974 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
1006 if (!rdev->pm.dpm_enabled) in radeon_dpm_change_power_state_locked()
1009 if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) { in radeon_dpm_change_power_state_locked()
1011 if ((!rdev->pm.dpm.thermal_active) && in radeon_dpm_change_power_state_locked()
1012 (!rdev->pm.dpm.uvd_active)) in radeon_dpm_change_power_state_locked()
1013 rdev->pm.dpm.state = rdev->pm.dpm.user_state; in radeon_dpm_change_power_state_locked()
1015 dpm_state = rdev->pm.dpm.state; in radeon_dpm_change_power_state_locked()
1019 rdev->pm.dpm.requested_ps = ps; in radeon_dpm_change_power_state_locked()
1024 if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) { in radeon_dpm_change_power_state_locked()
1026 if (ps->vce_active != rdev->pm.dpm.vce_active) in radeon_dpm_change_power_state_locked()
1029 if (rdev->pm.dpm.single_display != single_display) in radeon_dpm_change_power_state_locked()
1035 if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1040 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1041 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1049 if (rdev->pm.dpm.new_active_crtcs == in radeon_dpm_change_power_state_locked()
1050 rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1053 if ((rdev->pm.dpm.current_active_crtc_count > 1) && in radeon_dpm_change_power_state_locked()
1054 (rdev->pm.dpm.new_active_crtc_count > 1)) { in radeon_dpm_change_power_state_locked()
1059 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1060 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1070 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps); in radeon_dpm_change_power_state_locked()
1072 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps); in radeon_dpm_change_power_state_locked()
1075 down_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1079 ps->vce_active = rdev->pm.dpm.vce_active; in radeon_dpm_change_power_state_locked()
1101 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps; in radeon_dpm_change_power_state_locked()
1105 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1106 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1107 rdev->pm.dpm.single_display = single_display; in radeon_dpm_change_power_state_locked()
1110 if (rdev->pm.dpm.thermal_active) { in radeon_dpm_change_power_state_locked()
1111 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_dpm_change_power_state_locked()
1115 rdev->pm.dpm.forced_level = level; in radeon_dpm_change_power_state_locked()
1118 radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level); in radeon_dpm_change_power_state_locked()
1124 up_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1132 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1135 enable |= rdev->pm.dpm.sd > 0; in radeon_dpm_enable_uvd()
1136 enable |= rdev->pm.dpm.hd > 0; in radeon_dpm_enable_uvd()
1139 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1142 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1143 rdev->pm.dpm.uvd_active = true; in radeon_dpm_enable_uvd()
1146 if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1148 else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1150 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1)) in radeon_dpm_enable_uvd()
1152 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2)) in radeon_dpm_enable_uvd()
1157 rdev->pm.dpm.state = dpm_state; in radeon_dpm_enable_uvd()
1158 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1160 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1161 rdev->pm.dpm.uvd_active = false; in radeon_dpm_enable_uvd()
1162 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1172 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1173 rdev->pm.dpm.vce_active = true; in radeon_dpm_enable_vce()
1175 rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL; in radeon_dpm_enable_vce()
1176 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1178 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1179 rdev->pm.dpm.vce_active = false; in radeon_dpm_enable_vce()
1180 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1188 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1189 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_suspend_old()
1190 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) in radeon_pm_suspend_old()
1191 rdev->pm.dynpm_state = DYNPM_STATE_SUSPENDED; in radeon_pm_suspend_old()
1193 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1195 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_suspend_old()
1200 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1204 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_suspend_dpm()
1205 rdev->pm.dpm_enabled = false; in radeon_pm_suspend_dpm()
1206 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1211 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_suspend()
1223 if (rdev->pm.default_vddc) in radeon_pm_resume_old()
1224 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_old()
1226 if (rdev->pm.default_vddci) in radeon_pm_resume_old()
1227 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_old()
1229 if (rdev->pm.default_sclk) in radeon_pm_resume_old()
1230 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_old()
1231 if (rdev->pm.default_mclk) in radeon_pm_resume_old()
1232 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_old()
1235 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_old()
1236 rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; in radeon_pm_resume_old()
1237 rdev->pm.current_clock_mode_index = 0; in radeon_pm_resume_old()
1238 rdev->pm.current_sclk = rdev->pm.default_sclk; in radeon_pm_resume_old()
1239 rdev->pm.current_mclk = rdev->pm.default_mclk; in radeon_pm_resume_old()
1240 if (rdev->pm.power_state) { in radeon_pm_resume_old()
1241 …rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vol… in radeon_pm_resume_old()
1242 …rdev->pm.current_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vo… in radeon_pm_resume_old()
1244 if (rdev->pm.pm_method == PM_METHOD_DYNPM in radeon_pm_resume_old()
1245 && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) { in radeon_pm_resume_old()
1246 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_resume_old()
1247 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_resume_old()
1250 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_old()
1259 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1260 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_resume_dpm()
1263 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1266 rdev->pm.dpm_enabled = true; in radeon_pm_resume_dpm()
1274 if (rdev->pm.default_vddc) in radeon_pm_resume_dpm()
1275 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_dpm()
1277 if (rdev->pm.default_vddci) in radeon_pm_resume_dpm()
1278 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_dpm()
1280 if (rdev->pm.default_sclk) in radeon_pm_resume_dpm()
1281 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_dpm()
1282 if (rdev->pm.default_mclk) in radeon_pm_resume_dpm()
1283 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_dpm()
1289 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_resume()
1299 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_init_old()
1300 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_init_old()
1301 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_init_old()
1302 rdev->pm.dynpm_can_upclock = true; in radeon_pm_init_old()
1303 rdev->pm.dynpm_can_downclock = true; in radeon_pm_init_old()
1304 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1305 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1306 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1307 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1308 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_old()
1321 if (rdev->pm.default_vddc) in radeon_pm_init_old()
1322 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_old()
1324 if (rdev->pm.default_vddci) in radeon_pm_init_old()
1325 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_old()
1327 if (rdev->pm.default_sclk) in radeon_pm_init_old()
1328 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_old()
1329 if (rdev->pm.default_mclk) in radeon_pm_init_old()
1330 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_old()
1339 INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler); in radeon_pm_init_old()
1341 if (rdev->pm.num_power_states > 1) { in radeon_pm_init_old()
1343 DRM_ERROR("Failed to register debugfs file for PM!\n"); in radeon_pm_init_old()
1356 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_print_power_states()
1358 radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]); in radeon_dpm_print_power_states()
1367 rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1368 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1369 rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; in radeon_pm_init_dpm()
1370 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1371 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1372 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1373 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1374 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_dpm()
1386 INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler); in radeon_pm_init_dpm()
1387 mutex_lock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1389 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_init_dpm()
1394 mutex_unlock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1397 rdev->pm.dpm_enabled = true; in radeon_pm_init_dpm()
1408 rdev->pm.dpm_enabled = false; in radeon_pm_init_dpm()
1412 if (rdev->pm.default_vddc) in radeon_pm_init_dpm()
1413 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_dpm()
1415 if (rdev->pm.default_vddci) in radeon_pm_init_dpm()
1416 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_dpm()
1418 if (rdev->pm.default_sclk) in radeon_pm_init_dpm()
1419 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_dpm()
1420 if (rdev->pm.default_mclk) in radeon_pm_init_dpm()
1421 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_dpm()
1472 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1476 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1478 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1480 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1510 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1514 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1516 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1518 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1520 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1524 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1528 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_init()
1538 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_pm_late_init()
1539 if (rdev->pm.dpm_enabled) { in radeon_pm_late_init()
1540 if (!rdev->pm.sysfs_initialized) { in radeon_pm_late_init()
1554 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1557 mutex_lock(&rdev->pm.mutex); in radeon_pm_late_init()
1559 mutex_unlock(&rdev->pm.mutex); in radeon_pm_late_init()
1561 rdev->pm.dpm_enabled = false; in radeon_pm_late_init()
1571 if ((rdev->pm.num_power_states > 1) && in radeon_pm_late_init()
1572 (!rdev->pm.sysfs_initialized)) { in radeon_pm_late_init()
1581 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1589 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_old()
1590 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_old()
1591 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_fini_old()
1592 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_fini_old()
1595 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_fini_old()
1597 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_fini_old()
1598 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_fini_old()
1601 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_old()
1603 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_fini_old()
1610 kfree(rdev->pm.power_state); in radeon_pm_fini_old()
1615 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_dpm()
1616 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1618 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1629 kfree(rdev->pm.power_state); in radeon_pm_fini_dpm()
1634 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_fini()
1646 if (rdev->pm.num_power_states < 2) in radeon_pm_compute_clocks_old()
1649 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1651 rdev->pm.active_crtcs = 0; in radeon_pm_compute_clocks_old()
1652 rdev->pm.active_crtc_count = 0; in radeon_pm_compute_clocks_old()
1658 rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_old()
1659 rdev->pm.active_crtc_count++; in radeon_pm_compute_clocks_old()
1664 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_compute_clocks_old()
1667 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_compute_clocks_old()
1668 if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) { in radeon_pm_compute_clocks_old()
1669 if (rdev->pm.active_crtc_count > 1) { in radeon_pm_compute_clocks_old()
1670 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_pm_compute_clocks_old()
1671 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1673 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_pm_compute_clocks_old()
1674 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_compute_clocks_old()
1680 } else if (rdev->pm.active_crtc_count == 1) { in radeon_pm_compute_clocks_old()
1683 if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1684 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1685 rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK; in radeon_pm_compute_clocks_old()
1689 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1691 } else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) { in radeon_pm_compute_clocks_old()
1692 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1693 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1698 if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1699 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1701 rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM; in radeon_pm_compute_clocks_old()
1702 rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM; in radeon_pm_compute_clocks_old()
1710 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1719 if (!rdev->pm.dpm_enabled) in radeon_pm_compute_clocks_dpm()
1722 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1725 rdev->pm.dpm.new_active_crtcs = 0; in radeon_pm_compute_clocks_dpm()
1726 rdev->pm.dpm.new_active_crtc_count = 0; in radeon_pm_compute_clocks_dpm()
1732 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_dpm()
1733 rdev->pm.dpm.new_active_crtc_count++; in radeon_pm_compute_clocks_dpm()
1740 rdev->pm.dpm.ac_power = true; in radeon_pm_compute_clocks_dpm()
1742 rdev->pm.dpm.ac_power = false; in radeon_pm_compute_clocks_dpm()
1746 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1752 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_compute_clocks()
1767 if (rdev->pm.active_crtcs & (1 << crtc)) { in radeon_pm_in_vbl()
1788 DRM_DEBUG_DRIVER("not in vbl for pm change %08x at %s\n", stat_crtc, in radeon_pm_debug_check_in_vbl()
1798 pm.dynpm_idle_work.work); in radeon_dynpm_idle_work_handler()
1801 mutex_lock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1802 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_dynpm_idle_work_handler()
1817 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) { in radeon_dynpm_idle_work_handler()
1818 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1819 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1820 rdev->pm.dynpm_can_upclock) { in radeon_dynpm_idle_work_handler()
1821 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1823 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1827 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) { in radeon_dynpm_idle_work_handler()
1828 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1829 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1830 rdev->pm.dynpm_can_downclock) { in radeon_dynpm_idle_work_handler()
1831 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1833 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1841 if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1842 jiffies > rdev->pm.dynpm_action_timeout) { in radeon_dynpm_idle_work_handler()
1847 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_dynpm_idle_work_handler()
1850 mutex_unlock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1869 } else if (rdev->pm.dpm_enabled) { in radeon_debugfs_pm_info()
1870 mutex_lock(&rdev->pm.mutex); in radeon_debugfs_pm_info()
1875 mutex_unlock(&rdev->pm.mutex); in radeon_debugfs_pm_info()
1877 seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk); in radeon_debugfs_pm_info()
1880 seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); in radeon_debugfs_pm_info()
1883 seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); in radeon_debugfs_pm_info()
1884 if (rdev->asic->pm.get_memory_clock) in radeon_debugfs_pm_info()
1886 if (rdev->pm.current_vddc) in radeon_debugfs_pm_info()
1887 seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc); in radeon_debugfs_pm_info()
1888 if (rdev->asic->pm.get_pcie_lanes) in radeon_debugfs_pm_info()