Lines Matching +full:1000 +full:base +full:- +full:x
40 for (i = 0; i < rdev->usec_timeout; i++) { in rs690_mc_wait_for_idle()
47 return -1; in rs690_mc_wait_for_idle()
72 if (atom_parse_data_header(rdev->mode_info.atom_context, index, NULL, in rs690_pm_info()
74 info = (union igp_info *)(rdev->mode_info.atom_context->bios + data_offset); in rs690_pm_info()
80 rdev->pm.igp_sideport_mclk.full = dfixed_const(le32_to_cpu(info->info.ulBootUpMemoryClock)); in rs690_pm_info()
81 rdev->pm.igp_sideport_mclk.full = dfixed_div(rdev->pm.igp_sideport_mclk, tmp); in rs690_pm_info()
82 if (le16_to_cpu(info->info.usK8MemoryClock)) in rs690_pm_info()
83 rdev->pm.igp_system_mclk.full = dfixed_const(le16_to_cpu(info->info.usK8MemoryClock)); in rs690_pm_info()
84 else if (rdev->clock.default_mclk) { in rs690_pm_info()
85 rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk); in rs690_pm_info()
86 rdev->pm.igp_system_mclk.full = dfixed_div(rdev->pm.igp_system_mclk, tmp); in rs690_pm_info()
88 rdev->pm.igp_system_mclk.full = dfixed_const(400); in rs690_pm_info()
89 rdev->pm.igp_ht_link_clk.full = dfixed_const(le16_to_cpu(info->info.usFSBClock)); in rs690_pm_info()
90 rdev->pm.igp_ht_link_width.full = dfixed_const(info->info.ucHTLinkWidth); in rs690_pm_info()
94 rdev->pm.igp_sideport_mclk.full = dfixed_const(le32_to_cpu(info->info_v2.ulBootUpSidePortClock)); in rs690_pm_info()
95 rdev->pm.igp_sideport_mclk.full = dfixed_div(rdev->pm.igp_sideport_mclk, tmp); in rs690_pm_info()
96 if (le32_to_cpu(info->info_v2.ulBootUpUMAClock)) in rs690_pm_info()
97 rdev->pm.igp_system_mclk.full = dfixed_const(le32_to_cpu(info->info_v2.ulBootUpUMAClock)); in rs690_pm_info()
98 else if (rdev->clock.default_mclk) in rs690_pm_info()
99 rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk); in rs690_pm_info()
101 rdev->pm.igp_system_mclk.full = dfixed_const(66700); in rs690_pm_info()
102 rdev->pm.igp_system_mclk.full = dfixed_div(rdev->pm.igp_system_mclk, tmp); in rs690_pm_info()
103 rdev->pm.igp_ht_link_clk.full = dfixed_const(le32_to_cpu(info->info_v2.ulHTLinkFreq)); in rs690_pm_info()
104 rdev->pm.igp_ht_link_clk.full = dfixed_div(rdev->pm.igp_ht_link_clk, tmp); in rs690_pm_info()
105 rdev->pm.igp_ht_link_width.full = dfixed_const(le16_to_cpu(info->info_v2.usMinHTLinkWidth)); in rs690_pm_info()
109 rdev->pm.igp_sideport_mclk.full = dfixed_const(200); in rs690_pm_info()
110 rdev->pm.igp_system_mclk.full = dfixed_const(200); in rs690_pm_info()
111 rdev->pm.igp_ht_link_clk.full = dfixed_const(1000); in rs690_pm_info()
112 rdev->pm.igp_ht_link_width.full = dfixed_const(8); in rs690_pm_info()
118 rdev->pm.igp_sideport_mclk.full = dfixed_const(200); in rs690_pm_info()
119 rdev->pm.igp_system_mclk.full = dfixed_const(200); in rs690_pm_info()
120 rdev->pm.igp_ht_link_clk.full = dfixed_const(1000); in rs690_pm_info()
121 rdev->pm.igp_ht_link_width.full = dfixed_const(8); in rs690_pm_info()
127 rdev->pm.k8_bandwidth.full = dfixed_mul(rdev->pm.igp_system_mclk, tmp); in rs690_pm_info()
132 rdev->pm.ht_bandwidth.full = dfixed_mul(rdev->pm.igp_ht_link_clk, in rs690_pm_info()
133 rdev->pm.igp_ht_link_width); in rs690_pm_info()
134 rdev->pm.ht_bandwidth.full = dfixed_div(rdev->pm.ht_bandwidth, tmp); in rs690_pm_info()
135 if (tmp.full < rdev->pm.max_bandwidth.full) { in rs690_pm_info()
137 rdev->pm.max_bandwidth.full = tmp.full; in rs690_pm_info()
143 rdev->pm.sideport_bandwidth.full = dfixed_mul(rdev->pm.igp_sideport_mclk, tmp); in rs690_pm_info()
145 rdev->pm.sideport_bandwidth.full = dfixed_div(rdev->pm.sideport_bandwidth, tmp); in rs690_pm_info()
150 u64 base; in rs690_mc_init() local
155 rdev->mc.vram_is_ddr = true; in rs690_mc_init()
156 rdev->mc.vram_width = 128; in rs690_mc_init()
157 rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); in rs690_mc_init()
158 rdev->mc.mc_vram_size = rdev->mc.real_vram_size; in rs690_mc_init()
159 rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); in rs690_mc_init()
160 rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); in rs690_mc_init()
161 rdev->mc.visible_vram_size = rdev->mc.aper_size; in rs690_mc_init()
162 base = RREG32_MC(R_000100_MCCFG_FB_LOCATION); in rs690_mc_init()
163 base = G_000100_MC_FB_START(base) << 16; in rs690_mc_init()
164 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); in rs690_mc_init()
169 if (rdev->mc.igp_sideport_enabled && in rs690_mc_init()
170 (rdev->mc.real_vram_size == (384 * 1024 * 1024))) { in rs690_mc_init()
171 base += 128 * 1024 * 1024; in rs690_mc_init()
172 rdev->mc.real_vram_size -= 128 * 1024 * 1024; in rs690_mc_init()
173 rdev->mc.mc_vram_size = rdev->mc.real_vram_size; in rs690_mc_init()
177 rdev->fastfb_working = false; in rs690_mc_init()
182 if (k8_addr + rdev->mc.visible_vram_size < 0x100000000ULL) in rs690_mc_init()
188 if (rdev->mc.igp_sideport_enabled == false && radeon_fastfb == 1) { in rs690_mc_init()
189 DRM_INFO("Direct mapping: aper base at 0x%llx, replaced by direct mapping base 0x%llx.\n", in rs690_mc_init()
190 (unsigned long long)rdev->mc.aper_base, k8_addr); in rs690_mc_init()
191 rdev->mc.aper_base = (resource_size_t)k8_addr; in rs690_mc_init()
192 rdev->fastfb_working = true; in rs690_mc_init()
197 radeon_vram_location(rdev, &rdev->mc, base); in rs690_mc_init()
198 rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1; in rs690_mc_init()
199 radeon_gtt_location(rdev, &rdev->mc); in rs690_mc_init()
218 * 0 - line buffer is divided in half and shared between crtc in rs690_line_buffer_adjust()
219 * 1 - D1 gets 3/4 of the line buffer, D2 gets 1/4 in rs690_line_buffer_adjust()
220 * 2 - D1 gets the whole buffer in rs690_line_buffer_adjust()
221 * 3 - D1 gets 1/4 of the line buffer, D2 gets 3/4 in rs690_line_buffer_adjust()
230 if (mode1->hdisplay > mode2->hdisplay) { in rs690_line_buffer_adjust()
231 if (mode1->hdisplay > 2560) in rs690_line_buffer_adjust()
235 } else if (mode2->hdisplay > mode1->hdisplay) { in rs690_line_buffer_adjust()
236 if (mode2->hdisplay > 2560) in rs690_line_buffer_adjust()
251 rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); in rs690_line_buffer_adjust()
254 rdev->mode_info.crtcs[1]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode2->crtc_hdisplay); in rs690_line_buffer_adjust()
275 struct drm_display_mode *mode = &crtc->base.mode; in rs690_crtc_bandwidth_compute()
282 if (!crtc->base.enabled) { in rs690_crtc_bandwidth_compute()
284 wm->lb_request_fifo_depth = 4; in rs690_crtc_bandwidth_compute()
288 if (((rdev->family == CHIP_RS780) || (rdev->family == CHIP_RS880)) && in rs690_crtc_bandwidth_compute()
289 (rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) in rs690_crtc_bandwidth_compute()
292 selected_sclk = rdev->pm.current_sclk; in rs690_crtc_bandwidth_compute()
301 core_bandwidth.full = dfixed_div(rdev->pm.sclk, a); in rs690_crtc_bandwidth_compute()
303 if (crtc->vsc.full > dfixed_const(2)) in rs690_crtc_bandwidth_compute()
304 wm->num_line_pair.full = dfixed_const(2); in rs690_crtc_bandwidth_compute()
306 wm->num_line_pair.full = dfixed_const(1); in rs690_crtc_bandwidth_compute()
308 b.full = dfixed_const(mode->crtc_hdisplay); in rs690_crtc_bandwidth_compute()
311 request_fifo_depth.full = dfixed_mul(a, wm->num_line_pair); in rs690_crtc_bandwidth_compute()
314 wm->lb_request_fifo_depth = 4; in rs690_crtc_bandwidth_compute()
316 wm->lb_request_fifo_depth = dfixed_trunc(request_fifo_depth); in rs690_crtc_bandwidth_compute()
320 * pclk = pixel clock period(ns) = 1000 / (mode.clock / 1000) in rs690_crtc_bandwidth_compute()
325 a.full = dfixed_const(mode->clock); in rs690_crtc_bandwidth_compute()
326 b.full = dfixed_const(1000); in rs690_crtc_bandwidth_compute()
329 if (crtc->rmx_type != RMX_OFF) { in rs690_crtc_bandwidth_compute()
331 if (crtc->vsc.full > b.full) in rs690_crtc_bandwidth_compute()
332 b.full = crtc->vsc.full; in rs690_crtc_bandwidth_compute()
333 b.full = dfixed_mul(b, crtc->hsc); in rs690_crtc_bandwidth_compute()
341 wm->consumption_rate.full = dfixed_div(a, consumption_time); in rs690_crtc_bandwidth_compute()
349 a.full = dfixed_const(crtc->base.mode.crtc_htotal); in rs690_crtc_bandwidth_compute()
357 a.full = dfixed_const(crtc->base.mode.crtc_htotal); in rs690_crtc_bandwidth_compute()
358 b.full = dfixed_const(crtc->base.mode.crtc_hdisplay); in rs690_crtc_bandwidth_compute()
359 wm->active_time.full = dfixed_mul(line_time, b); in rs690_crtc_bandwidth_compute()
360 wm->active_time.full = dfixed_div(wm->active_time, a); in rs690_crtc_bandwidth_compute()
364 if (rdev->mc.igp_sideport_enabled) { in rs690_crtc_bandwidth_compute()
365 if (max_bandwidth.full > rdev->pm.sideport_bandwidth.full && in rs690_crtc_bandwidth_compute()
366 rdev->pm.sideport_bandwidth.full) in rs690_crtc_bandwidth_compute()
367 max_bandwidth = rdev->pm.sideport_bandwidth; in rs690_crtc_bandwidth_compute()
369 a.full = dfixed_const(1000); in rs690_crtc_bandwidth_compute()
370 b.full = dfixed_div(rdev->pm.igp_sideport_mclk, a); in rs690_crtc_bandwidth_compute()
374 if (max_bandwidth.full > rdev->pm.k8_bandwidth.full && in rs690_crtc_bandwidth_compute()
375 rdev->pm.k8_bandwidth.full) in rs690_crtc_bandwidth_compute()
376 max_bandwidth = rdev->pm.k8_bandwidth; in rs690_crtc_bandwidth_compute()
377 if (max_bandwidth.full > rdev->pm.ht_bandwidth.full && in rs690_crtc_bandwidth_compute()
378 rdev->pm.ht_bandwidth.full) in rs690_crtc_bandwidth_compute()
379 max_bandwidth = rdev->pm.ht_bandwidth; in rs690_crtc_bandwidth_compute()
383 /* sclk = system clocks(ns) = 1000 / max_bandwidth / 16 */ in rs690_crtc_bandwidth_compute()
386 a.full = dfixed_const(1000); in rs690_crtc_bandwidth_compute()
406 if (dfixed_trunc(wm->num_line_pair) > 1) { in rs690_crtc_bandwidth_compute()
408 wm->worst_case_latency.full = dfixed_mul(a, chunk_time); in rs690_crtc_bandwidth_compute()
409 wm->worst_case_latency.full += read_delay_latency.full; in rs690_crtc_bandwidth_compute()
412 wm->worst_case_latency.full = dfixed_mul(a, chunk_time); in rs690_crtc_bandwidth_compute()
413 wm->worst_case_latency.full += read_delay_latency.full; in rs690_crtc_bandwidth_compute()
426 if ((2+wm->lb_request_fifo_depth) >= dfixed_trunc(request_fifo_depth)) { in rs690_crtc_bandwidth_compute()
429 tolerable_latency.full = dfixed_const(wm->lb_request_fifo_depth - 2); in rs690_crtc_bandwidth_compute()
430 tolerable_latency.full = request_fifo_depth.full - tolerable_latency.full; in rs690_crtc_bandwidth_compute()
432 tolerable_latency.full = line_time.full - tolerable_latency.full; in rs690_crtc_bandwidth_compute()
435 wm->dbpp.full = dfixed_const(4 * 8); in rs690_crtc_bandwidth_compute()
441 wm->priority_mark_max.full = dfixed_const(crtc->base.mode.crtc_hdisplay); in rs690_crtc_bandwidth_compute()
442 wm->priority_mark_max.full = dfixed_div(wm->priority_mark_max, a); in rs690_crtc_bandwidth_compute()
443 wm->priority_mark_max.full = dfixed_ceil(wm->priority_mark_max); in rs690_crtc_bandwidth_compute()
446 estimated_width.full = tolerable_latency.full - wm->worst_case_latency.full; in rs690_crtc_bandwidth_compute()
448 if (dfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) { in rs690_crtc_bandwidth_compute()
449 wm->priority_mark.full = dfixed_const(10); in rs690_crtc_bandwidth_compute()
452 wm->priority_mark.full = dfixed_div(estimated_width, a); in rs690_crtc_bandwidth_compute()
453 wm->priority_mark.full = dfixed_ceil(wm->priority_mark); in rs690_crtc_bandwidth_compute()
454 wm->priority_mark.full = wm->priority_mark_max.full - wm->priority_mark.full; in rs690_crtc_bandwidth_compute()
473 if (dfixed_trunc(wm0->dbpp) > 64) in rs690_compute_mode_priority()
474 a.full = dfixed_mul(wm0->dbpp, wm0->num_line_pair); in rs690_compute_mode_priority()
476 a.full = wm0->num_line_pair.full; in rs690_compute_mode_priority()
477 if (dfixed_trunc(wm1->dbpp) > 64) in rs690_compute_mode_priority()
478 b.full = dfixed_mul(wm1->dbpp, wm1->num_line_pair); in rs690_compute_mode_priority()
480 b.full = wm1->num_line_pair.full; in rs690_compute_mode_priority()
482 fill_rate.full = dfixed_div(wm0->sclk, a); in rs690_compute_mode_priority()
483 if (wm0->consumption_rate.full > fill_rate.full) { in rs690_compute_mode_priority()
484 b.full = wm0->consumption_rate.full - fill_rate.full; in rs690_compute_mode_priority()
485 b.full = dfixed_mul(b, wm0->active_time); in rs690_compute_mode_priority()
486 a.full = dfixed_mul(wm0->worst_case_latency, in rs690_compute_mode_priority()
487 wm0->consumption_rate); in rs690_compute_mode_priority()
489 b.full = dfixed_const(16 * 1000); in rs690_compute_mode_priority()
492 a.full = dfixed_mul(wm0->worst_case_latency, in rs690_compute_mode_priority()
493 wm0->consumption_rate); in rs690_compute_mode_priority()
494 b.full = dfixed_const(16 * 1000); in rs690_compute_mode_priority()
497 if (wm1->consumption_rate.full > fill_rate.full) { in rs690_compute_mode_priority()
498 b.full = wm1->consumption_rate.full - fill_rate.full; in rs690_compute_mode_priority()
499 b.full = dfixed_mul(b, wm1->active_time); in rs690_compute_mode_priority()
500 a.full = dfixed_mul(wm1->worst_case_latency, in rs690_compute_mode_priority()
501 wm1->consumption_rate); in rs690_compute_mode_priority()
503 b.full = dfixed_const(16 * 1000); in rs690_compute_mode_priority()
506 a.full = dfixed_mul(wm1->worst_case_latency, in rs690_compute_mode_priority()
507 wm1->consumption_rate); in rs690_compute_mode_priority()
508 b.full = dfixed_const(16 * 1000); in rs690_compute_mode_priority()
511 if (wm0->priority_mark.full > priority_mark02.full) in rs690_compute_mode_priority()
512 priority_mark02.full = wm0->priority_mark.full; in rs690_compute_mode_priority()
513 if (wm0->priority_mark_max.full > priority_mark02.full) in rs690_compute_mode_priority()
514 priority_mark02.full = wm0->priority_mark_max.full; in rs690_compute_mode_priority()
515 if (wm1->priority_mark.full > priority_mark12.full) in rs690_compute_mode_priority()
516 priority_mark12.full = wm1->priority_mark.full; in rs690_compute_mode_priority()
517 if (wm1->priority_mark_max.full > priority_mark12.full) in rs690_compute_mode_priority()
518 priority_mark12.full = wm1->priority_mark_max.full; in rs690_compute_mode_priority()
521 if (rdev->disp_priority == 2) { in rs690_compute_mode_priority()
526 if (dfixed_trunc(wm0->dbpp) > 64) in rs690_compute_mode_priority()
527 a.full = dfixed_mul(wm0->dbpp, wm0->num_line_pair); in rs690_compute_mode_priority()
529 a.full = wm0->num_line_pair.full; in rs690_compute_mode_priority()
530 fill_rate.full = dfixed_div(wm0->sclk, a); in rs690_compute_mode_priority()
531 if (wm0->consumption_rate.full > fill_rate.full) { in rs690_compute_mode_priority()
532 b.full = wm0->consumption_rate.full - fill_rate.full; in rs690_compute_mode_priority()
533 b.full = dfixed_mul(b, wm0->active_time); in rs690_compute_mode_priority()
534 a.full = dfixed_mul(wm0->worst_case_latency, in rs690_compute_mode_priority()
535 wm0->consumption_rate); in rs690_compute_mode_priority()
537 b.full = dfixed_const(16 * 1000); in rs690_compute_mode_priority()
540 a.full = dfixed_mul(wm0->worst_case_latency, in rs690_compute_mode_priority()
541 wm0->consumption_rate); in rs690_compute_mode_priority()
542 b.full = dfixed_const(16 * 1000); in rs690_compute_mode_priority()
545 if (wm0->priority_mark.full > priority_mark02.full) in rs690_compute_mode_priority()
546 priority_mark02.full = wm0->priority_mark.full; in rs690_compute_mode_priority()
547 if (wm0->priority_mark_max.full > priority_mark02.full) in rs690_compute_mode_priority()
548 priority_mark02.full = wm0->priority_mark_max.full; in rs690_compute_mode_priority()
550 if (rdev->disp_priority == 2) in rs690_compute_mode_priority()
553 if (dfixed_trunc(wm1->dbpp) > 64) in rs690_compute_mode_priority()
554 a.full = dfixed_mul(wm1->dbpp, wm1->num_line_pair); in rs690_compute_mode_priority()
556 a.full = wm1->num_line_pair.full; in rs690_compute_mode_priority()
557 fill_rate.full = dfixed_div(wm1->sclk, a); in rs690_compute_mode_priority()
558 if (wm1->consumption_rate.full > fill_rate.full) { in rs690_compute_mode_priority()
559 b.full = wm1->consumption_rate.full - fill_rate.full; in rs690_compute_mode_priority()
560 b.full = dfixed_mul(b, wm1->active_time); in rs690_compute_mode_priority()
561 a.full = dfixed_mul(wm1->worst_case_latency, in rs690_compute_mode_priority()
562 wm1->consumption_rate); in rs690_compute_mode_priority()
564 b.full = dfixed_const(16 * 1000); in rs690_compute_mode_priority()
567 a.full = dfixed_mul(wm1->worst_case_latency, in rs690_compute_mode_priority()
568 wm1->consumption_rate); in rs690_compute_mode_priority()
569 b.full = dfixed_const(16 * 1000); in rs690_compute_mode_priority()
572 if (wm1->priority_mark.full > priority_mark12.full) in rs690_compute_mode_priority()
573 priority_mark12.full = wm1->priority_mark.full; in rs690_compute_mode_priority()
574 if (wm1->priority_mark_max.full > priority_mark12.full) in rs690_compute_mode_priority()
575 priority_mark12.full = wm1->priority_mark_max.full; in rs690_compute_mode_priority()
577 if (rdev->disp_priority == 2) in rs690_compute_mode_priority()
592 if (!rdev->mode_info.mode_config_initialized) in rs690_bandwidth_update()
597 if (rdev->mode_info.crtcs[0]->base.enabled) in rs690_bandwidth_update()
598 mode0 = &rdev->mode_info.crtcs[0]->base.mode; in rs690_bandwidth_update()
599 if (rdev->mode_info.crtcs[1]->base.enabled) in rs690_bandwidth_update()
600 mode1 = &rdev->mode_info.crtcs[1]->base.mode; in rs690_bandwidth_update()
606 if ((rdev->disp_priority == 2) && in rs690_bandwidth_update()
607 ((rdev->family == CHIP_RS690) || (rdev->family == CHIP_RS740))) { in rs690_bandwidth_update()
619 if ((rdev->family == CHIP_RS690) || (rdev->family == CHIP_RS740)) in rs690_bandwidth_update()
621 if ((rdev->family == CHIP_RS780) || (rdev->family == CHIP_RS880)) in rs690_bandwidth_update()
624 rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_high, false); in rs690_bandwidth_update()
625 rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_high, false); in rs690_bandwidth_update()
627 rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_low, true); in rs690_bandwidth_update()
628 rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_low, true); in rs690_bandwidth_update()
630 tmp = (wm0_high.lb_request_fifo_depth - 1); in rs690_bandwidth_update()
631 tmp |= (wm1_high.lb_request_fifo_depth - 1) << 16; in rs690_bandwidth_update()
654 spin_lock_irqsave(&rdev->mc_idx_lock, flags); in rs690_mc_rreg()
658 spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); in rs690_mc_rreg()
666 spin_lock_irqsave(&rdev->mc_idx_lock, flags); in rs690_mc_wreg()
671 spin_unlock_irqrestore(&rdev->mc_idx_lock, flags); in rs690_mc_wreg()
683 dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); in rs690_mc_program()
686 S_000100_MC_FB_START(rdev->mc.vram_start >> 16) | in rs690_mc_program()
687 S_000100_MC_FB_TOP(rdev->mc.vram_end >> 16)); in rs690_mc_program()
689 S_000134_HDP_FB_START(rdev->mc.vram_start >> 16)); in rs690_mc_program()
716 dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); in rs690_startup()
721 if (!rdev->irq.installed) { in rs690_startup()
728 rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); in rs690_startup()
732 dev_err(rdev->dev, "failed initializing CP (%d).\n", r); in rs690_startup()
738 dev_err(rdev->dev, "IB initialization failed (%d).\n", r); in rs690_startup()
744 dev_err(rdev->dev, "failed initializing audio\n"); in rs690_startup()
761 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", in rs690_resume()
766 atom_asic_init(rdev->mode_info.atom_context); in rs690_resume()
772 rdev->accel_working = true; in rs690_resume()
775 rdev->accel_working = false; in rs690_resume()
804 kfree(rdev->bios); in rs690_fini()
805 rdev->bios = NULL; in rs690_fini()
824 return -EINVAL; in rs690_init()
826 if (rdev->is_atom_bios) { in rs690_init()
831 dev_err(rdev->dev, "Expecting atombios for RV515 GPU\n"); in rs690_init()
832 return -EINVAL; in rs690_init()
836 dev_warn(rdev->dev, in rs690_init()
837 "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", in rs690_init()
843 return -EINVAL; in rs690_init()
846 radeon_get_clock_info(rdev->ddev); in rs690_init()
866 rdev->accel_working = true; in rs690_init()
870 dev_err(rdev->dev, "Disabling GPU acceleration\n"); in rs690_init()
876 rdev->accel_working = false; in rs690_init()