Lines Matching full:backend
35 /* backend <-> TCON muxing selection done in backend */
122 void sun4i_backend_layer_enable(struct sun4i_backend *backend, in sun4i_backend_layer_enable() argument
135 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG, in sun4i_backend_layer_enable()
181 int sun4i_backend_update_layer_coord(struct sun4i_backend *backend, in sun4i_backend_update_layer_coord() argument
191 regmap_write(backend->engine.regs, SUN4I_BACKEND_DISSIZE_REG, in sun4i_backend_update_layer_coord()
199 regmap_write(backend->engine.regs, SUN4I_BACKEND_LAYSIZE_REG(layer), in sun4i_backend_update_layer_coord()
206 regmap_write(backend->engine.regs, SUN4I_BACKEND_LAYCOOR_REG(layer), in sun4i_backend_update_layer_coord()
213 static int sun4i_backend_update_yuv_format(struct sun4i_backend *backend, in sun4i_backend_update_yuv_format() argument
223 regmap_write(backend->engine.regs, in sun4i_backend_update_yuv_format()
231 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer), in sun4i_backend_update_yuv_format()
263 regmap_write(backend->engine.regs, SUN4I_BACKEND_IYUVCTL_REG, val); in sun4i_backend_update_yuv_format()
268 int sun4i_backend_update_layer_formats(struct sun4i_backend *backend, in sun4i_backend_update_layer_formats() argument
278 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer), in sun4i_backend_update_layer_formats()
285 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG, in sun4i_backend_update_layer_formats()
289 DRM_DEBUG_DRIVER("Switching display backend interlaced mode %s\n", in sun4i_backend_update_layer_formats()
295 regmap_update_bits(backend->engine.regs, in sun4i_backend_update_layer_formats()
302 return sun4i_backend_update_yuv_format(backend, layer, plane); in sun4i_backend_update_layer_formats()
310 regmap_update_bits(backend->engine.regs, in sun4i_backend_update_layer_formats()
317 int sun4i_backend_update_layer_frontend(struct sun4i_backend *backend, in sun4i_backend_update_layer_frontend() argument
329 regmap_update_bits(backend->engine.regs, in sun4i_backend_update_layer_frontend()
334 regmap_update_bits(backend->engine.regs, in sun4i_backend_update_layer_frontend()
341 static int sun4i_backend_update_yuv_buffer(struct sun4i_backend *backend, in sun4i_backend_update_yuv_buffer() argument
347 regmap_write(backend->engine.regs, SUN4I_BACKEND_IYUVADD_REG(0), paddr); in sun4i_backend_update_yuv_buffer()
350 regmap_write(backend->engine.regs, SUN4I_BACKEND_IYUVLINEWIDTH_REG(0), in sun4i_backend_update_yuv_buffer()
356 int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend, in sun4i_backend_update_layer_buffer() argument
366 regmap_write(backend->engine.regs, in sun4i_backend_update_layer_buffer()
375 * backend DMA accesses DRAM directly, bypassing the system in sun4i_backend_update_layer_buffer()
382 return sun4i_backend_update_yuv_buffer(backend, fb, paddr); in sun4i_backend_update_layer_buffer()
387 regmap_write(backend->engine.regs, in sun4i_backend_update_layer_buffer()
394 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_LAYFB_H4ADD_REG, in sun4i_backend_update_layer_buffer()
401 int sun4i_backend_update_layer_zpos(struct sun4i_backend *backend, int layer, in sun4i_backend_update_layer_zpos() argument
411 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer), in sun4i_backend_update_layer_zpos()
437 struct sun4i_backend *backend = layer->backend; in sun4i_backend_plane_uses_frontend() local
439 if (IS_ERR(backend->frontend)) in sun4i_backend_plane_uses_frontend()
593 struct sun4i_backend *backend = engine_to_sun4i_backend(engine); in sun4i_backend_vblank_quirk() local
594 struct sun4i_frontend *frontend = backend->frontend; in sun4i_backend_vblank_quirk()
604 * This is due to the fact that the backend will not take into in sun4i_backend_vblank_quirk()
613 spin_lock(&backend->frontend_lock); in sun4i_backend_vblank_quirk()
614 if (backend->frontend_teardown) { in sun4i_backend_vblank_quirk()
616 backend->frontend_teardown = false; in sun4i_backend_vblank_quirk()
618 spin_unlock(&backend->frontend_lock); in sun4i_backend_vblank_quirk()
622 struct sun4i_backend *backend = dev_get_drvdata(dev); in sun4i_backend_init_sat() local
625 backend->sat_reset = devm_reset_control_get(dev, "sat"); in sun4i_backend_init_sat()
626 if (IS_ERR(backend->sat_reset)) { in sun4i_backend_init_sat()
628 return PTR_ERR(backend->sat_reset); in sun4i_backend_init_sat()
631 ret = reset_control_deassert(backend->sat_reset); in sun4i_backend_init_sat()
637 backend->sat_clk = devm_clk_get(dev, "sat"); in sun4i_backend_init_sat()
638 if (IS_ERR(backend->sat_clk)) { in sun4i_backend_init_sat()
640 ret = PTR_ERR(backend->sat_clk); in sun4i_backend_init_sat()
644 ret = clk_prepare_enable(backend->sat_clk); in sun4i_backend_init_sat()
653 reset_control_assert(backend->sat_reset); in sun4i_backend_init_sat()
658 struct sun4i_backend *backend = dev_get_drvdata(dev); in sun4i_backend_free_sat() local
660 clk_disable_unprepare(backend->sat_clk); in sun4i_backend_free_sat()
661 reset_control_assert(backend->sat_reset); in sun4i_backend_free_sat()
667 * The display backend can take video output from the display frontend, or
670 * tree with of_graph, and we use it here to figure out which backend, if
758 struct sun4i_backend *backend; in sun4i_backend_bind() local
764 backend = devm_kzalloc(dev, sizeof(*backend), GFP_KERNEL); in sun4i_backend_bind()
765 if (!backend) in sun4i_backend_bind()
767 dev_set_drvdata(dev, backend); in sun4i_backend_bind()
768 spin_lock_init(&backend->frontend_lock); in sun4i_backend_bind()
770 backend->engine.node = dev->of_node; in sun4i_backend_bind()
771 backend->engine.ops = &sun4i_backend_engine_ops; in sun4i_backend_bind()
772 backend->engine.id = sun4i_backend_of_get_id(dev->of_node); in sun4i_backend_bind()
773 if (backend->engine.id < 0) in sun4i_backend_bind()
774 return backend->engine.id; in sun4i_backend_bind()
776 backend->frontend = sun4i_backend_find_frontend(drv, dev->of_node); in sun4i_backend_bind()
777 if (IS_ERR(backend->frontend)) in sun4i_backend_bind()
785 backend->reset = devm_reset_control_get(dev, NULL); in sun4i_backend_bind()
786 if (IS_ERR(backend->reset)) { in sun4i_backend_bind()
788 return PTR_ERR(backend->reset); in sun4i_backend_bind()
791 ret = reset_control_deassert(backend->reset); in sun4i_backend_bind()
797 backend->bus_clk = devm_clk_get(dev, "ahb"); in sun4i_backend_bind()
798 if (IS_ERR(backend->bus_clk)) { in sun4i_backend_bind()
799 dev_err(dev, "Couldn't get the backend bus clock\n"); in sun4i_backend_bind()
800 ret = PTR_ERR(backend->bus_clk); in sun4i_backend_bind()
803 clk_prepare_enable(backend->bus_clk); in sun4i_backend_bind()
805 backend->mod_clk = devm_clk_get(dev, "mod"); in sun4i_backend_bind()
806 if (IS_ERR(backend->mod_clk)) { in sun4i_backend_bind()
807 dev_err(dev, "Couldn't get the backend module clock\n"); in sun4i_backend_bind()
808 ret = PTR_ERR(backend->mod_clk); in sun4i_backend_bind()
811 clk_prepare_enable(backend->mod_clk); in sun4i_backend_bind()
813 backend->ram_clk = devm_clk_get(dev, "ram"); in sun4i_backend_bind()
814 if (IS_ERR(backend->ram_clk)) { in sun4i_backend_bind()
815 dev_err(dev, "Couldn't get the backend RAM clock\n"); in sun4i_backend_bind()
816 ret = PTR_ERR(backend->ram_clk); in sun4i_backend_bind()
819 clk_prepare_enable(backend->ram_clk); in sun4i_backend_bind()
822 "allwinner,sun8i-a33-display-backend")) { in sun4i_backend_bind()
830 backend->engine.regs = devm_regmap_init_mmio(dev, regs, in sun4i_backend_bind()
832 if (IS_ERR(backend->engine.regs)) { in sun4i_backend_bind()
833 dev_err(dev, "Couldn't create the backend regmap\n"); in sun4i_backend_bind()
834 return PTR_ERR(backend->engine.regs); in sun4i_backend_bind()
837 list_add_tail(&backend->engine.list, &drv->engine_list); in sun4i_backend_bind()
840 * Many of the backend's layer configuration registers have in sun4i_backend_bind()
848 regmap_write(backend->engine.regs, i, 0); in sun4i_backend_bind()
851 regmap_write(backend->engine.regs, SUN4I_BACKEND_REGBUFFCTL_REG, in sun4i_backend_bind()
854 /* Enable the backend */ in sun4i_backend_bind()
855 regmap_write(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG, in sun4i_backend_bind()
864 * and TCONs, so we select the backend with same ID. in sun4i_backend_bind()
872 regmap_update_bits(backend->engine.regs, in sun4i_backend_bind()
875 (backend->engine.id in sun4i_backend_bind()
883 clk_disable_unprepare(backend->ram_clk); in sun4i_backend_bind()
885 clk_disable_unprepare(backend->mod_clk); in sun4i_backend_bind()
887 clk_disable_unprepare(backend->bus_clk); in sun4i_backend_bind()
889 reset_control_assert(backend->reset); in sun4i_backend_bind()
896 struct sun4i_backend *backend = dev_get_drvdata(dev); in sun4i_backend_unbind() local
898 list_del(&backend->engine.list); in sun4i_backend_unbind()
901 "allwinner,sun8i-a33-display-backend")) in sun4i_backend_unbind()
904 clk_disable_unprepare(backend->ram_clk); in sun4i_backend_unbind()
905 clk_disable_unprepare(backend->mod_clk); in sun4i_backend_unbind()
906 clk_disable_unprepare(backend->bus_clk); in sun4i_backend_unbind()
907 reset_control_assert(backend->reset); in sun4i_backend_unbind()
949 .compatible = "allwinner,sun4i-a10-display-backend",
953 .compatible = "allwinner,sun5i-a13-display-backend",
957 .compatible = "allwinner,sun6i-a31-display-backend",
961 .compatible = "allwinner,sun7i-a20-display-backend",
965 .compatible = "allwinner,sun8i-a33-display-backend",
969 .compatible = "allwinner,sun9i-a80-display-backend",
980 .name = "sun4i-backend",
987 MODULE_DESCRIPTION("Allwinner A10 Display Backend Driver");