Lines Matching full:dsi
29 #include "dsi.h"
102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) in tegra_dsi_get_state() argument
104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state()
107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() argument
109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl()
111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl()
116 static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value, in tegra_dsi_writel() argument
119 trace_dsi_writel(dsi->dev, offset, value); in tegra_dsi_writel()
120 writel(value, dsi->regs + (offset << 2)); in tegra_dsi_writel()
202 struct tegra_dsi *dsi = node->info_ent->data; in tegra_dsi_show_regs() local
203 struct drm_crtc *crtc = dsi->output.encoder.crtc; in tegra_dsi_show_regs()
219 offset, tegra_dsi_readl(dsi, offset)); in tegra_dsi_show_regs()
237 struct tegra_dsi *dsi = to_dsi(output); in tegra_dsi_late_register() local
240 dsi->debugfs_files = kmemdup(debugfs_files, sizeof(debugfs_files), in tegra_dsi_late_register()
242 if (!dsi->debugfs_files) in tegra_dsi_late_register()
246 dsi->debugfs_files[i].data = dsi; in tegra_dsi_late_register()
248 err = drm_debugfs_create_files(dsi->debugfs_files, count, root, minor); in tegra_dsi_late_register()
255 kfree(dsi->debugfs_files); in tegra_dsi_late_register()
256 dsi->debugfs_files = NULL; in tegra_dsi_late_register()
265 struct tegra_dsi *dsi = to_dsi(output); in tegra_dsi_early_unregister() local
267 drm_debugfs_remove_files(dsi->debugfs_files, count, in tegra_dsi_early_unregister()
269 kfree(dsi->debugfs_files); in tegra_dsi_early_unregister()
270 dsi->debugfs_files = NULL; in tegra_dsi_early_unregister()
366 static void tegra_dsi_set_phy_timing(struct tegra_dsi *dsi, in tegra_dsi_set_phy_timing() argument
376 tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_0); in tegra_dsi_set_phy_timing()
382 tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_1); in tegra_dsi_set_phy_timing()
387 tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_2); in tegra_dsi_set_phy_timing()
392 tegra_dsi_writel(dsi, value, DSI_BTA_TIMING); in tegra_dsi_set_phy_timing()
394 if (dsi->slave) in tegra_dsi_set_phy_timing()
395 tegra_dsi_set_phy_timing(dsi->slave, period, timing); in tegra_dsi_set_phy_timing()
452 static void tegra_dsi_ganged_enable(struct tegra_dsi *dsi, unsigned int start, in tegra_dsi_ganged_enable() argument
457 tegra_dsi_writel(dsi, start, DSI_GANGED_MODE_START); in tegra_dsi_ganged_enable()
458 tegra_dsi_writel(dsi, size << 16 | size, DSI_GANGED_MODE_SIZE); in tegra_dsi_ganged_enable()
461 tegra_dsi_writel(dsi, value, DSI_GANGED_MODE_CONTROL); in tegra_dsi_ganged_enable()
464 static void tegra_dsi_enable(struct tegra_dsi *dsi) in tegra_dsi_enable() argument
468 value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); in tegra_dsi_enable()
470 tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); in tegra_dsi_enable()
472 if (dsi->slave) in tegra_dsi_enable()
473 tegra_dsi_enable(dsi->slave); in tegra_dsi_enable()
476 static unsigned int tegra_dsi_get_lanes(struct tegra_dsi *dsi) in tegra_dsi_get_lanes() argument
478 if (dsi->master) in tegra_dsi_get_lanes()
479 return dsi->master->lanes + dsi->lanes; in tegra_dsi_get_lanes()
481 if (dsi->slave) in tegra_dsi_get_lanes()
482 return dsi->lanes + dsi->slave->lanes; in tegra_dsi_get_lanes()
484 return dsi->lanes; in tegra_dsi_get_lanes()
487 static void tegra_dsi_configure(struct tegra_dsi *dsi, unsigned int pipe, in tegra_dsi_configure() argument
496 if (dsi->master) in tegra_dsi_configure()
497 state = tegra_dsi_get_state(dsi->master); in tegra_dsi_configure()
499 state = tegra_dsi_get_state(dsi); in tegra_dsi_configure()
504 if (dsi->flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { in tegra_dsi_configure()
507 } else if (dsi->flags & MIPI_DSI_MODE_VIDEO) { in tegra_dsi_configure()
517 DSI_CONTROL_LANES(dsi->lanes - 1) | in tegra_dsi_configure()
519 tegra_dsi_writel(dsi, value, DSI_CONTROL); in tegra_dsi_configure()
521 tegra_dsi_writel(dsi, dsi->video_fifo_depth, DSI_MAX_THRESHOLD); in tegra_dsi_configure()
524 tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL); in tegra_dsi_configure()
526 value = tegra_dsi_readl(dsi, DSI_CONTROL); in tegra_dsi_configure()
528 if (dsi->flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) in tegra_dsi_configure()
534 if (dsi->flags & MIPI_DSI_MODE_VIDEO) in tegra_dsi_configure()
541 tegra_dsi_writel(dsi, value, DSI_CONTROL); in tegra_dsi_configure()
544 tegra_dsi_writel(dsi, pkt_seq[i], DSI_PKT_SEQ_0_LO + i); in tegra_dsi_configure()
546 if (dsi->flags & MIPI_DSI_MODE_VIDEO) { in tegra_dsi_configure()
556 if ((dsi->flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) == 0) in tegra_dsi_configure()
567 tegra_dsi_writel(dsi, hsw << 16 | 0, DSI_PKT_LEN_0_1); in tegra_dsi_configure()
568 tegra_dsi_writel(dsi, hact << 16 | hbp, DSI_PKT_LEN_2_3); in tegra_dsi_configure()
569 tegra_dsi_writel(dsi, hfp, DSI_PKT_LEN_4_5); in tegra_dsi_configure()
570 tegra_dsi_writel(dsi, 0x0f0f << 16, DSI_PKT_LEN_6_7); in tegra_dsi_configure()
573 tegra_dsi_writel(dsi, 8 * mul / div, DSI_SOL_DELAY); in tegra_dsi_configure()
579 if (dsi->master || dsi->slave) { in tegra_dsi_configure()
589 tegra_dsi_writel(dsi, 0, DSI_PKT_LEN_0_1); in tegra_dsi_configure()
590 tegra_dsi_writel(dsi, bytes << 16, DSI_PKT_LEN_2_3); in tegra_dsi_configure()
591 tegra_dsi_writel(dsi, bytes << 16, DSI_PKT_LEN_4_5); in tegra_dsi_configure()
592 tegra_dsi_writel(dsi, 0, DSI_PKT_LEN_6_7); in tegra_dsi_configure()
596 tegra_dsi_writel(dsi, value, DSI_DCS_CMDS); in tegra_dsi_configure()
599 if (dsi->master || dsi->slave) { in tegra_dsi_configure()
617 tegra_dsi_writel(dsi, value, DSI_SOL_DELAY); in tegra_dsi_configure()
620 if (dsi->slave) { in tegra_dsi_configure()
621 tegra_dsi_configure(dsi->slave, pipe, mode); in tegra_dsi_configure()
627 tegra_dsi_ganged_enable(dsi, 0, mode->hdisplay / 2); in tegra_dsi_configure()
628 tegra_dsi_ganged_enable(dsi->slave, mode->hdisplay / 2, in tegra_dsi_configure()
633 static int tegra_dsi_wait_idle(struct tegra_dsi *dsi, unsigned long timeout) in tegra_dsi_wait_idle() argument
640 value = tegra_dsi_readl(dsi, DSI_STATUS); in tegra_dsi_wait_idle()
650 static void tegra_dsi_video_disable(struct tegra_dsi *dsi) in tegra_dsi_video_disable() argument
654 value = tegra_dsi_readl(dsi, DSI_CONTROL); in tegra_dsi_video_disable()
656 tegra_dsi_writel(dsi, value, DSI_CONTROL); in tegra_dsi_video_disable()
658 if (dsi->slave) in tegra_dsi_video_disable()
659 tegra_dsi_video_disable(dsi->slave); in tegra_dsi_video_disable()
662 static void tegra_dsi_ganged_disable(struct tegra_dsi *dsi) in tegra_dsi_ganged_disable() argument
664 tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_START); in tegra_dsi_ganged_disable()
665 tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_SIZE); in tegra_dsi_ganged_disable()
666 tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_CONTROL); in tegra_dsi_ganged_disable()
669 static int tegra_dsi_pad_enable(struct tegra_dsi *dsi) in tegra_dsi_pad_enable() argument
674 tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_0); in tegra_dsi_pad_enable()
679 static int tegra_dsi_pad_calibrate(struct tegra_dsi *dsi) in tegra_dsi_pad_calibrate() argument
687 tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_0); in tegra_dsi_pad_calibrate()
688 tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_1); in tegra_dsi_pad_calibrate()
689 tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_2); in tegra_dsi_pad_calibrate()
690 tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_3); in tegra_dsi_pad_calibrate()
691 tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_4); in tegra_dsi_pad_calibrate()
694 tegra_dsi_pad_enable(dsi); in tegra_dsi_pad_calibrate()
699 tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_2); in tegra_dsi_pad_calibrate()
703 tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_3); in tegra_dsi_pad_calibrate()
705 return tegra_mipi_calibrate(dsi->mipi); in tegra_dsi_pad_calibrate()
708 static void tegra_dsi_set_timeout(struct tegra_dsi *dsi, unsigned long bclk, in tegra_dsi_set_timeout() argument
717 tegra_dsi_writel(dsi, value, DSI_TIMEOUT_0); in tegra_dsi_set_timeout()
722 tegra_dsi_writel(dsi, value, DSI_TIMEOUT_1); in tegra_dsi_set_timeout()
725 tegra_dsi_writel(dsi, value, DSI_TO_TALLY); in tegra_dsi_set_timeout()
727 if (dsi->slave) in tegra_dsi_set_timeout()
728 tegra_dsi_set_timeout(dsi->slave, bclk, vrefresh); in tegra_dsi_set_timeout()
731 static void tegra_dsi_disable(struct tegra_dsi *dsi) in tegra_dsi_disable() argument
735 if (dsi->slave) { in tegra_dsi_disable()
736 tegra_dsi_ganged_disable(dsi->slave); in tegra_dsi_disable()
737 tegra_dsi_ganged_disable(dsi); in tegra_dsi_disable()
740 value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); in tegra_dsi_disable()
742 tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); in tegra_dsi_disable()
744 if (dsi->slave) in tegra_dsi_disable()
745 tegra_dsi_disable(dsi->slave); in tegra_dsi_disable()
750 static void tegra_dsi_soft_reset(struct tegra_dsi *dsi) in tegra_dsi_soft_reset() argument
754 value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); in tegra_dsi_soft_reset()
756 tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); in tegra_dsi_soft_reset()
760 value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); in tegra_dsi_soft_reset()
762 tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); in tegra_dsi_soft_reset()
766 value = tegra_dsi_readl(dsi, DSI_TRIGGER); in tegra_dsi_soft_reset()
768 tegra_dsi_writel(dsi, 0, DSI_TRIGGER); in tegra_dsi_soft_reset()
770 if (dsi->slave) in tegra_dsi_soft_reset()
771 tegra_dsi_soft_reset(dsi->slave); in tegra_dsi_soft_reset()
832 static void tegra_dsi_unprepare(struct tegra_dsi *dsi) in tegra_dsi_unprepare() argument
836 if (dsi->slave) in tegra_dsi_unprepare()
837 tegra_dsi_unprepare(dsi->slave); in tegra_dsi_unprepare()
839 err = tegra_mipi_disable(dsi->mipi); in tegra_dsi_unprepare()
841 dev_err(dsi->dev, "failed to disable MIPI calibration: %d\n", in tegra_dsi_unprepare()
844 pm_runtime_put(dsi->dev); in tegra_dsi_unprepare()
851 struct tegra_dsi *dsi = to_dsi(output); in tegra_dsi_encoder_disable() local
858 tegra_dsi_video_disable(dsi); in tegra_dsi_encoder_disable()
872 err = tegra_dsi_wait_idle(dsi, 100); in tegra_dsi_encoder_disable()
874 dev_dbg(dsi->dev, "failed to idle DSI: %d\n", err); in tegra_dsi_encoder_disable()
876 tegra_dsi_soft_reset(dsi); in tegra_dsi_encoder_disable()
881 tegra_dsi_disable(dsi); in tegra_dsi_encoder_disable()
883 tegra_dsi_unprepare(dsi); in tegra_dsi_encoder_disable()
886 static void tegra_dsi_prepare(struct tegra_dsi *dsi) in tegra_dsi_prepare() argument
890 pm_runtime_get_sync(dsi->dev); in tegra_dsi_prepare()
892 err = tegra_mipi_enable(dsi->mipi); in tegra_dsi_prepare()
894 dev_err(dsi->dev, "failed to enable MIPI calibration: %d\n", in tegra_dsi_prepare()
897 err = tegra_dsi_pad_calibrate(dsi); in tegra_dsi_prepare()
899 dev_err(dsi->dev, "MIPI calibration failed: %d\n", err); in tegra_dsi_prepare()
901 if (dsi->slave) in tegra_dsi_prepare()
902 tegra_dsi_prepare(dsi->slave); in tegra_dsi_prepare()
910 struct tegra_dsi *dsi = to_dsi(output); in tegra_dsi_encoder_enable() local
914 tegra_dsi_prepare(dsi); in tegra_dsi_encoder_enable()
916 state = tegra_dsi_get_state(dsi); in tegra_dsi_encoder_enable()
918 tegra_dsi_set_timeout(dsi, state->bclk, state->vrefresh); in tegra_dsi_encoder_enable()
924 tegra_dsi_set_phy_timing(dsi, state->period * 8, &state->timing); in tegra_dsi_encoder_enable()
929 tegra_dsi_configure(dsi, dc->pipe, mode); in tegra_dsi_encoder_enable()
938 /* enable DSI controller */ in tegra_dsi_encoder_enable()
939 tegra_dsi_enable(dsi); in tegra_dsi_encoder_enable()
953 struct tegra_dsi *dsi = to_dsi(output); in tegra_dsi_encoder_atomic_check() local
960 err = tegra_dsi_get_muldiv(dsi->format, &state->mul, &state->div); in tegra_dsi_encoder_atomic_check()
964 state->lanes = tegra_dsi_get_lanes(dsi); in tegra_dsi_encoder_atomic_check()
966 err = tegra_dsi_get_format(dsi->format, &state->format); in tegra_dsi_encoder_atomic_check()
993 dev_err(dsi->dev, "failed to validate D-PHY timing: %d\n", err); in tegra_dsi_encoder_atomic_check()
1016 err = tegra_dc_state_setup_clock(dc, crtc_state, dsi->clk_parent, in tegra_dsi_encoder_atomic_check()
1035 struct tegra_dsi *dsi = host1x_client_to_dsi(client); in tegra_dsi_init() local
1039 if (!dsi->master) { in tegra_dsi_init()
1040 dsi->output.dev = client->dev; in tegra_dsi_init()
1042 drm_connector_init(drm, &dsi->output.connector, in tegra_dsi_init()
1045 drm_connector_helper_add(&dsi->output.connector, in tegra_dsi_init()
1047 dsi->output.connector.dpms = DRM_MODE_DPMS_OFF; in tegra_dsi_init()
1049 drm_encoder_init(drm, &dsi->output.encoder, in tegra_dsi_init()
1052 drm_encoder_helper_add(&dsi->output.encoder, in tegra_dsi_init()
1055 drm_connector_attach_encoder(&dsi->output.connector, in tegra_dsi_init()
1056 &dsi->output.encoder); in tegra_dsi_init()
1057 drm_connector_register(&dsi->output.connector); in tegra_dsi_init()
1059 err = tegra_output_init(drm, &dsi->output); in tegra_dsi_init()
1061 dev_err(dsi->dev, "failed to initialize output: %d\n", in tegra_dsi_init()
1064 dsi->output.encoder.possible_crtcs = 0x3; in tegra_dsi_init()
1072 struct tegra_dsi *dsi = host1x_client_to_dsi(client); in tegra_dsi_exit() local
1074 tegra_output_exit(&dsi->output); in tegra_dsi_exit()
1084 static int tegra_dsi_setup_clocks(struct tegra_dsi *dsi) in tegra_dsi_setup_clocks() argument
1089 parent = clk_get_parent(dsi->clk); in tegra_dsi_setup_clocks()
1093 err = clk_set_parent(parent, dsi->clk_parent); in tegra_dsi_setup_clocks()
1112 "DSI Data Type Not Recognized",
1113 "DSI VC ID Invalid",
1116 "DSI Protocol Violation",
1119 static ssize_t tegra_dsi_read_response(struct tegra_dsi *dsi, in tegra_dsi_read_response() argument
1130 value = tegra_dsi_readl(dsi, DSI_RD_DATA); in tegra_dsi_read_response()
1135 dev_dbg(dsi->dev, "Acknowledge and error report: %04x\n", in tegra_dsi_read_response()
1139 dev_dbg(dsi->dev, " %2u: %s\n", i, in tegra_dsi_read_response()
1163 dev_err(dsi->dev, "unhandled response type: %02x\n", in tegra_dsi_read_response()
1174 value = tegra_dsi_readl(dsi, DSI_RD_DATA); in tegra_dsi_read_response()
1184 static int tegra_dsi_transmit(struct tegra_dsi *dsi, unsigned long timeout) in tegra_dsi_transmit() argument
1186 tegra_dsi_writel(dsi, DSI_TRIGGER_HOST, DSI_TRIGGER); in tegra_dsi_transmit()
1191 u32 value = tegra_dsi_readl(dsi, DSI_TRIGGER); in tegra_dsi_transmit()
1202 static int tegra_dsi_wait_for_response(struct tegra_dsi *dsi, in tegra_dsi_wait_for_response() argument
1208 u32 value = tegra_dsi_readl(dsi, DSI_STATUS); in tegra_dsi_wait_for_response()
1221 static void tegra_dsi_writesl(struct tegra_dsi *dsi, unsigned long offset, in tegra_dsi_writesl() argument
1234 tegra_dsi_writel(dsi, value, DSI_WR_DATA); in tegra_dsi_writesl()
1241 struct tegra_dsi *dsi = host_to_tegra(host); in tegra_dsi_host_transfer() local
1255 if (packet.size > dsi->video_fifo_depth * 4) in tegra_dsi_host_transfer()
1259 value = tegra_dsi_readl(dsi, DSI_STATUS); in tegra_dsi_host_transfer()
1262 tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL); in tegra_dsi_host_transfer()
1266 value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); in tegra_dsi_host_transfer()
1268 tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); in tegra_dsi_host_transfer()
1282 if (packet.size > dsi->host_fifo_depth * 4) in tegra_dsi_host_transfer()
1285 tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL); in tegra_dsi_host_transfer()
1293 value = tegra_dsi_readl(dsi, DSI_HOST_CONTROL); in tegra_dsi_host_transfer()
1295 tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL); in tegra_dsi_host_transfer()
1299 tegra_dsi_writel(dsi, value, DSI_CONTROL); in tegra_dsi_host_transfer()
1303 tegra_dsi_writel(dsi, value, DSI_WR_DATA); in tegra_dsi_host_transfer()
1307 tegra_dsi_writesl(dsi, DSI_WR_DATA, packet.payload, in tegra_dsi_host_transfer()
1310 err = tegra_dsi_transmit(dsi, 250); in tegra_dsi_host_transfer()
1316 err = tegra_dsi_wait_for_response(dsi, 250); in tegra_dsi_host_transfer()
1322 value = tegra_dsi_readl(dsi, DSI_RD_DATA); in tegra_dsi_host_transfer()
1326 dev_dbg(dsi->dev, "ACK\n"); in tegra_dsi_host_transfer()
1332 dev_dbg(dsi->dev, "ESCAPE\n"); in tegra_dsi_host_transfer()
1337 dev_err(dsi->dev, "unknown status: %08x\n", value); in tegra_dsi_host_transfer()
1342 err = tegra_dsi_read_response(dsi, msg, count); in tegra_dsi_host_transfer()
1344 dev_err(dsi->dev, in tegra_dsi_host_transfer()
1366 static int tegra_dsi_ganged_setup(struct tegra_dsi *dsi) in tegra_dsi_ganged_setup() argument
1371 /* make sure both DSI controllers share the same PLL */ in tegra_dsi_ganged_setup()
1372 parent = clk_get_parent(dsi->slave->clk); in tegra_dsi_ganged_setup()
1376 err = clk_set_parent(parent, dsi->clk_parent); in tegra_dsi_ganged_setup()
1386 struct tegra_dsi *dsi = host_to_tegra(host); in tegra_dsi_host_attach() local
1388 dsi->flags = device->mode_flags; in tegra_dsi_host_attach()
1389 dsi->format = device->format; in tegra_dsi_host_attach()
1390 dsi->lanes = device->lanes; in tegra_dsi_host_attach()
1392 if (dsi->slave) { in tegra_dsi_host_attach()
1395 dev_dbg(dsi->dev, "attaching dual-channel device %s\n", in tegra_dsi_host_attach()
1398 err = tegra_dsi_ganged_setup(dsi); in tegra_dsi_host_attach()
1400 dev_err(dsi->dev, "failed to set up ganged mode: %d\n", in tegra_dsi_host_attach()
1410 if (!dsi->master) { in tegra_dsi_host_attach()
1411 struct tegra_output *output = &dsi->output; in tegra_dsi_host_attach()
1429 struct tegra_dsi *dsi = host_to_tegra(host); in tegra_dsi_host_detach() local
1430 struct tegra_output *output = &dsi->output; in tegra_dsi_host_detach()
1448 static int tegra_dsi_ganged_probe(struct tegra_dsi *dsi) in tegra_dsi_ganged_probe() argument
1452 np = of_parse_phandle(dsi->dev->of_node, "nvidia,ganged-mode", 0); in tegra_dsi_ganged_probe()
1456 dsi->slave = platform_get_drvdata(gangster); in tegra_dsi_ganged_probe()
1459 if (!dsi->slave) in tegra_dsi_ganged_probe()
1462 dsi->slave->master = dsi; in tegra_dsi_ganged_probe()
1470 struct tegra_dsi *dsi; in tegra_dsi_probe() local
1474 dsi = devm_kzalloc(&pdev->dev, sizeof(*dsi), GFP_KERNEL); in tegra_dsi_probe()
1475 if (!dsi) in tegra_dsi_probe()
1478 dsi->output.dev = dsi->dev = &pdev->dev; in tegra_dsi_probe()
1479 dsi->video_fifo_depth = 1920; in tegra_dsi_probe()
1480 dsi->host_fifo_depth = 64; in tegra_dsi_probe()
1482 err = tegra_dsi_ganged_probe(dsi); in tegra_dsi_probe()
1486 err = tegra_output_probe(&dsi->output); in tegra_dsi_probe()
1490 dsi->output.connector.polled = DRM_CONNECTOR_POLL_HPD; in tegra_dsi_probe()
1493 * Assume these values by default. When a DSI peripheral driver in tegra_dsi_probe()
1494 * attaches to the DSI host, the parameters will be taken from in tegra_dsi_probe()
1497 dsi->flags = MIPI_DSI_MODE_VIDEO; in tegra_dsi_probe()
1498 dsi->format = MIPI_DSI_FMT_RGB888; in tegra_dsi_probe()
1499 dsi->lanes = 4; in tegra_dsi_probe()
1502 dsi->rst = devm_reset_control_get(&pdev->dev, "dsi"); in tegra_dsi_probe()
1503 if (IS_ERR(dsi->rst)) in tegra_dsi_probe()
1504 return PTR_ERR(dsi->rst); in tegra_dsi_probe()
1507 dsi->clk = devm_clk_get(&pdev->dev, NULL); in tegra_dsi_probe()
1508 if (IS_ERR(dsi->clk)) { in tegra_dsi_probe()
1509 dev_err(&pdev->dev, "cannot get DSI clock\n"); in tegra_dsi_probe()
1510 return PTR_ERR(dsi->clk); in tegra_dsi_probe()
1513 dsi->clk_lp = devm_clk_get(&pdev->dev, "lp"); in tegra_dsi_probe()
1514 if (IS_ERR(dsi->clk_lp)) { in tegra_dsi_probe()
1516 return PTR_ERR(dsi->clk_lp); in tegra_dsi_probe()
1519 dsi->clk_parent = devm_clk_get(&pdev->dev, "parent"); in tegra_dsi_probe()
1520 if (IS_ERR(dsi->clk_parent)) { in tegra_dsi_probe()
1522 return PTR_ERR(dsi->clk_parent); in tegra_dsi_probe()
1525 dsi->vdd = devm_regulator_get(&pdev->dev, "avdd-dsi-csi"); in tegra_dsi_probe()
1526 if (IS_ERR(dsi->vdd)) { in tegra_dsi_probe()
1528 return PTR_ERR(dsi->vdd); in tegra_dsi_probe()
1531 err = tegra_dsi_setup_clocks(dsi); in tegra_dsi_probe()
1538 dsi->regs = devm_ioremap_resource(&pdev->dev, regs); in tegra_dsi_probe()
1539 if (IS_ERR(dsi->regs)) in tegra_dsi_probe()
1540 return PTR_ERR(dsi->regs); in tegra_dsi_probe()
1542 dsi->mipi = tegra_mipi_request(&pdev->dev); in tegra_dsi_probe()
1543 if (IS_ERR(dsi->mipi)) in tegra_dsi_probe()
1544 return PTR_ERR(dsi->mipi); in tegra_dsi_probe()
1546 dsi->host.ops = &tegra_dsi_host_ops; in tegra_dsi_probe()
1547 dsi->host.dev = &pdev->dev; in tegra_dsi_probe()
1549 err = mipi_dsi_host_register(&dsi->host); in tegra_dsi_probe()
1551 dev_err(&pdev->dev, "failed to register DSI host: %d\n", err); in tegra_dsi_probe()
1555 platform_set_drvdata(pdev, dsi); in tegra_dsi_probe()
1558 INIT_LIST_HEAD(&dsi->client.list); in tegra_dsi_probe()
1559 dsi->client.ops = &dsi_client_ops; in tegra_dsi_probe()
1560 dsi->client.dev = &pdev->dev; in tegra_dsi_probe()
1562 err = host1x_client_register(&dsi->client); in tegra_dsi_probe()
1572 mipi_dsi_host_unregister(&dsi->host); in tegra_dsi_probe()
1574 tegra_mipi_free(dsi->mipi); in tegra_dsi_probe()
1580 struct tegra_dsi *dsi = platform_get_drvdata(pdev); in tegra_dsi_remove() local
1585 err = host1x_client_unregister(&dsi->client); in tegra_dsi_remove()
1592 tegra_output_remove(&dsi->output); in tegra_dsi_remove()
1594 mipi_dsi_host_unregister(&dsi->host); in tegra_dsi_remove()
1595 tegra_mipi_free(dsi->mipi); in tegra_dsi_remove()
1603 struct tegra_dsi *dsi = dev_get_drvdata(dev); in tegra_dsi_suspend() local
1606 if (dsi->rst) { in tegra_dsi_suspend()
1607 err = reset_control_assert(dsi->rst); in tegra_dsi_suspend()
1616 clk_disable_unprepare(dsi->clk_lp); in tegra_dsi_suspend()
1617 clk_disable_unprepare(dsi->clk); in tegra_dsi_suspend()
1619 regulator_disable(dsi->vdd); in tegra_dsi_suspend()
1626 struct tegra_dsi *dsi = dev_get_drvdata(dev); in tegra_dsi_resume() local
1629 err = regulator_enable(dsi->vdd); in tegra_dsi_resume()
1631 dev_err(dsi->dev, "failed to enable VDD supply: %d\n", err); in tegra_dsi_resume()
1635 err = clk_prepare_enable(dsi->clk); in tegra_dsi_resume()
1637 dev_err(dev, "cannot enable DSI clock: %d\n", err); in tegra_dsi_resume()
1641 err = clk_prepare_enable(dsi->clk_lp); in tegra_dsi_resume()
1649 if (dsi->rst) { in tegra_dsi_resume()
1650 err = reset_control_deassert(dsi->rst); in tegra_dsi_resume()
1660 clk_disable_unprepare(dsi->clk_lp); in tegra_dsi_resume()
1662 clk_disable_unprepare(dsi->clk); in tegra_dsi_resume()
1664 regulator_disable(dsi->vdd); in tegra_dsi_resume()
1674 { .compatible = "nvidia,tegra210-dsi", },
1675 { .compatible = "nvidia,tegra132-dsi", },
1676 { .compatible = "nvidia,tegra124-dsi", },
1677 { .compatible = "nvidia,tegra114-dsi", },
1684 .name = "tegra-dsi",