Lines Matching +full:0 +full:x00100
14 WARN_ON((fieldval & ~field##_MASK) != 0); \
23 #define V3D_HUB_AXICFG 0x00000
24 # define V3D_HUB_AXICFG_MAX_LEN_MASK V3D_MASK(3, 0)
25 # define V3D_HUB_AXICFG_MAX_LEN_SHIFT 0
26 #define V3D_HUB_UIFCFG 0x00004
27 #define V3D_HUB_IDENT0 0x00008
29 #define V3D_HUB_IDENT1 0x0000c
40 # define V3D_HUB_IDENT1_TVER_MASK V3D_MASK(3, 0)
41 # define V3D_HUB_IDENT1_TVER_SHIFT 0
43 #define V3D_HUB_IDENT2 0x00010
45 # define V3D_HUB_IDENT2_L3C_NKB_MASK V3D_MASK(7, 0)
46 # define V3D_HUB_IDENT2_L3C_NKB_SHIFT 0
48 #define V3D_HUB_IDENT3 0x00014
51 # define V3D_HUB_IDENT3_IPIDX_MASK V3D_MASK(7, 0)
52 # define V3D_HUB_IDENT3_IPIDX_SHIFT 0
54 #define V3D_HUB_INT_STS 0x00050
55 #define V3D_HUB_INT_SET 0x00054
56 #define V3D_HUB_INT_CLR 0x00058
57 #define V3D_HUB_INT_MSK_STS 0x0005c
58 #define V3D_HUB_INT_MSK_SET 0x00060
59 #define V3D_HUB_INT_MSK_CLR 0x00064
65 # define V3D_HUB_INT_TFUF BIT(0)
67 #define V3D_GCA_CACHE_CTRL 0x0000c
68 # define V3D_GCA_CACHE_CTRL_FLUSH BIT(0)
70 #define V3D_GCA_SAFE_SHUTDOWN 0x000b0
71 # define V3D_GCA_SAFE_SHUTDOWN_EN BIT(0)
73 #define V3D_GCA_SAFE_SHUTDOWN_ACK 0x000b4
76 # define V3D_TOP_GR_BRIDGE_REVISION 0x00000
79 # define V3D_TOP_GR_BRIDGE_MINOR_MASK V3D_MASK(7, 0)
80 # define V3D_TOP_GR_BRIDGE_MINOR_SHIFT 0
83 # define V3D_TOP_GR_BRIDGE_SW_INIT_0 0x00008
84 # define V3D_TOP_GR_BRIDGE_SW_INIT_0_V3D_CLK_108_SW_INIT BIT(0)
86 # define V3D_TOP_GR_BRIDGE_SW_INIT_1 0x0000c
87 # define V3D_TOP_GR_BRIDGE_SW_INIT_1_V3D_CLK_108_SW_INIT BIT(0)
91 #define V3D_MMUC_CONTROL 0x01000
95 # define V3D_MMUC_CONTROL_ENABLE BIT(0)
97 #define V3D_MMU_CTL 0x01200
114 # define V3D_MMU_CTL_ENABLE BIT(0)
116 #define V3D_MMU_PT_PA_BASE 0x01204
117 #define V3D_MMU_HIT 0x01208
118 #define V3D_MMU_MISSES 0x0120c
119 #define V3D_MMU_STALLS 0x01210
121 #define V3D_MMU_ADDR_CAP 0x01214
123 # define V3D_MMU_ADDR_CAP_MPAGE_MASK V3D_MASK(11, 0)
124 # define V3D_MMU_ADDR_CAP_MPAGE_SHIFT 0
126 #define V3D_MMU_SHOOT_DOWN 0x01218
129 # define V3D_MMU_SHOOT_DOWN_PAGE_MASK V3D_MASK(27, 0)
130 # define V3D_MMU_SHOOT_DOWN_PAGE_SHIFT 0
132 #define V3D_MMU_BYPASS_START 0x0121c
133 #define V3D_MMU_BYPASS_END 0x01220
136 #define V3D_MMU_VIO_ID 0x0122c
139 #define V3D_MMU_ILLEGAL_ADDR 0x01230
143 #define V3D_MMU_VIO_ADDR 0x01234
147 #define V3D_CTL_IDENT0 0x00000
151 #define V3D_CTL_IDENT1 0x00004
163 # define V3D_IDENT1_REV_MASK V3D_MASK(3, 0)
164 # define V3D_IDENT1_REV_SHIFT 0
166 #define V3D_CTL_IDENT2 0x00008
169 #define V3D_CTL_MISCCFG 0x00018
170 # define V3D_MISCCFG_OVRTMUOUT BIT(0)
172 #define V3D_CTL_L2CACTL 0x00020
175 # define V3D_L2CACTL_L2CENA BIT(0)
177 #define V3D_CTL_SLCACTL 0x00024
184 # define V3D_SLCACTL_ICC_MASK V3D_MASK(3, 0)
185 # define V3D_SLCACTL_ICC_SHIFT 0
187 #define V3D_CTL_L2TCACTL 0x00030
190 # define V3D_L2TCACTL_FLM_FLUSH 0
195 # define V3D_L2TCACTL_L2TFLS BIT(0)
196 #define V3D_CTL_L2TFLSTA 0x00034
197 #define V3D_CTL_L2TFLEND 0x00038
199 #define V3D_CTL_INT_STS 0x00050
200 #define V3D_CTL_INT_SET 0x00054
201 #define V3D_CTL_INT_CLR 0x00058
202 #define V3D_CTL_INT_MSK_STS 0x0005c
203 #define V3D_CTL_INT_MSK_SET 0x00060
204 #define V3D_CTL_INT_MSK_CLR 0x00064
212 # define V3D_INT_FRDONE BIT(0)
214 #define V3D_CLE_CT0CS 0x00100
215 #define V3D_CLE_CT1CS 0x00104
217 #define V3D_CLE_CT0EA 0x00108
218 #define V3D_CLE_CT1EA 0x0010c
220 #define V3D_CLE_CT0CA 0x00110
221 #define V3D_CLE_CT1CA 0x00114
223 #define V3D_CLE_CT0RA 0x00118
224 #define V3D_CLE_CT1RA 0x0011c
226 #define V3D_CLE_CT0LC 0x00120
227 #define V3D_CLE_CT1LC 0x00124
228 #define V3D_CLE_CT0PC 0x00128
229 #define V3D_CLE_CT1PC 0x0012c
230 #define V3D_CLE_PCS 0x00130
231 #define V3D_CLE_BFC 0x00134
232 #define V3D_CLE_RFC 0x00138
233 #define V3D_CLE_TFBC 0x0013c
234 #define V3D_CLE_TFIT 0x00140
235 #define V3D_CLE_CT1CFG 0x00144
236 #define V3D_CLE_CT1TILECT 0x00148
237 #define V3D_CLE_CT1TSKIP 0x0014c
238 #define V3D_CLE_CT1PTCT 0x00150
239 #define V3D_CLE_CT0SYNC 0x00154
240 #define V3D_CLE_CT1SYNC 0x00158
241 #define V3D_CLE_CT0QTS 0x0015c
243 #define V3D_CLE_CT0QBA 0x00160
244 #define V3D_CLE_CT1QBA 0x00164
246 #define V3D_CLE_CT0QEA 0x00168
247 #define V3D_CLE_CT1QEA 0x0016c
249 #define V3D_CLE_CT0QMA 0x00170
250 #define V3D_CLE_CT0QMS 0x00174
251 #define V3D_CLE_CT1QCFG 0x00178
259 # define V3D_CLE_QCFG_MCDIS BIT(0)
261 #define V3D_PTB_BPCA 0x00300
262 #define V3D_PTB_BPCS 0x00304
263 #define V3D_PTB_BPOA 0x00308
264 #define V3D_PTB_BPOS 0x0030c
266 #define V3D_PTB_BXCF 0x00310
268 # define V3D_PTB_BXCF_CLIPDISA BIT(0)
270 #define V3D_GMP_STATUS 0x00800
281 # define V3D_GMP_STATUS_VIO BIT(0)
283 #define V3D_GMP_CFG 0x00804
287 # define V3D_GMP_CFG_PROT_ENABLE BIT(0)
289 #define V3D_GMP_VIO_ADDR 0x00808
290 #define V3D_GMP_VIO_TYPE 0x0080c
291 #define V3D_GMP_TABLE_ADDR 0x00810
292 #define V3D_GMP_CLEAR_LOAD 0x00814
293 #define V3D_GMP_PRESERVE_LOAD 0x00818
294 #define V3D_GMP_VALID_LINES 0x00820