Lines Matching +full:8 +full:- +full:ch
3 * Copyright 2005-2012 Freescale Semiconductor, Inc. All Rights Reserved.
9 * http://www.opensource.org/licenses/gpl-license.html
17 #include "ipu-prv.h"
36 #define IPU_CPMEM_WORD(word, ofs, size) ((((word) * 160 + (ofs)) << 8) | (size))
99 ipu_get_cpmem(struct ipuv3_channel *ch) in ipu_get_cpmem() argument
101 struct ipu_cpmem *cpmem = ch->ipu->cpmem_priv; in ipu_get_cpmem()
103 return cpmem->base + ch->num; in ipu_get_cpmem()
106 static void ipu_ch_param_write_field(struct ipuv3_channel *ch, u32 wbs, u32 v) in ipu_ch_param_write_field() argument
108 struct ipu_ch_param __iomem *base = ipu_get_cpmem(ch); in ipu_ch_param_write_field()
109 u32 bit = (wbs >> 8) % 160; in ipu_ch_param_write_field()
111 u32 word = (wbs >> 8) / 160; in ipu_ch_param_write_field()
114 u32 mask = (1 << size) - 1; in ipu_ch_param_write_field()
119 val = readl(&base->word[word].data[i]); in ipu_ch_param_write_field()
122 writel(val, &base->word[word].data[i]); in ipu_ch_param_write_field()
124 if ((bit + size - 1) / 32 > i) { in ipu_ch_param_write_field()
125 val = readl(&base->word[word].data[i + 1]); in ipu_ch_param_write_field()
126 val &= ~(mask >> (ofs ? (32 - ofs) : 0)); in ipu_ch_param_write_field()
127 val |= v >> (ofs ? (32 - ofs) : 0); in ipu_ch_param_write_field()
128 writel(val, &base->word[word].data[i + 1]); in ipu_ch_param_write_field()
132 static u32 ipu_ch_param_read_field(struct ipuv3_channel *ch, u32 wbs) in ipu_ch_param_read_field() argument
134 struct ipu_ch_param __iomem *base = ipu_get_cpmem(ch); in ipu_ch_param_read_field()
135 u32 bit = (wbs >> 8) % 160; in ipu_ch_param_read_field()
137 u32 word = (wbs >> 8) / 160; in ipu_ch_param_read_field()
140 u32 mask = (1 << size) - 1; in ipu_ch_param_read_field()
145 val = (readl(&base->word[word].data[i]) >> ofs) & mask; in ipu_ch_param_read_field()
147 if ((bit + size - 1) / 32 > i) { in ipu_ch_param_read_field()
150 tmp = readl(&base->word[word].data[i + 1]); in ipu_ch_param_read_field()
151 tmp &= mask >> (ofs ? (32 - ofs) : 0); in ipu_ch_param_read_field()
152 val |= tmp << (ofs ? (32 - ofs) : 0); in ipu_ch_param_read_field()
160 * point of view of the IPU corresponds to little-endian words with the first
165 * https://linuxtv.org/downloads/v4l-dvb-apis/packed-rgb.html
174 * little-endian 16-bit word with the red component at the most in v4l2_pix_fmt_to_drm_fourcc()
213 return -EINVAL; in v4l2_pix_fmt_to_drm_fourcc()
216 void ipu_cpmem_zero(struct ipuv3_channel *ch) in ipu_cpmem_zero() argument
218 struct ipu_ch_param __iomem *p = ipu_get_cpmem(ch); in ipu_cpmem_zero()
227 void ipu_cpmem_set_resolution(struct ipuv3_channel *ch, int xres, int yres) in ipu_cpmem_set_resolution() argument
229 ipu_ch_param_write_field(ch, IPU_FIELD_FW, xres - 1); in ipu_cpmem_set_resolution()
230 ipu_ch_param_write_field(ch, IPU_FIELD_FH, yres - 1); in ipu_cpmem_set_resolution()
234 void ipu_cpmem_skip_odd_chroma_rows(struct ipuv3_channel *ch) in ipu_cpmem_skip_odd_chroma_rows() argument
236 ipu_ch_param_write_field(ch, IPU_FIELD_RDRW, 1); in ipu_cpmem_skip_odd_chroma_rows()
240 void ipu_cpmem_set_stride(struct ipuv3_channel *ch, int stride) in ipu_cpmem_set_stride() argument
242 ipu_ch_param_write_field(ch, IPU_FIELD_SLY, stride - 1); in ipu_cpmem_set_stride()
246 void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch) in ipu_cpmem_set_high_priority() argument
248 struct ipu_soc *ipu = ch->ipu; in ipu_cpmem_set_high_priority()
251 if (ipu->ipu_type == IPUV3EX) in ipu_cpmem_set_high_priority()
252 ipu_ch_param_write_field(ch, IPU_FIELD_ID, 1); in ipu_cpmem_set_high_priority()
254 val = ipu_idmac_read(ipu, IDMAC_CHA_PRI(ch->num)); in ipu_cpmem_set_high_priority()
255 val |= 1 << (ch->num % 32); in ipu_cpmem_set_high_priority()
256 ipu_idmac_write(ipu, val, IDMAC_CHA_PRI(ch->num)); in ipu_cpmem_set_high_priority()
260 void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t buf) in ipu_cpmem_set_buffer() argument
263 ipu_ch_param_write_field(ch, IPU_FIELD_EBA1, buf >> 3); in ipu_cpmem_set_buffer()
265 ipu_ch_param_write_field(ch, IPU_FIELD_EBA0, buf >> 3); in ipu_cpmem_set_buffer()
269 void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off) in ipu_cpmem_set_uv_offset() argument
271 ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_off / 8); in ipu_cpmem_set_uv_offset()
272 ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_off / 8); in ipu_cpmem_set_uv_offset()
276 void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride) in ipu_cpmem_interlaced_scan() argument
281 stride = -stride; in ipu_cpmem_interlaced_scan()
282 ilo = 0x100000 - (stride / 8); in ipu_cpmem_interlaced_scan()
284 ilo = stride / 8; in ipu_cpmem_interlaced_scan()
287 sly = (stride * 2) - 1; in ipu_cpmem_interlaced_scan()
289 ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1); in ipu_cpmem_interlaced_scan()
290 ipu_ch_param_write_field(ch, IPU_FIELD_ILO, ilo); in ipu_cpmem_interlaced_scan()
291 ipu_ch_param_write_field(ch, IPU_FIELD_SLY, sly); in ipu_cpmem_interlaced_scan()
295 void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id) in ipu_cpmem_set_axi_id() argument
298 ipu_ch_param_write_field(ch, IPU_FIELD_ID, id); in ipu_cpmem_set_axi_id()
302 int ipu_cpmem_get_burstsize(struct ipuv3_channel *ch) in ipu_cpmem_get_burstsize() argument
304 return ipu_ch_param_read_field(ch, IPU_FIELD_NPB) + 1; in ipu_cpmem_get_burstsize()
308 void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize) in ipu_cpmem_set_burstsize() argument
310 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, burstsize - 1); in ipu_cpmem_set_burstsize()
314 void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch) in ipu_cpmem_set_block_mode() argument
316 ipu_ch_param_write_field(ch, IPU_FIELD_BM, 1); in ipu_cpmem_set_block_mode()
320 void ipu_cpmem_set_rotation(struct ipuv3_channel *ch, in ipu_cpmem_set_rotation() argument
325 ipu_ch_param_write_field(ch, IPU_FIELD_ROT_HF_VF, temp_rot); in ipu_cpmem_set_rotation()
329 int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch, in ipu_cpmem_set_format_rgb() argument
334 ro = rgb->bits_per_pixel - rgb->red.length - rgb->red.offset; in ipu_cpmem_set_format_rgb()
335 go = rgb->bits_per_pixel - rgb->green.length - rgb->green.offset; in ipu_cpmem_set_format_rgb()
336 bo = rgb->bits_per_pixel - rgb->blue.length - rgb->blue.offset; in ipu_cpmem_set_format_rgb()
337 to = rgb->bits_per_pixel - rgb->transp.length - rgb->transp.offset; in ipu_cpmem_set_format_rgb()
339 ipu_ch_param_write_field(ch, IPU_FIELD_WID0, rgb->red.length - 1); in ipu_cpmem_set_format_rgb()
340 ipu_ch_param_write_field(ch, IPU_FIELD_OFS0, ro); in ipu_cpmem_set_format_rgb()
341 ipu_ch_param_write_field(ch, IPU_FIELD_WID1, rgb->green.length - 1); in ipu_cpmem_set_format_rgb()
342 ipu_ch_param_write_field(ch, IPU_FIELD_OFS1, go); in ipu_cpmem_set_format_rgb()
343 ipu_ch_param_write_field(ch, IPU_FIELD_WID2, rgb->blue.length - 1); in ipu_cpmem_set_format_rgb()
344 ipu_ch_param_write_field(ch, IPU_FIELD_OFS2, bo); in ipu_cpmem_set_format_rgb()
346 if (rgb->transp.length) { in ipu_cpmem_set_format_rgb()
347 ipu_ch_param_write_field(ch, IPU_FIELD_WID3, in ipu_cpmem_set_format_rgb()
348 rgb->transp.length - 1); in ipu_cpmem_set_format_rgb()
349 ipu_ch_param_write_field(ch, IPU_FIELD_OFS3, to); in ipu_cpmem_set_format_rgb()
351 ipu_ch_param_write_field(ch, IPU_FIELD_WID3, 7); in ipu_cpmem_set_format_rgb()
352 ipu_ch_param_write_field(ch, IPU_FIELD_OFS3, in ipu_cpmem_set_format_rgb()
353 rgb->bits_per_pixel); in ipu_cpmem_set_format_rgb()
356 switch (rgb->bits_per_pixel) { in ipu_cpmem_set_format_rgb()
369 case 8: in ipu_cpmem_set_format_rgb()
374 return -EINVAL; in ipu_cpmem_set_format_rgb()
376 ipu_ch_param_write_field(ch, IPU_FIELD_BPP, bpp); in ipu_cpmem_set_format_rgb()
377 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, npb); in ipu_cpmem_set_format_rgb()
378 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 7); /* rgb mode */ in ipu_cpmem_set_format_rgb()
384 int ipu_cpmem_set_format_passthrough(struct ipuv3_channel *ch, int width) in ipu_cpmem_set_format_passthrough() argument
401 case 8: in ipu_cpmem_set_format_passthrough()
406 return -EINVAL; in ipu_cpmem_set_format_passthrough()
409 ipu_ch_param_write_field(ch, IPU_FIELD_BPP, bpp); in ipu_cpmem_set_format_passthrough()
410 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, npb); in ipu_cpmem_set_format_passthrough()
411 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 6); /* raw mode */ in ipu_cpmem_set_format_passthrough()
417 void ipu_cpmem_set_yuv_interleaved(struct ipuv3_channel *ch, u32 pixel_format) in ipu_cpmem_set_yuv_interleaved() argument
421 ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3); /* bits/pixel */ in ipu_cpmem_set_yuv_interleaved()
422 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0xA);/* pix fmt */ in ipu_cpmem_set_yuv_interleaved()
423 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31);/* burst size */ in ipu_cpmem_set_yuv_interleaved()
426 ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3); /* bits/pixel */ in ipu_cpmem_set_yuv_interleaved()
427 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0x8);/* pix fmt */ in ipu_cpmem_set_yuv_interleaved()
428 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31);/* burst size */ in ipu_cpmem_set_yuv_interleaved()
434 void ipu_cpmem_set_yuv_planar_full(struct ipuv3_channel *ch, in ipu_cpmem_set_yuv_planar_full() argument
438 ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, uv_stride - 1); in ipu_cpmem_set_yuv_planar_full()
439 ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_offset / 8); in ipu_cpmem_set_yuv_planar_full()
440 ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_offset / 8); in ipu_cpmem_set_yuv_planar_full()
445 .red = { .offset = 16, .length = 8, },
446 .green = { .offset = 8, .length = 8, },
447 .blue = { .offset = 0, .length = 8, },
448 .transp = { .offset = 24, .length = 8, },
453 .red = { .offset = 0, .length = 8, },
454 .green = { .offset = 8, .length = 8, },
455 .blue = { .offset = 16, .length = 8, },
456 .transp = { .offset = 24, .length = 8, },
461 .red = { .offset = 24, .length = 8, },
462 .green = { .offset = 16, .length = 8, },
463 .blue = { .offset = 8, .length = 8, },
464 .transp = { .offset = 0, .length = 8, },
469 .red = { .offset = 8, .length = 8, },
470 .green = { .offset = 16, .length = 8, },
471 .blue = { .offset = 24, .length = 8, },
472 .transp = { .offset = 0, .length = 8, },
477 .red = { .offset = 16, .length = 8, },
478 .green = { .offset = 8, .length = 8, },
479 .blue = { .offset = 0, .length = 8, },
485 .red = { .offset = 0, .length = 8, },
486 .green = { .offset = 8, .length = 8, },
487 .blue = { .offset = 16, .length = 8, },
517 .red = { .offset = 8, .length = 4, },
548 #define Y_OFFSET(pix, x, y) ((x) + pix->width * (y))
549 #define U_OFFSET(pix, x, y) ((pix->width * pix->height) + \
550 (pix->width * ((y) / 2) / 2) + (x) / 2)
551 #define V_OFFSET(pix, x, y) ((pix->width * pix->height) + \
552 (pix->width * pix->height / 4) + \
553 (pix->width * ((y) / 2) / 2) + (x) / 2)
554 #define U2_OFFSET(pix, x, y) ((pix->width * pix->height) + \
555 (pix->width * (y) / 2) + (x) / 2)
556 #define V2_OFFSET(pix, x, y) ((pix->width * pix->height) + \
557 (pix->width * pix->height / 2) + \
558 (pix->width * (y) / 2) + (x) / 2)
559 #define UV_OFFSET(pix, x, y) ((pix->width * pix->height) + \
560 (pix->width * ((y) / 2)) + (x))
561 #define UV2_OFFSET(pix, x, y) ((pix->width * pix->height) + \
562 (pix->width * y) + (x))
566 /* See Table 37-12. Alpha channels mapping. */
578 return -EINVAL; in ipu_channel_albm()
582 static void ipu_cpmem_set_separate_alpha(struct ipuv3_channel *ch) in ipu_cpmem_set_separate_alpha() argument
584 struct ipu_soc *ipu = ch->ipu; in ipu_cpmem_set_separate_alpha()
588 albm = ipu_channel_albm(ch->num); in ipu_cpmem_set_separate_alpha()
592 ipu_ch_param_write_field(ch, IPU_FIELD_ALU, 1); in ipu_cpmem_set_separate_alpha()
593 ipu_ch_param_write_field(ch, IPU_FIELD_ALBM, albm); in ipu_cpmem_set_separate_alpha()
594 ipu_ch_param_write_field(ch, IPU_FIELD_CRE, 1); in ipu_cpmem_set_separate_alpha()
597 val |= BIT(ch->num); in ipu_cpmem_set_separate_alpha()
601 int ipu_cpmem_set_fmt(struct ipuv3_channel *ch, u32 drm_fourcc) in ipu_cpmem_set_fmt() argument
607 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 2); in ipu_cpmem_set_fmt()
609 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
614 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 1); in ipu_cpmem_set_fmt()
616 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
621 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0); in ipu_cpmem_set_fmt()
623 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
627 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 4); in ipu_cpmem_set_fmt()
629 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
633 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 3); in ipu_cpmem_set_fmt()
635 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
639 ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3); in ipu_cpmem_set_fmt()
641 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0xA); in ipu_cpmem_set_fmt()
643 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
647 ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3); in ipu_cpmem_set_fmt()
649 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0x8); in ipu_cpmem_set_fmt()
651 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
655 ipu_cpmem_set_format_rgb(ch, &def_xbgr_32); in ipu_cpmem_set_fmt()
659 ipu_cpmem_set_format_rgb(ch, &def_xrgb_32); in ipu_cpmem_set_fmt()
664 ipu_cpmem_set_format_rgb(ch, &def_rgbx_32); in ipu_cpmem_set_fmt()
669 ipu_cpmem_set_format_rgb(ch, &def_bgrx_32); in ipu_cpmem_set_fmt()
673 ipu_cpmem_set_format_rgb(ch, &def_bgr_24); in ipu_cpmem_set_fmt()
677 ipu_cpmem_set_format_rgb(ch, &def_rgb_24); in ipu_cpmem_set_fmt()
681 ipu_cpmem_set_format_rgb(ch, &def_rgb_16); in ipu_cpmem_set_fmt()
685 ipu_cpmem_set_format_rgb(ch, &def_bgr_16); in ipu_cpmem_set_fmt()
688 ipu_cpmem_set_format_rgb(ch, &def_argb_16); in ipu_cpmem_set_fmt()
691 ipu_cpmem_set_format_rgb(ch, &def_abgr_16); in ipu_cpmem_set_fmt()
694 ipu_cpmem_set_format_rgb(ch, &def_rgba_16); in ipu_cpmem_set_fmt()
697 ipu_cpmem_set_format_rgb(ch, &def_bgra_16); in ipu_cpmem_set_fmt()
700 ipu_cpmem_set_format_rgb(ch, &def_argb_16_4444); in ipu_cpmem_set_fmt()
703 return -EINVAL; in ipu_cpmem_set_fmt()
713 ipu_ch_param_write_field(ch, IPU_FIELD_WID3, 7); in ipu_cpmem_set_fmt()
714 ipu_cpmem_set_separate_alpha(ch); in ipu_cpmem_set_fmt()
724 int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image) in ipu_cpmem_set_image() argument
726 struct v4l2_pix_format *pix = &image->pix; in ipu_cpmem_set_image()
731 __func__, pix->width, pix->height, in ipu_cpmem_set_image()
732 pix->bytesperline); in ipu_cpmem_set_image()
734 ipu_cpmem_set_resolution(ch, image->rect.width, image->rect.height); in ipu_cpmem_set_image()
735 ipu_cpmem_set_stride(ch, pix->bytesperline); in ipu_cpmem_set_image()
737 ipu_cpmem_set_fmt(ch, v4l2_pix_fmt_to_drm_fourcc(pix->pixelformat)); in ipu_cpmem_set_image()
739 switch (pix->pixelformat) { in ipu_cpmem_set_image()
741 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); in ipu_cpmem_set_image()
742 u_offset = U_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
743 image->rect.top) - offset; in ipu_cpmem_set_image()
744 v_offset = V_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
745 image->rect.top) - offset; in ipu_cpmem_set_image()
747 ipu_cpmem_set_yuv_planar_full(ch, pix->bytesperline / 2, in ipu_cpmem_set_image()
751 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); in ipu_cpmem_set_image()
752 u_offset = U_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
753 image->rect.top) - offset; in ipu_cpmem_set_image()
754 v_offset = V_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
755 image->rect.top) - offset; in ipu_cpmem_set_image()
757 ipu_cpmem_set_yuv_planar_full(ch, pix->bytesperline / 2, in ipu_cpmem_set_image()
761 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); in ipu_cpmem_set_image()
762 u_offset = U2_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
763 image->rect.top) - offset; in ipu_cpmem_set_image()
764 v_offset = V2_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
765 image->rect.top) - offset; in ipu_cpmem_set_image()
767 ipu_cpmem_set_yuv_planar_full(ch, pix->bytesperline / 2, in ipu_cpmem_set_image()
771 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); in ipu_cpmem_set_image()
772 u_offset = UV_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
773 image->rect.top) - offset; in ipu_cpmem_set_image()
776 ipu_cpmem_set_yuv_planar_full(ch, pix->bytesperline, in ipu_cpmem_set_image()
780 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); in ipu_cpmem_set_image()
781 u_offset = UV2_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
782 image->rect.top) - offset; in ipu_cpmem_set_image()
785 ipu_cpmem_set_yuv_planar_full(ch, pix->bytesperline, in ipu_cpmem_set_image()
791 offset = image->rect.left * 2 + in ipu_cpmem_set_image()
792 image->rect.top * pix->bytesperline; in ipu_cpmem_set_image()
798 offset = image->rect.left * 4 + in ipu_cpmem_set_image()
799 image->rect.top * pix->bytesperline; in ipu_cpmem_set_image()
803 offset = image->rect.left * 3 + in ipu_cpmem_set_image()
804 image->rect.top * pix->bytesperline; in ipu_cpmem_set_image()
811 offset = image->rect.left + image->rect.top * pix->bytesperline; in ipu_cpmem_set_image()
818 offset = image->rect.left * 2 + in ipu_cpmem_set_image()
819 image->rect.top * pix->bytesperline; in ipu_cpmem_set_image()
825 ret = -EINVAL; in ipu_cpmem_set_image()
828 ipu_cpmem_set_buffer(ch, 0, image->phys0 + offset); in ipu_cpmem_set_image()
829 ipu_cpmem_set_buffer(ch, 1, image->phys1 + offset); in ipu_cpmem_set_image()
835 void ipu_cpmem_dump(struct ipuv3_channel *ch) in ipu_cpmem_dump() argument
837 struct ipu_ch_param __iomem *p = ipu_get_cpmem(ch); in ipu_cpmem_dump()
838 struct ipu_soc *ipu = ch->ipu; in ipu_cpmem_dump()
839 int chno = ch->num; in ipu_cpmem_dump()
841 dev_dbg(ipu->dev, "ch %d word 0 - %08X %08X %08X %08X %08X\n", chno, in ipu_cpmem_dump()
842 readl(&p->word[0].data[0]), in ipu_cpmem_dump()
843 readl(&p->word[0].data[1]), in ipu_cpmem_dump()
844 readl(&p->word[0].data[2]), in ipu_cpmem_dump()
845 readl(&p->word[0].data[3]), in ipu_cpmem_dump()
846 readl(&p->word[0].data[4])); in ipu_cpmem_dump()
847 dev_dbg(ipu->dev, "ch %d word 1 - %08X %08X %08X %08X %08X\n", chno, in ipu_cpmem_dump()
848 readl(&p->word[1].data[0]), in ipu_cpmem_dump()
849 readl(&p->word[1].data[1]), in ipu_cpmem_dump()
850 readl(&p->word[1].data[2]), in ipu_cpmem_dump()
851 readl(&p->word[1].data[3]), in ipu_cpmem_dump()
852 readl(&p->word[1].data[4])); in ipu_cpmem_dump()
853 dev_dbg(ipu->dev, "PFS 0x%x, ", in ipu_cpmem_dump()
854 ipu_ch_param_read_field(ch, IPU_FIELD_PFS)); in ipu_cpmem_dump()
855 dev_dbg(ipu->dev, "BPP 0x%x, ", in ipu_cpmem_dump()
856 ipu_ch_param_read_field(ch, IPU_FIELD_BPP)); in ipu_cpmem_dump()
857 dev_dbg(ipu->dev, "NPB 0x%x\n", in ipu_cpmem_dump()
858 ipu_ch_param_read_field(ch, IPU_FIELD_NPB)); in ipu_cpmem_dump()
860 dev_dbg(ipu->dev, "FW %d, ", in ipu_cpmem_dump()
861 ipu_ch_param_read_field(ch, IPU_FIELD_FW)); in ipu_cpmem_dump()
862 dev_dbg(ipu->dev, "FH %d, ", in ipu_cpmem_dump()
863 ipu_ch_param_read_field(ch, IPU_FIELD_FH)); in ipu_cpmem_dump()
864 dev_dbg(ipu->dev, "EBA0 0x%x\n", in ipu_cpmem_dump()
865 ipu_ch_param_read_field(ch, IPU_FIELD_EBA0) << 3); in ipu_cpmem_dump()
866 dev_dbg(ipu->dev, "EBA1 0x%x\n", in ipu_cpmem_dump()
867 ipu_ch_param_read_field(ch, IPU_FIELD_EBA1) << 3); in ipu_cpmem_dump()
868 dev_dbg(ipu->dev, "Stride %d\n", in ipu_cpmem_dump()
869 ipu_ch_param_read_field(ch, IPU_FIELD_SL)); in ipu_cpmem_dump()
870 dev_dbg(ipu->dev, "scan_order %d\n", in ipu_cpmem_dump()
871 ipu_ch_param_read_field(ch, IPU_FIELD_SO)); in ipu_cpmem_dump()
872 dev_dbg(ipu->dev, "uv_stride %d\n", in ipu_cpmem_dump()
873 ipu_ch_param_read_field(ch, IPU_FIELD_SLUV)); in ipu_cpmem_dump()
874 dev_dbg(ipu->dev, "u_offset 0x%x\n", in ipu_cpmem_dump()
875 ipu_ch_param_read_field(ch, IPU_FIELD_UBO) << 3); in ipu_cpmem_dump()
876 dev_dbg(ipu->dev, "v_offset 0x%x\n", in ipu_cpmem_dump()
877 ipu_ch_param_read_field(ch, IPU_FIELD_VBO) << 3); in ipu_cpmem_dump()
879 dev_dbg(ipu->dev, "Width0 %d+1, ", in ipu_cpmem_dump()
880 ipu_ch_param_read_field(ch, IPU_FIELD_WID0)); in ipu_cpmem_dump()
881 dev_dbg(ipu->dev, "Width1 %d+1, ", in ipu_cpmem_dump()
882 ipu_ch_param_read_field(ch, IPU_FIELD_WID1)); in ipu_cpmem_dump()
883 dev_dbg(ipu->dev, "Width2 %d+1, ", in ipu_cpmem_dump()
884 ipu_ch_param_read_field(ch, IPU_FIELD_WID2)); in ipu_cpmem_dump()
885 dev_dbg(ipu->dev, "Width3 %d+1, ", in ipu_cpmem_dump()
886 ipu_ch_param_read_field(ch, IPU_FIELD_WID3)); in ipu_cpmem_dump()
887 dev_dbg(ipu->dev, "Offset0 %d, ", in ipu_cpmem_dump()
888 ipu_ch_param_read_field(ch, IPU_FIELD_OFS0)); in ipu_cpmem_dump()
889 dev_dbg(ipu->dev, "Offset1 %d, ", in ipu_cpmem_dump()
890 ipu_ch_param_read_field(ch, IPU_FIELD_OFS1)); in ipu_cpmem_dump()
891 dev_dbg(ipu->dev, "Offset2 %d, ", in ipu_cpmem_dump()
892 ipu_ch_param_read_field(ch, IPU_FIELD_OFS2)); in ipu_cpmem_dump()
893 dev_dbg(ipu->dev, "Offset3 %d\n", in ipu_cpmem_dump()
894 ipu_ch_param_read_field(ch, IPU_FIELD_OFS3)); in ipu_cpmem_dump()
904 return -ENOMEM; in ipu_cpmem_init()
906 ipu->cpmem_priv = cpmem; in ipu_cpmem_init()
908 spin_lock_init(&cpmem->lock); in ipu_cpmem_init()
909 cpmem->base = devm_ioremap(dev, base, SZ_128K); in ipu_cpmem_init()
910 if (!cpmem->base) in ipu_cpmem_init()
911 return -ENOMEM; in ipu_cpmem_init()
914 base, cpmem->base); in ipu_cpmem_init()
915 cpmem->ipu = ipu; in ipu_cpmem_init()