Lines Matching +full:fast +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-or-later
23 #include "i2c-designware-core.h"
28 dw_writel(dev, dev->tx_fifo_depth / 2, DW_IC_TX_TL); in i2c_dw_configure_fifo_master()
32 dw_writel(dev, dev->master_cfg, DW_IC_CON); in i2c_dw_configure_fifo_master()
40 struct i2c_timings *t = &dev->timings; in i2c_dw_set_timings_master()
50 /* Set standard and fast speed dividers for high/low periods */ in i2c_dw_set_timings_master()
51 sda_falling_time = t->sda_fall_ns ?: 300; /* ns */ in i2c_dw_set_timings_master()
52 scl_falling_time = t->scl_fall_ns ?: 300; /* ns */ in i2c_dw_set_timings_master()
54 /* Calculate SCL timing parameters for standard mode if not set */ in i2c_dw_set_timings_master()
55 if (!dev->ss_hcnt || !dev->ss_lcnt) { in i2c_dw_set_timings_master()
57 dev->ss_hcnt = in i2c_dw_set_timings_master()
63 dev->ss_lcnt = in i2c_dw_set_timings_master()
69 dev_dbg(dev->dev, "Standard Mode HCNT:LCNT = %d:%d\n", in i2c_dw_set_timings_master()
70 dev->ss_hcnt, dev->ss_lcnt); in i2c_dw_set_timings_master()
73 * Set SCL timing parameters for fast mode or fast mode plus. Only in i2c_dw_set_timings_master()
77 if (t->bus_freq_hz == 1000000) { in i2c_dw_set_timings_master()
79 * Check are fast mode plus parameters available and use in i2c_dw_set_timings_master()
80 * fast mode if not. in i2c_dw_set_timings_master()
82 if (dev->fp_hcnt && dev->fp_lcnt) { in i2c_dw_set_timings_master()
83 dev->fs_hcnt = dev->fp_hcnt; in i2c_dw_set_timings_master()
84 dev->fs_lcnt = dev->fp_lcnt; in i2c_dw_set_timings_master()
89 * Calculate SCL timing parameters for fast mode if not set. They are in i2c_dw_set_timings_master()
90 * needed also in high speed mode. in i2c_dw_set_timings_master()
92 if (!dev->fs_hcnt || !dev->fs_lcnt) { in i2c_dw_set_timings_master()
94 dev->fs_hcnt = in i2c_dw_set_timings_master()
100 dev->fs_lcnt = in i2c_dw_set_timings_master()
106 dev_dbg(dev->dev, "Fast Mode%s HCNT:LCNT = %d:%d\n", in i2c_dw_set_timings_master()
107 fp_str, dev->fs_hcnt, dev->fs_lcnt); in i2c_dw_set_timings_master()
109 /* Check is high speed possible and fall back to fast mode if not */ in i2c_dw_set_timings_master()
110 if ((dev->master_cfg & DW_IC_CON_SPEED_MASK) == in i2c_dw_set_timings_master()
114 dev_err(dev->dev, "High Speed not supported!\n"); in i2c_dw_set_timings_master()
115 dev->master_cfg &= ~DW_IC_CON_SPEED_MASK; in i2c_dw_set_timings_master()
116 dev->master_cfg |= DW_IC_CON_SPEED_FAST; in i2c_dw_set_timings_master()
117 dev->hs_hcnt = 0; in i2c_dw_set_timings_master()
118 dev->hs_lcnt = 0; in i2c_dw_set_timings_master()
119 } else if (dev->hs_hcnt && dev->hs_lcnt) { in i2c_dw_set_timings_master()
120 dev_dbg(dev->dev, "High Speed Mode HCNT:LCNT = %d:%d\n", in i2c_dw_set_timings_master()
121 dev->hs_hcnt, dev->hs_lcnt); in i2c_dw_set_timings_master()
129 switch (dev->master_cfg & DW_IC_CON_SPEED_MASK) { in i2c_dw_set_timings_master()
131 mode_str = "Standard Mode"; in i2c_dw_set_timings_master()
134 mode_str = "High Speed Mode"; in i2c_dw_set_timings_master()
137 mode_str = "Fast Mode"; in i2c_dw_set_timings_master()
139 dev_dbg(dev->dev, "Bus speed: %s%s\n", mode_str, fp_str); in i2c_dw_set_timings_master()
146 * i2c_dw_init() - Initialize the designware I2C master hardware
165 dw_writel(dev, dev->ss_hcnt, DW_IC_SS_SCL_HCNT); in i2c_dw_init_master()
166 dw_writel(dev, dev->ss_lcnt, DW_IC_SS_SCL_LCNT); in i2c_dw_init_master()
168 /* Write fast mode/fast mode plus timing parameters */ in i2c_dw_init_master()
169 dw_writel(dev, dev->fs_hcnt, DW_IC_FS_SCL_HCNT); in i2c_dw_init_master()
170 dw_writel(dev, dev->fs_lcnt, DW_IC_FS_SCL_LCNT); in i2c_dw_init_master()
173 if (dev->hs_hcnt && dev->hs_lcnt) { in i2c_dw_init_master()
174 dw_writel(dev, dev->hs_hcnt, DW_IC_HS_SCL_HCNT); in i2c_dw_init_master()
175 dw_writel(dev, dev->hs_lcnt, DW_IC_HS_SCL_LCNT); in i2c_dw_init_master()
179 if (dev->sda_hold_time) in i2c_dw_init_master()
180 dw_writel(dev, dev->sda_hold_time, DW_IC_SDA_HOLD); in i2c_dw_init_master()
190 struct i2c_msg *msgs = dev->msgs; in i2c_dw_xfer_init()
198 if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) { in i2c_dw_xfer_init()
201 * If I2C_DYNAMIC_TAR_UPDATE is set, the 10-bit addressing in i2c_dw_xfer_init()
202 * mode has to be enabled via bit 12 of IC_TAR register. in i2c_dw_xfer_init()
214 * Set the slave (target) address and enable 10-bit addressing mode in i2c_dw_xfer_init()
217 dw_writel(dev, msgs[dev->msg_write_idx].addr | ic_tar, DW_IC_TAR); in i2c_dw_xfer_init()
242 struct i2c_msg *msgs = dev->msgs; in i2c_dw_xfer_msg()
245 u32 addr = msgs[dev->msg_write_idx].addr; in i2c_dw_xfer_msg()
246 u32 buf_len = dev->tx_buf_len; in i2c_dw_xfer_msg()
247 u8 *buf = dev->tx_buf; in i2c_dw_xfer_msg()
252 for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) { in i2c_dw_xfer_msg()
253 u32 flags = msgs[dev->msg_write_idx].flags; in i2c_dw_xfer_msg()
260 if (msgs[dev->msg_write_idx].addr != addr) { in i2c_dw_xfer_msg()
261 dev_err(dev->dev, in i2c_dw_xfer_msg()
263 dev->msg_err = -EINVAL; in i2c_dw_xfer_msg()
267 if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) { in i2c_dw_xfer_msg()
269 buf = msgs[dev->msg_write_idx].buf; in i2c_dw_xfer_msg()
270 buf_len = msgs[dev->msg_write_idx].len; in i2c_dw_xfer_msg()
276 if ((dev->master_cfg & DW_IC_CON_RESTART_EN) && in i2c_dw_xfer_msg()
277 (dev->msg_write_idx > 0)) in i2c_dw_xfer_msg()
281 tx_limit = dev->tx_fifo_depth - dw_readl(dev, DW_IC_TXFLR); in i2c_dw_xfer_msg()
282 rx_limit = dev->rx_fifo_depth - dw_readl(dev, DW_IC_RXFLR); in i2c_dw_xfer_msg()
295 * i2c-core always sets the buffer length of in i2c_dw_xfer_msg()
300 if (dev->msg_write_idx == dev->msgs_num - 1 && in i2c_dw_xfer_msg()
309 if (msgs[dev->msg_write_idx].flags & I2C_M_RD) { in i2c_dw_xfer_msg()
312 if (dev->rx_outstanding >= dev->rx_fifo_depth) in i2c_dw_xfer_msg()
316 rx_limit--; in i2c_dw_xfer_msg()
317 dev->rx_outstanding++; in i2c_dw_xfer_msg()
320 tx_limit--; buf_len--; in i2c_dw_xfer_msg()
323 dev->tx_buf = buf; in i2c_dw_xfer_msg()
324 dev->tx_buf_len = buf_len; in i2c_dw_xfer_msg()
333 dev->status |= STATUS_WRITE_IN_PROGRESS; in i2c_dw_xfer_msg()
336 dev->status &= ~STATUS_WRITE_IN_PROGRESS; in i2c_dw_xfer_msg()
343 if (dev->msg_write_idx == dev->msgs_num) in i2c_dw_xfer_msg()
346 if (dev->msg_err) in i2c_dw_xfer_msg()
355 struct i2c_msg *msgs = dev->msgs; in i2c_dw_recv_len()
356 u32 flags = msgs[dev->msg_read_idx].flags; in i2c_dw_recv_len()
363 dev->tx_buf_len = len - min_t(u8, len, dev->rx_outstanding); in i2c_dw_recv_len()
364 msgs[dev->msg_read_idx].len = len; in i2c_dw_recv_len()
365 msgs[dev->msg_read_idx].flags &= ~I2C_M_RECV_LEN; in i2c_dw_recv_len()
373 struct i2c_msg *msgs = dev->msgs; in i2c_dw_read()
376 for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) { in i2c_dw_read()
380 if (!(msgs[dev->msg_read_idx].flags & I2C_M_RD)) in i2c_dw_read()
383 if (!(dev->status & STATUS_READ_IN_PROGRESS)) { in i2c_dw_read()
384 len = msgs[dev->msg_read_idx].len; in i2c_dw_read()
385 buf = msgs[dev->msg_read_idx].buf; in i2c_dw_read()
387 len = dev->rx_buf_len; in i2c_dw_read()
388 buf = dev->rx_buf; in i2c_dw_read()
393 for (; len > 0 && rx_valid > 0; len--, rx_valid--) { in i2c_dw_read()
394 u32 flags = msgs[dev->msg_read_idx].flags; in i2c_dw_read()
403 dev->rx_outstanding--; in i2c_dw_read()
407 dev->status |= STATUS_READ_IN_PROGRESS; in i2c_dw_read()
408 dev->rx_buf_len = len; in i2c_dw_read()
409 dev->rx_buf = buf; in i2c_dw_read()
412 dev->status &= ~STATUS_READ_IN_PROGRESS; in i2c_dw_read()
425 dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); in i2c_dw_xfer()
427 pm_runtime_get_sync(dev->dev); in i2c_dw_xfer()
429 reinit_completion(&dev->cmd_complete); in i2c_dw_xfer()
430 dev->msgs = msgs; in i2c_dw_xfer()
431 dev->msgs_num = num; in i2c_dw_xfer()
432 dev->cmd_err = 0; in i2c_dw_xfer()
433 dev->msg_write_idx = 0; in i2c_dw_xfer()
434 dev->msg_read_idx = 0; in i2c_dw_xfer()
435 dev->msg_err = 0; in i2c_dw_xfer()
436 dev->status = STATUS_IDLE; in i2c_dw_xfer()
437 dev->abort_source = 0; in i2c_dw_xfer()
438 dev->rx_outstanding = 0; in i2c_dw_xfer()
452 if (!wait_for_completion_timeout(&dev->cmd_complete, adap->timeout)) { in i2c_dw_xfer()
453 dev_err(dev->dev, "controller timed out\n"); in i2c_dw_xfer()
455 i2c_recover_bus(&dev->adapter); in i2c_dw_xfer()
457 ret = -ETIMEDOUT; in i2c_dw_xfer()
471 if (dev->msg_err) { in i2c_dw_xfer()
472 ret = dev->msg_err; in i2c_dw_xfer()
477 if (likely(!dev->cmd_err && !dev->status)) { in i2c_dw_xfer()
483 if (dev->cmd_err == DW_IC_ERR_TX_ABRT) { in i2c_dw_xfer()
488 if (dev->status) in i2c_dw_xfer()
489 dev_err(dev->dev, in i2c_dw_xfer()
490 "transfer terminated early - interrupt latency too high?\n"); in i2c_dw_xfer()
492 ret = -EIO; in i2c_dw_xfer()
498 pm_runtime_mark_last_busy(dev->dev); in i2c_dw_xfer()
499 pm_runtime_put_autosuspend(dev->dev); in i2c_dw_xfer()
536 * Instead, use the separately-prepared IC_CLR_* registers. in i2c_dw_read_clear_intrbits()
551 dev->abort_source = dw_readl(dev, DW_IC_TX_ABRT_SOURCE); in i2c_dw_read_clear_intrbits()
578 dev->cmd_err |= DW_IC_ERR_TX_ABRT; in i2c_dw_irq_handler_master()
579 dev->status = STATUS_IDLE; in i2c_dw_irq_handler_master()
602 if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err) in i2c_dw_irq_handler_master()
603 complete(&dev->cmd_complete); in i2c_dw_irq_handler_master()
604 else if (unlikely(dev->flags & ACCESS_INTR_MASK)) { in i2c_dw_irq_handler_master()
621 dev_dbg(dev->dev, "enabled=%#x stat=%#x\n", enabled, stat); in i2c_dw_isr()
635 reset_control_assert(dev->rst); in i2c_dw_prepare_recovery()
644 reset_control_deassert(dev->rst); in i2c_dw_unprepare_recovery()
650 struct i2c_bus_recovery_info *rinfo = &dev->rinfo; in i2c_dw_init_recovery_info()
651 struct i2c_adapter *adap = &dev->adapter; in i2c_dw_init_recovery_info()
655 gpio = devm_gpiod_get(dev->dev, "scl", GPIOD_OUT_HIGH); in i2c_dw_init_recovery_info()
658 if (r == -ENOENT || r == -ENOSYS) in i2c_dw_init_recovery_info()
662 rinfo->scl_gpiod = gpio; in i2c_dw_init_recovery_info()
664 gpio = devm_gpiod_get_optional(dev->dev, "sda", GPIOD_IN); in i2c_dw_init_recovery_info()
667 rinfo->sda_gpiod = gpio; in i2c_dw_init_recovery_info()
669 rinfo->recover_bus = i2c_generic_scl_recovery; in i2c_dw_init_recovery_info()
670 rinfo->prepare_recovery = i2c_dw_prepare_recovery; in i2c_dw_init_recovery_info()
671 rinfo->unprepare_recovery = i2c_dw_unprepare_recovery; in i2c_dw_init_recovery_info()
672 adap->bus_recovery_info = rinfo; in i2c_dw_init_recovery_info()
674 dev_info(dev->dev, "running with gpio recovery mode! scl%s", in i2c_dw_init_recovery_info()
675 rinfo->sda_gpiod ? ",sda" : ""); in i2c_dw_init_recovery_info()
682 struct i2c_adapter *adap = &dev->adapter; in i2c_dw_probe()
686 init_completion(&dev->cmd_complete); in i2c_dw_probe()
688 dev->init = i2c_dw_init_master; in i2c_dw_probe()
689 dev->disable = i2c_dw_disable; in i2c_dw_probe()
690 dev->disable_int = i2c_dw_disable_int; in i2c_dw_probe()
700 ret = dev->init(dev); in i2c_dw_probe()
704 snprintf(adap->name, sizeof(adap->name), in i2c_dw_probe()
706 adap->retries = 3; in i2c_dw_probe()
707 adap->algo = &i2c_dw_algo; in i2c_dw_probe()
708 adap->quirks = &i2c_dw_quirks; in i2c_dw_probe()
709 adap->dev.parent = dev->dev; in i2c_dw_probe()
712 if (dev->pm_disabled) { in i2c_dw_probe()
719 ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr, irq_flags, in i2c_dw_probe()
720 dev_name(dev->dev), dev); in i2c_dw_probe()
722 dev_err(dev->dev, "failure requesting irq %i: %d\n", in i2c_dw_probe()
723 dev->irq, ret); in i2c_dw_probe()
737 pm_runtime_get_noresume(dev->dev); in i2c_dw_probe()
740 dev_err(dev->dev, "failure adding adapter: %d\n", ret); in i2c_dw_probe()
741 pm_runtime_put_noidle(dev->dev); in i2c_dw_probe()