Lines Matching +full:i2c +full:- +full:fast +full:- +full:mode
2 * Copyright (C) 2009 ST-Ericsson SA
5 * I2C master mode controller driver, used in Nomadik 8815
20 #include <linux/i2c.h>
28 #define DRIVER_NAME "nmk-i2c"
30 /* I2C Controller register offsets */
49 #define I2C_CR_OM (0x3 << 1) /* Operating mode */
50 #define I2C_CR_SAM (0x1 << 3) /* Slave addressing mode */
51 #define I2C_CR_SM (0x3 << 4) /* Speed mode */
52 #define I2C_CR_SGCM (0x1 << 6) /* Slave general call mode */
58 #define I2C_CR_LM (0x1 << 12) /* Loopback mode */
64 #define I2C_MCR_A7 (0x7f << 1) /* 7-bit address */
65 #define I2C_MCR_EA10 (0x7 << 8) /* 10-bit Extended address */
114 * struct i2c_vendor_data - per-vendor variations
138 * struct i2c_nmk_client - client specific data
139 * @slave_adr: 7-bit slave address
143 * @operation: current I2C operation
154 * struct nmk_i2c_dev - private data structure of the controller.
157 * @adap: corresponding I2C adapter.
160 * @clk: hardware i2c block clock.
162 * @clk_freq: clock frequency for the operation mode
166 * @sm: speed mode
168 * @xfer_complete: acknowledge completion for a I2C message.
211 * flush_i2c_fifo() - This function flushes the I2C FIFO
212 * @dev: private data of I2C Driver
214 * This function flushes the I2C Tx and Rx FIFOs. It returns
226 * On the completion, the I2C internal logic clears these in flush_i2c_fifo()
230 writel((I2C_CR_FTX | I2C_CR_FRX), dev->virtbase + I2C_CR); in flush_i2c_fifo()
233 timeout = jiffies + dev->adap.timeout; in flush_i2c_fifo()
236 if ((readl(dev->virtbase + I2C_CR) & in flush_i2c_fifo()
242 dev_err(&dev->adev->dev, in flush_i2c_fifo()
246 return -ETIMEDOUT; in flush_i2c_fifo()
250 * disable_all_interrupts() - Disable all interrupts of this I2c Bus
251 * @dev: private data of I2C Driver
256 writel(mask, dev->virtbase + I2C_IMSCR); in disable_all_interrupts()
260 * clear_all_interrupts() - Clear all interrupts of I2C Controller
261 * @dev: private data of I2C Driver
267 writel(mask, dev->virtbase + I2C_ICR); in clear_all_interrupts()
271 * init_hw() - initialize the I2C hardware
272 * @dev: private data of I2C Driver
283 i2c_clr_bit(dev->virtbase + I2C_CR , I2C_CR_PE); in init_hw()
289 dev->cli.operation = I2C_NO_OPERATION; in init_hw()
295 /* enable peripheral, master mode operation */
299 * load_i2c_mcr_reg() - load the MCR register
308 mcr |= GEN_MASK(dev->cli.slave_adr, I2C_MCR_A7, 1); in load_i2c_mcr_reg()
311 /* 10-bit address transaction */ in load_i2c_mcr_reg()
319 slave_adr_3msb_bits = (dev->cli.slave_adr >> 7) & 0x7; in load_i2c_mcr_reg()
323 /* 7-bit address transaction */ in load_i2c_mcr_reg()
331 if (dev->cli.operation == I2C_WRITE) in load_i2c_mcr_reg()
337 if (dev->stop) in load_i2c_mcr_reg()
342 mcr |= GEN_MASK(dev->cli.count, I2C_MCR_LENGTH, 15); in load_i2c_mcr_reg()
348 * setup_i2c_controller() - setup the controller
358 writel(0x0, dev->virtbase + I2C_CR); in setup_i2c_controller()
359 writel(0x0, dev->virtbase + I2C_HSMCR); in setup_i2c_controller()
360 writel(0x0, dev->virtbase + I2C_TFTR); in setup_i2c_controller()
361 writel(0x0, dev->virtbase + I2C_RFTR); in setup_i2c_controller()
362 writel(0x0, dev->virtbase + I2C_DMAR); in setup_i2c_controller()
364 i2c_clk = clk_get_rate(dev->clk); in setup_i2c_controller()
370 * stretching in terms of i2c clk cycles + 1 (zero means in setup_i2c_controller()
379 switch (dev->sm) { in setup_i2c_controller()
382 slsu = DIV_ROUND_UP(100, ns); /* Fast */ in setup_i2c_controller()
394 dev_dbg(&dev->adev->dev, "calculated SLSU = %04x\n", slsu); in setup_i2c_controller()
395 writel(slsu << 16, dev->virtbase + I2C_SCR); in setup_i2c_controller()
398 * The spec says, in case of std. mode the divider is in setup_i2c_controller()
399 * 2 whereas it is 3 for fast and fastplus mode of in setup_i2c_controller()
400 * operation. TODO - high speed support. in setup_i2c_controller()
402 div = (dev->clk_freq > 100000) ? 3 : 2; in setup_i2c_controller()
407 * operation, and the other is for std, fast mode, fast mode in setup_i2c_controller()
408 * plus operation. Currently we do not supprt high speed mode in setup_i2c_controller()
412 brcr2 = (i2c_clk/(dev->clk_freq * div)) & 0xffff; in setup_i2c_controller()
415 writel((brcr1 | brcr2), dev->virtbase + I2C_BRCR); in setup_i2c_controller()
418 * set the speed mode. Currently we support in setup_i2c_controller()
419 * only standard and fast mode of operation in setup_i2c_controller()
420 * TODO - support for fast mode plus (up to 1Mb/s) in setup_i2c_controller()
423 if (dev->sm > I2C_FREQ_MODE_FAST) { in setup_i2c_controller()
424 dev_err(&dev->adev->dev, in setup_i2c_controller()
425 "do not support this mode defaulting to std. mode\n"); in setup_i2c_controller()
427 writel((brcr1 | brcr2), dev->virtbase + I2C_BRCR); in setup_i2c_controller()
429 dev->virtbase + I2C_CR); in setup_i2c_controller()
431 writel(dev->sm << 4, dev->virtbase + I2C_CR); in setup_i2c_controller()
434 writel(dev->tft, dev->virtbase + I2C_TFTR); in setup_i2c_controller()
435 writel(dev->rft, dev->virtbase + I2C_RFTR); in setup_i2c_controller()
439 * read_i2c() - Read from I2C client device
440 * @dev: private data of I2C Driver
443 * This function reads from i2c client device when controller is in
444 * master mode. There is a completion timeout. If there is no transfer
454 writel(mcr, dev->virtbase + I2C_MCR); in read_i2c()
457 writel(readl(dev->virtbase + I2C_CR) | DEFAULT_I2C_REG_CR, in read_i2c()
458 dev->virtbase + I2C_CR); in read_i2c()
461 i2c_set_bit(dev->virtbase + I2C_CR, I2C_CR_PE); in read_i2c()
463 init_completion(&dev->xfer_complete); in read_i2c()
469 if (dev->stop || !dev->vendor->has_mtdws) in read_i2c()
476 writel(readl(dev->virtbase + I2C_IMSCR) | irq_mask, in read_i2c()
477 dev->virtbase + I2C_IMSCR); in read_i2c()
480 &dev->xfer_complete, dev->adap.timeout); in read_i2c()
484 dev_err(&dev->adev->dev, "read from slave 0x%x timed out\n", in read_i2c()
485 dev->cli.slave_adr); in read_i2c()
486 status = -ETIMEDOUT; in read_i2c()
495 for (count = (no_bytes - 2); in fill_tx_fifo()
497 (dev->cli.count != 0); in fill_tx_fifo()
498 count--) { in fill_tx_fifo()
500 writeb(*dev->cli.buffer, in fill_tx_fifo()
501 dev->virtbase + I2C_TFR); in fill_tx_fifo()
502 dev->cli.buffer++; in fill_tx_fifo()
503 dev->cli.count--; in fill_tx_fifo()
504 dev->cli.xfer_bytes++; in fill_tx_fifo()
510 * write_i2c() - Write data to I2C client.
511 * @dev: private data of I2C Driver
514 * This function writes data to I2C client
524 writel(mcr, dev->virtbase + I2C_MCR); in write_i2c()
527 writel(readl(dev->virtbase + I2C_CR) | DEFAULT_I2C_REG_CR, in write_i2c()
528 dev->virtbase + I2C_CR); in write_i2c()
531 i2c_set_bit(dev->virtbase + I2C_CR , I2C_CR_PE); in write_i2c()
533 init_completion(&dev->xfer_complete); in write_i2c()
541 if (dev->cli.count != 0) in write_i2c()
549 if (dev->stop || !dev->vendor->has_mtdws) in write_i2c()
556 writel(readl(dev->virtbase + I2C_IMSCR) | irq_mask, in write_i2c()
557 dev->virtbase + I2C_IMSCR); in write_i2c()
560 &dev->xfer_complete, dev->adap.timeout); in write_i2c()
564 dev_err(&dev->adev->dev, "write to slave 0x%x timed out\n", in write_i2c()
565 dev->cli.slave_adr); in write_i2c()
566 status = -ETIMEDOUT; in write_i2c()
573 * nmk_i2c_xfer_one() - transmit a single I2C message
583 dev->cli.operation = I2C_READ; in nmk_i2c_xfer_one()
587 dev->cli.operation = I2C_WRITE; in nmk_i2c_xfer_one()
591 if (status || (dev->result)) { in nmk_i2c_xfer_one()
595 i2c_sr = readl(dev->virtbase + I2C_SR); in nmk_i2c_xfer_one()
597 * Check if the controller I2C operation status in nmk_i2c_xfer_one()
603 dev_err(&dev->adev->dev, "%s\n", in nmk_i2c_xfer_one()
611 status = status ? status : dev->result; in nmk_i2c_xfer_one()
618 * nmk_i2c_xfer() - I2C transfer function used by kernel framework
630 * - a no index is coded as '0',
631 * - 2byte big endian index is coded as '3'
635 * eg. a I2C transation to read 2 bytes from index 0
637 * msg[0].addr = client->addr;
642 * msg[1].addr = client->addr;
648 * WRITE TRANSFER : The I2C standard interface interprets all data as payload.
651 * eg. a I2C transation to write 2 bytes from index 1
672 pm_runtime_get_sync(&dev->adev->dev); in nmk_i2c_xfer()
676 /* setup the i2c controller */ in nmk_i2c_xfer()
680 dev->cli.slave_adr = msgs[i].addr; in nmk_i2c_xfer()
681 dev->cli.buffer = msgs[i].buf; in nmk_i2c_xfer()
682 dev->cli.count = msgs[i].len; in nmk_i2c_xfer()
683 dev->stop = (i < (num_msgs - 1)) ? 0 : 1; in nmk_i2c_xfer()
684 dev->result = 0; in nmk_i2c_xfer()
694 pm_runtime_put_sync(&dev->adev->dev); in nmk_i2c_xfer()
704 * disable_interrupts() - disable the interrupts
711 writel(readl(dev->virtbase + I2C_IMSCR) & ~(I2C_CLEAR_ALL_INTS & irq), in disable_interrupts()
712 dev->virtbase + I2C_IMSCR); in disable_interrupts()
717 * i2c_irq_handler() - interrupt routine
721 * This is the interrupt handler for the i2c driver. Currently
735 tft = readl(dev->virtbase + I2C_TFTR); in i2c_irq_handler()
736 rft = readl(dev->virtbase + I2C_RFTR); in i2c_irq_handler()
739 misr = readl(dev->virtbase + I2C_MISR); in i2c_irq_handler()
747 if (dev->cli.operation == I2C_READ) { in i2c_irq_handler()
754 fill_tx_fifo(dev, (MAX_I2C_FIFO_THRESHOLD - tft)); in i2c_irq_handler()
759 if (dev->cli.count == 0) in i2c_irq_handler()
772 for (count = rft; count > 0; count--) { in i2c_irq_handler()
774 *dev->cli.buffer = readb(dev->virtbase + I2C_RFR); in i2c_irq_handler()
775 dev->cli.buffer++; in i2c_irq_handler()
777 dev->cli.count -= rft; in i2c_irq_handler()
778 dev->cli.xfer_bytes += rft; in i2c_irq_handler()
783 for (count = MAX_I2C_FIFO_THRESHOLD; count > 0; count--) { in i2c_irq_handler()
784 *dev->cli.buffer = readb(dev->virtbase + I2C_RFR); in i2c_irq_handler()
785 dev->cli.buffer++; in i2c_irq_handler()
787 dev->cli.count -= MAX_I2C_FIFO_THRESHOLD; in i2c_irq_handler()
788 dev->cli.xfer_bytes += MAX_I2C_FIFO_THRESHOLD; in i2c_irq_handler()
794 if (dev->cli.operation == I2C_READ) { in i2c_irq_handler()
795 while (!(readl(dev->virtbase + I2C_RISR) in i2c_irq_handler()
797 if (dev->cli.count == 0) in i2c_irq_handler()
799 *dev->cli.buffer = in i2c_irq_handler()
800 readb(dev->virtbase + I2C_RFR); in i2c_irq_handler()
801 dev->cli.buffer++; in i2c_irq_handler()
802 dev->cli.count--; in i2c_irq_handler()
803 dev->cli.xfer_bytes++; in i2c_irq_handler()
810 if (dev->cli.count) { in i2c_irq_handler()
811 dev->result = -EIO; in i2c_irq_handler()
812 dev_err(&dev->adev->dev, in i2c_irq_handler()
814 dev->cli.count); in i2c_irq_handler()
817 complete(&dev->xfer_complete); in i2c_irq_handler()
823 dev->result = -EIO; in i2c_irq_handler()
826 i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MAL); in i2c_irq_handler()
827 complete(&dev->xfer_complete); in i2c_irq_handler()
837 dev->result = -EIO; in i2c_irq_handler()
839 if (((readl(dev->virtbase + I2C_SR) >> 2) & 0x3) == I2C_ABORT) in i2c_irq_handler()
842 i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_BERR); in i2c_irq_handler()
843 complete(&dev->xfer_complete); in i2c_irq_handler()
853 dev->result = -EIO; in i2c_irq_handler()
856 dev_err(&dev->adev->dev, "Tx Fifo Over run\n"); in i2c_irq_handler()
857 complete(&dev->xfer_complete); in i2c_irq_handler()
861 /* unhandled interrupts by this driver - TODO*/ in i2c_irq_handler()
869 dev_err(&dev->adev->dev, "unhandled Interrupt\n"); in i2c_irq_handler()
872 dev_err(&dev->adev->dev, "spurious Interrupt..\n"); in i2c_irq_handler()
904 clk_disable_unprepare(nmk_i2c->clk); in nmk_i2c_runtime_suspend()
915 ret = clk_prepare_enable(nmk_i2c->clk); in nmk_i2c_runtime_resume()
925 clk_disable_unprepare(nmk_i2c->clk); in nmk_i2c_runtime_resume()
954 if (of_property_read_u32(np, "clock-frequency", &nmk->clk_freq)) in nmk_i2c_of_probe()
955 nmk->clk_freq = 100000; in nmk_i2c_of_probe()
957 /* This driver only supports 'standard' and 'fast' modes of operation. */ in nmk_i2c_of_probe()
958 if (nmk->clk_freq <= 100000) in nmk_i2c_of_probe()
959 nmk->sm = I2C_FREQ_MODE_STANDARD; in nmk_i2c_of_probe()
961 nmk->sm = I2C_FREQ_MODE_FAST; in nmk_i2c_of_probe()
962 nmk->tft = 1; /* Tx FIFO threshold */ in nmk_i2c_of_probe()
963 nmk->rft = 8; /* Rx FIFO threshold */ in nmk_i2c_of_probe()
964 nmk->timeout = 200; /* Slave response timeout(ms) */ in nmk_i2c_of_probe()
970 struct device_node *np = adev->dev.of_node; in nmk_i2c_probe()
973 struct i2c_vendor_data *vendor = id->data; in nmk_i2c_probe()
974 u32 max_fifo_threshold = (vendor->fifodepth / 2) - 1; in nmk_i2c_probe()
976 dev = devm_kzalloc(&adev->dev, sizeof(struct nmk_i2c_dev), GFP_KERNEL); in nmk_i2c_probe()
978 dev_err(&adev->dev, "cannot allocate memory\n"); in nmk_i2c_probe()
979 ret = -ENOMEM; in nmk_i2c_probe()
982 dev->vendor = vendor; in nmk_i2c_probe()
983 dev->adev = adev; in nmk_i2c_probe()
986 if (dev->tft > max_fifo_threshold) { in nmk_i2c_probe()
987 dev_warn(&adev->dev, "requested TX FIFO threshold %u, adjusted down to %u\n", in nmk_i2c_probe()
988 dev->tft, max_fifo_threshold); in nmk_i2c_probe()
989 dev->tft = max_fifo_threshold; in nmk_i2c_probe()
992 if (dev->rft > max_fifo_threshold) { in nmk_i2c_probe()
993 dev_warn(&adev->dev, "requested RX FIFO threshold %u, adjusted down to %u\n", in nmk_i2c_probe()
994 dev->rft, max_fifo_threshold); in nmk_i2c_probe()
995 dev->rft = max_fifo_threshold; in nmk_i2c_probe()
1000 dev->virtbase = devm_ioremap(&adev->dev, adev->res.start, in nmk_i2c_probe()
1001 resource_size(&adev->res)); in nmk_i2c_probe()
1002 if (!dev->virtbase) { in nmk_i2c_probe()
1003 ret = -ENOMEM; in nmk_i2c_probe()
1007 dev->irq = adev->irq[0]; in nmk_i2c_probe()
1008 ret = devm_request_irq(&adev->dev, dev->irq, i2c_irq_handler, 0, in nmk_i2c_probe()
1011 dev_err(&adev->dev, "cannot claim the irq %d\n", dev->irq); in nmk_i2c_probe()
1015 dev->clk = devm_clk_get(&adev->dev, NULL); in nmk_i2c_probe()
1016 if (IS_ERR(dev->clk)) { in nmk_i2c_probe()
1017 dev_err(&adev->dev, "could not get i2c clock\n"); in nmk_i2c_probe()
1018 ret = PTR_ERR(dev->clk); in nmk_i2c_probe()
1022 ret = clk_prepare_enable(dev->clk); in nmk_i2c_probe()
1024 dev_err(&adev->dev, "can't prepare_enable clock\n"); in nmk_i2c_probe()
1030 adap = &dev->adap; in nmk_i2c_probe()
1031 adap->dev.of_node = np; in nmk_i2c_probe()
1032 adap->dev.parent = &adev->dev; in nmk_i2c_probe()
1033 adap->owner = THIS_MODULE; in nmk_i2c_probe()
1034 adap->class = I2C_CLASS_DEPRECATED; in nmk_i2c_probe()
1035 adap->algo = &nmk_i2c_algo; in nmk_i2c_probe()
1036 adap->timeout = msecs_to_jiffies(dev->timeout); in nmk_i2c_probe()
1037 snprintf(adap->name, sizeof(adap->name), in nmk_i2c_probe()
1038 "Nomadik I2C at %pR", &adev->res); in nmk_i2c_probe()
1042 dev_info(&adev->dev, in nmk_i2c_probe()
1044 adap->name, dev->virtbase); in nmk_i2c_probe()
1050 pm_runtime_put(&adev->dev); in nmk_i2c_probe()
1055 clk_disable_unprepare(dev->clk); in nmk_i2c_probe()
1063 struct resource *res = &adev->res; in nmk_i2c_remove()
1066 i2c_del_adapter(&dev->adap); in nmk_i2c_remove()
1071 i2c_clr_bit(dev->virtbase + I2C_CR, I2C_CR_PE); in nmk_i2c_remove()
1072 clk_disable_unprepare(dev->clk); in nmk_i2c_remove()
1074 release_mem_region(res->start, resource_size(res)); in nmk_i2c_remove()
1130 MODULE_DESCRIPTION("Nomadik/Ux500 I2C driver");