Lines Matching +full:rk3188 +full:- +full:i2c
2 * Driver for I2C adapter in Rockchip RK3xxx SoC
14 #include <linux/i2c.h>
89 * @min_setup_start_ns: min set-up time for a repeated START conditio
91 * @min_data_setup_ns: min data set-up time
92 * @min_setup_stop_ns: min set-up time for STOP condition
165 * @grf_offset: offset inside the grf regmap for setting the i2c type
166 * @calc_timings: Callback function for i2c timing information calculated
175 * struct rk3x_i2c - private data of the controller
176 * @adap: corresponding I2C adapter
182 * @clk_rate_nb: i2c clk rate change notify
183 * @t: I2C known timing information
184 * @lock: spinlock for the i2c bus
185 * @wait: the waitqueue to wait for i2c transfer
187 * @msg: current i2c message
188 * @addr: addr of i2c slave device
189 * @mode: mode of i2c transfer
191 * @state: state of i2c transfer
193 * @error: error code for i2c transfer
220 /* I2C state machine */
226 static inline void i2c_writel(struct rk3x_i2c *i2c, u32 value, in i2c_writel() argument
229 writel(value, i2c->regs + offset); in i2c_writel()
232 static inline u32 i2c_readl(struct rk3x_i2c *i2c, unsigned int offset) in i2c_readl() argument
234 return readl(i2c->regs + offset); in i2c_readl()
238 static inline void rk3x_i2c_clean_ipd(struct rk3x_i2c *i2c) in rk3x_i2c_clean_ipd() argument
240 i2c_writel(i2c, REG_INT_ALL, REG_IPD); in rk3x_i2c_clean_ipd()
246 static void rk3x_i2c_start(struct rk3x_i2c *i2c) in rk3x_i2c_start() argument
248 u32 val = i2c_readl(i2c, REG_CON) & REG_CON_TUNING_MASK; in rk3x_i2c_start()
250 i2c_writel(i2c, REG_INT_START, REG_IEN); in rk3x_i2c_start()
253 val |= REG_CON_EN | REG_CON_MOD(i2c->mode) | REG_CON_START; in rk3x_i2c_start()
256 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) in rk3x_i2c_start()
259 i2c_writel(i2c, val, REG_CON); in rk3x_i2c_start()
267 static void rk3x_i2c_stop(struct rk3x_i2c *i2c, int error) in rk3x_i2c_stop() argument
271 i2c->processed = 0; in rk3x_i2c_stop()
272 i2c->msg = NULL; in rk3x_i2c_stop()
273 i2c->error = error; in rk3x_i2c_stop()
275 if (i2c->is_last_msg) { in rk3x_i2c_stop()
277 i2c_writel(i2c, REG_INT_STOP, REG_IEN); in rk3x_i2c_stop()
279 i2c->state = STATE_STOP; in rk3x_i2c_stop()
281 ctrl = i2c_readl(i2c, REG_CON); in rk3x_i2c_stop()
283 i2c_writel(i2c, ctrl, REG_CON); in rk3x_i2c_stop()
286 i2c->busy = false; in rk3x_i2c_stop()
287 i2c->state = STATE_IDLE; in rk3x_i2c_stop()
294 ctrl = i2c_readl(i2c, REG_CON) & REG_CON_TUNING_MASK; in rk3x_i2c_stop()
295 i2c_writel(i2c, ctrl, REG_CON); in rk3x_i2c_stop()
298 wake_up(&i2c->wait); in rk3x_i2c_stop()
303 * Setup a read according to i2c->msg
305 static void rk3x_i2c_prepare_read(struct rk3x_i2c *i2c) in rk3x_i2c_prepare_read() argument
307 unsigned int len = i2c->msg->len - i2c->processed; in rk3x_i2c_prepare_read()
310 con = i2c_readl(i2c, REG_CON); in rk3x_i2c_prepare_read()
324 if (i2c->processed != 0) { in rk3x_i2c_prepare_read()
329 i2c_writel(i2c, con, REG_CON); in rk3x_i2c_prepare_read()
330 i2c_writel(i2c, len, REG_MRXCNT); in rk3x_i2c_prepare_read()
334 * Fill the transmit buffer with data from i2c->msg
336 static void rk3x_i2c_fill_transmit_buf(struct rk3x_i2c *i2c) in rk3x_i2c_fill_transmit_buf() argument
346 if ((i2c->processed == i2c->msg->len) && (cnt != 0)) in rk3x_i2c_fill_transmit_buf()
349 if (i2c->processed == 0 && cnt == 0) in rk3x_i2c_fill_transmit_buf()
350 byte = (i2c->addr & 0x7f) << 1; in rk3x_i2c_fill_transmit_buf()
352 byte = i2c->msg->buf[i2c->processed++]; in rk3x_i2c_fill_transmit_buf()
358 i2c_writel(i2c, val, TXBUFFER_BASE + 4 * i); in rk3x_i2c_fill_transmit_buf()
360 if (i2c->processed == i2c->msg->len) in rk3x_i2c_fill_transmit_buf()
364 i2c_writel(i2c, cnt, REG_MTXCNT); in rk3x_i2c_fill_transmit_buf()
370 static void rk3x_i2c_handle_start(struct rk3x_i2c *i2c, unsigned int ipd) in rk3x_i2c_handle_start() argument
373 rk3x_i2c_stop(i2c, -EIO); in rk3x_i2c_handle_start()
374 dev_warn(i2c->dev, "unexpected irq in START: 0x%x\n", ipd); in rk3x_i2c_handle_start()
375 rk3x_i2c_clean_ipd(i2c); in rk3x_i2c_handle_start()
380 i2c_writel(i2c, REG_INT_START, REG_IPD); in rk3x_i2c_handle_start()
383 i2c_writel(i2c, i2c_readl(i2c, REG_CON) & ~REG_CON_START, REG_CON); in rk3x_i2c_handle_start()
386 if (i2c->mode == REG_CON_MOD_TX) { in rk3x_i2c_handle_start()
387 i2c_writel(i2c, REG_INT_MBTF | REG_INT_NAKRCV, REG_IEN); in rk3x_i2c_handle_start()
388 i2c->state = STATE_WRITE; in rk3x_i2c_handle_start()
389 rk3x_i2c_fill_transmit_buf(i2c); in rk3x_i2c_handle_start()
392 i2c_writel(i2c, REG_INT_MBRF | REG_INT_NAKRCV, REG_IEN); in rk3x_i2c_handle_start()
393 i2c->state = STATE_READ; in rk3x_i2c_handle_start()
394 rk3x_i2c_prepare_read(i2c); in rk3x_i2c_handle_start()
398 static void rk3x_i2c_handle_write(struct rk3x_i2c *i2c, unsigned int ipd) in rk3x_i2c_handle_write() argument
401 rk3x_i2c_stop(i2c, -EIO); in rk3x_i2c_handle_write()
402 dev_err(i2c->dev, "unexpected irq in WRITE: 0x%x\n", ipd); in rk3x_i2c_handle_write()
403 rk3x_i2c_clean_ipd(i2c); in rk3x_i2c_handle_write()
408 i2c_writel(i2c, REG_INT_MBTF, REG_IPD); in rk3x_i2c_handle_write()
411 if (i2c->processed == i2c->msg->len) in rk3x_i2c_handle_write()
412 rk3x_i2c_stop(i2c, i2c->error); in rk3x_i2c_handle_write()
414 rk3x_i2c_fill_transmit_buf(i2c); in rk3x_i2c_handle_write()
417 static void rk3x_i2c_handle_read(struct rk3x_i2c *i2c, unsigned int ipd) in rk3x_i2c_handle_read() argument
420 unsigned int len = i2c->msg->len - i2c->processed; in rk3x_i2c_handle_read()
429 i2c_writel(i2c, REG_INT_MBRF, REG_IPD); in rk3x_i2c_handle_read()
438 val = i2c_readl(i2c, RXBUFFER_BASE + (i / 4) * 4); in rk3x_i2c_handle_read()
441 i2c->msg->buf[i2c->processed++] = byte; in rk3x_i2c_handle_read()
445 if (i2c->processed == i2c->msg->len) in rk3x_i2c_handle_read()
446 rk3x_i2c_stop(i2c, i2c->error); in rk3x_i2c_handle_read()
448 rk3x_i2c_prepare_read(i2c); in rk3x_i2c_handle_read()
451 static void rk3x_i2c_handle_stop(struct rk3x_i2c *i2c, unsigned int ipd) in rk3x_i2c_handle_stop() argument
456 rk3x_i2c_stop(i2c, -EIO); in rk3x_i2c_handle_stop()
457 dev_err(i2c->dev, "unexpected irq in STOP: 0x%x\n", ipd); in rk3x_i2c_handle_stop()
458 rk3x_i2c_clean_ipd(i2c); in rk3x_i2c_handle_stop()
463 i2c_writel(i2c, REG_INT_STOP, REG_IPD); in rk3x_i2c_handle_stop()
466 con = i2c_readl(i2c, REG_CON); in rk3x_i2c_handle_stop()
468 i2c_writel(i2c, con, REG_CON); in rk3x_i2c_handle_stop()
470 i2c->busy = false; in rk3x_i2c_handle_stop()
471 i2c->state = STATE_IDLE; in rk3x_i2c_handle_stop()
474 wake_up(&i2c->wait); in rk3x_i2c_handle_stop()
479 struct rk3x_i2c *i2c = dev_id; in rk3x_i2c_irq() local
482 spin_lock(&i2c->lock); in rk3x_i2c_irq()
484 ipd = i2c_readl(i2c, REG_IPD); in rk3x_i2c_irq()
485 if (i2c->state == STATE_IDLE) { in rk3x_i2c_irq()
486 dev_warn(i2c->dev, "irq in STATE_IDLE, ipd = 0x%x\n", ipd); in rk3x_i2c_irq()
487 rk3x_i2c_clean_ipd(i2c); in rk3x_i2c_irq()
491 dev_dbg(i2c->dev, "IRQ: state %d, ipd: %x\n", i2c->state, ipd); in rk3x_i2c_irq()
502 i2c_writel(i2c, REG_INT_NAKRCV, REG_IPD); in rk3x_i2c_irq()
506 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) in rk3x_i2c_irq()
507 rk3x_i2c_stop(i2c, -ENXIO); in rk3x_i2c_irq()
514 switch (i2c->state) { in rk3x_i2c_irq()
516 rk3x_i2c_handle_start(i2c, ipd); in rk3x_i2c_irq()
519 rk3x_i2c_handle_write(i2c, ipd); in rk3x_i2c_irq()
522 rk3x_i2c_handle_read(i2c, ipd); in rk3x_i2c_irq()
525 rk3x_i2c_handle_stop(i2c, ipd); in rk3x_i2c_irq()
532 spin_unlock(&i2c->lock); in rk3x_i2c_irq()
537 * Get timing values of I2C specification
541 * Returns: Matched i2c spec values.
556 * @clk_rate: I2C input clock rate
557 * @t: Known I2C timing information
560 * Returns: 0 on success, -EINVAL if the goal SCL rate is too slow. In that case
561 * a best-effort divider value is returned in divs. If the target rate is
583 /* Only support standard-mode and fast-mode */ in rk3x_i2c_v0_calc_timings()
584 if (WARN_ON(t->bus_freq_hz > 400000)) in rk3x_i2c_v0_calc_timings()
585 t->bus_freq_hz = 400000; in rk3x_i2c_v0_calc_timings()
588 if (WARN_ON(t->bus_freq_hz < 1000)) in rk3x_i2c_v0_calc_timings()
589 t->bus_freq_hz = 1000; in rk3x_i2c_v0_calc_timings()
593 * meet I2C specification, should include fall time. in rk3x_i2c_v0_calc_timings()
595 * meet I2C specification, should include rise time. in rk3x_i2c_v0_calc_timings()
597 * I2C specification. in rk3x_i2c_v0_calc_timings()
599 * Note: max_low_ns should be (maximum data hold time * 2 - buffer) in rk3x_i2c_v0_calc_timings()
600 * This is because the i2c host on Rockchip holds the data line in rk3x_i2c_v0_calc_timings()
603 spec = rk3x_i2c_get_spec(t->bus_freq_hz); in rk3x_i2c_v0_calc_timings()
604 min_high_ns = t->scl_rise_ns + spec->min_high_ns; in rk3x_i2c_v0_calc_timings()
608 * - controller appears to drop SDA at .875x (7/8) programmed clk high. in rk3x_i2c_v0_calc_timings()
609 * - controller appears to keep SCL high for 2x programmed clk high. in rk3x_i2c_v0_calc_timings()
615 (t->scl_rise_ns + spec->min_setup_start_ns) * 1000, 875)); in rk3x_i2c_v0_calc_timings()
617 (t->scl_rise_ns + spec->min_setup_start_ns + t->sda_fall_ns + in rk3x_i2c_v0_calc_timings()
618 spec->min_high_ns), 2)); in rk3x_i2c_v0_calc_timings()
620 min_low_ns = t->scl_fall_ns + spec->min_low_ns; in rk3x_i2c_v0_calc_timings()
621 max_low_ns = spec->max_data_hold_ns * 2 - data_hold_buffer_ns; in rk3x_i2c_v0_calc_timings()
626 scl_rate_khz = t->bus_freq_hz / 1000; in rk3x_i2c_v0_calc_timings()
657 t_calc->div_low = min_low_div; in rk3x_i2c_v0_calc_timings()
658 t_calc->div_high = min_high_div; in rk3x_i2c_v0_calc_timings()
664 extra_div = min_total_div - min_div_for_hold; in rk3x_i2c_v0_calc_timings()
686 extra_low_div = ideal_low_div - min_low_div; in rk3x_i2c_v0_calc_timings()
687 t_calc->div_low = ideal_low_div; in rk3x_i2c_v0_calc_timings()
688 t_calc->div_high = min_high_div + (extra_div - extra_low_div); in rk3x_i2c_v0_calc_timings()
695 t_calc->div_low--; in rk3x_i2c_v0_calc_timings()
696 t_calc->div_high--; in rk3x_i2c_v0_calc_timings()
699 t_calc->tuning = 0; in rk3x_i2c_v0_calc_timings()
701 if (t_calc->div_low > 0xffff) { in rk3x_i2c_v0_calc_timings()
702 t_calc->div_low = 0xffff; in rk3x_i2c_v0_calc_timings()
703 ret = -EINVAL; in rk3x_i2c_v0_calc_timings()
706 if (t_calc->div_high > 0xffff) { in rk3x_i2c_v0_calc_timings()
707 t_calc->div_high = 0xffff; in rk3x_i2c_v0_calc_timings()
708 ret = -EINVAL; in rk3x_i2c_v0_calc_timings()
717 * @clk_rate: I2C input clock rate
718 * @t: Known I2C timing information
721 * Returns: 0 on success, -EINVAL if the goal SCL rate is too slow. In that case
722 * a best-effort divider value is returned in divs. If the target rate is
737 * tSU;sda = [(8 - s) * l + 1] * T;
741 * tHD;sta = [8h * (u + 1) - 1] * T;
763 /* Support standard-mode, fast-mode and fast-mode plus */ in rk3x_i2c_v1_calc_timings()
764 if (WARN_ON(t->bus_freq_hz > 1000000)) in rk3x_i2c_v1_calc_timings()
765 t->bus_freq_hz = 1000000; in rk3x_i2c_v1_calc_timings()
768 if (WARN_ON(t->bus_freq_hz < 1000)) in rk3x_i2c_v1_calc_timings()
769 t->bus_freq_hz = 1000; in rk3x_i2c_v1_calc_timings()
773 * meet I2C specification, should include fall time. in rk3x_i2c_v1_calc_timings()
775 * meet I2C specification, should include rise time. in rk3x_i2c_v1_calc_timings()
777 spec = rk3x_i2c_get_spec(t->bus_freq_hz); in rk3x_i2c_v1_calc_timings()
779 /* calculate min-divh and min-divl */ in rk3x_i2c_v1_calc_timings()
781 scl_rate_khz = t->bus_freq_hz / 1000; in rk3x_i2c_v1_calc_timings()
784 min_high_ns = t->scl_rise_ns + spec->min_high_ns; in rk3x_i2c_v1_calc_timings()
787 min_low_ns = t->scl_fall_ns + spec->min_low_ns; in rk3x_i2c_v1_calc_timings()
792 * hardware would not output the i2c clk. in rk3x_i2c_v1_calc_timings()
809 t_calc->div_low = min_low_div; in rk3x_i2c_v1_calc_timings()
810 t_calc->div_high = min_high_div; in rk3x_i2c_v1_calc_timings()
819 extra_div = min_total_div - min_div_for_hold; in rk3x_i2c_v1_calc_timings()
823 t_calc->div_low = min_low_div + extra_low_div; in rk3x_i2c_v1_calc_timings()
824 t_calc->div_high = min_high_div + (extra_div - extra_low_div); in rk3x_i2c_v1_calc_timings()
831 for (sda_update_cfg = 3; sda_update_cfg > 0; sda_update_cfg--) { in rk3x_i2c_v1_calc_timings()
833 * (t_calc->div_low) + 1) in rk3x_i2c_v1_calc_timings()
835 min_setup_data_ns = DIV_ROUND_UP(((8 - sda_update_cfg) in rk3x_i2c_v1_calc_timings()
836 * (t_calc->div_low) + 1) in rk3x_i2c_v1_calc_timings()
838 if ((max_hold_data_ns < spec->max_data_hold_ns) && in rk3x_i2c_v1_calc_timings()
839 (min_setup_data_ns > spec->min_data_setup_ns)) in rk3x_i2c_v1_calc_timings()
844 min_setup_start_ns = t->scl_rise_ns + spec->min_setup_start_ns; in rk3x_i2c_v1_calc_timings()
846 - 1000000, 8 * 1000000 * (t_calc->div_high)); in rk3x_i2c_v1_calc_timings()
849 min_setup_stop_ns = t->scl_rise_ns + spec->min_setup_stop_ns; in rk3x_i2c_v1_calc_timings()
851 - 1000000, 8 * 1000000 * (t_calc->div_high)); in rk3x_i2c_v1_calc_timings()
853 t_calc->tuning = REG_CON_SDA_CFG(--sda_update_cfg) | in rk3x_i2c_v1_calc_timings()
854 REG_CON_STA_CFG(--stp_sta_cfg) | in rk3x_i2c_v1_calc_timings()
855 REG_CON_STO_CFG(--stp_sto_cfg); in rk3x_i2c_v1_calc_timings()
857 t_calc->div_low--; in rk3x_i2c_v1_calc_timings()
858 t_calc->div_high--; in rk3x_i2c_v1_calc_timings()
861 if (t_calc->div_low > 0xffff) { in rk3x_i2c_v1_calc_timings()
862 t_calc->div_low = 0xffff; in rk3x_i2c_v1_calc_timings()
863 ret = -EINVAL; in rk3x_i2c_v1_calc_timings()
866 if (t_calc->div_high > 0xffff) { in rk3x_i2c_v1_calc_timings()
867 t_calc->div_high = 0xffff; in rk3x_i2c_v1_calc_timings()
868 ret = -EINVAL; in rk3x_i2c_v1_calc_timings()
874 static void rk3x_i2c_adapt_div(struct rk3x_i2c *i2c, unsigned long clk_rate) in rk3x_i2c_adapt_div() argument
876 struct i2c_timings *t = &i2c->t; in rk3x_i2c_adapt_div()
883 ret = i2c->soc_data->calc_timings(clk_rate, t, &calc); in rk3x_i2c_adapt_div()
884 WARN_ONCE(ret != 0, "Could not reach SCL freq %u", t->bus_freq_hz); in rk3x_i2c_adapt_div()
886 clk_enable(i2c->pclk); in rk3x_i2c_adapt_div()
888 spin_lock_irqsave(&i2c->lock, flags); in rk3x_i2c_adapt_div()
889 val = i2c_readl(i2c, REG_CON); in rk3x_i2c_adapt_div()
892 i2c_writel(i2c, val, REG_CON); in rk3x_i2c_adapt_div()
893 i2c_writel(i2c, (calc.div_high << 16) | (calc.div_low & 0xffff), in rk3x_i2c_adapt_div()
895 spin_unlock_irqrestore(&i2c->lock, flags); in rk3x_i2c_adapt_div()
897 clk_disable(i2c->pclk); in rk3x_i2c_adapt_div()
902 dev_dbg(i2c->dev, in rk3x_i2c_adapt_div()
905 1000000000 / t->bus_freq_hz, in rk3x_i2c_adapt_div()
910 * rk3x_i2c_clk_notifier_cb - Clock rate change callback
917 * New dividers are written to the HW in the pre- or post change notification
920 * Code adapted from i2c-cadence.c.
930 struct rk3x_i2c *i2c = container_of(nb, struct rk3x_i2c, clk_rate_nb); in rk3x_i2c_clk_notifier_cb() local
940 if (i2c->soc_data->calc_timings(ndata->new_rate, &i2c->t, in rk3x_i2c_clk_notifier_cb()
945 if (ndata->new_rate > ndata->old_rate) in rk3x_i2c_clk_notifier_cb()
946 rk3x_i2c_adapt_div(i2c, ndata->new_rate); in rk3x_i2c_clk_notifier_cb()
951 if (ndata->new_rate < ndata->old_rate) in rk3x_i2c_clk_notifier_cb()
952 rk3x_i2c_adapt_div(i2c, ndata->new_rate); in rk3x_i2c_clk_notifier_cb()
956 if (ndata->new_rate > ndata->old_rate) in rk3x_i2c_clk_notifier_cb()
957 rk3x_i2c_adapt_div(i2c, ndata->old_rate); in rk3x_i2c_clk_notifier_cb()
965 * Setup I2C registers for an I2C operation specified by msgs, num.
967 * Must be called with i2c->lock held.
969 * @msgs: I2C msgs to process
972 * returns: Number of I2C msgs processed or negative in case of error
974 static int rk3x_i2c_setup(struct rk3x_i2c *i2c, struct i2c_msg *msgs, int num) in rk3x_i2c_setup() argument
980 * The I2C adapter can issue a small (len < 4) write packet before in rk3x_i2c_setup()
981 * reading. This speeds up SMBus-style register reads. in rk3x_i2c_setup()
991 dev_dbg(i2c->dev, "Combined write/read from addr 0x%x\n", in rk3x_i2c_setup()
1001 i2c->msg = &msgs[1]; in rk3x_i2c_setup()
1003 i2c->mode = REG_CON_MOD_REGISTER_TX; in rk3x_i2c_setup()
1005 i2c_writel(i2c, addr | REG_MRXADDR_VALID(0), REG_MRXADDR); in rk3x_i2c_setup()
1006 i2c_writel(i2c, reg_addr, REG_MRXRADDR); in rk3x_i2c_setup()
1012 * one-by-one. in rk3x_i2c_setup()
1022 i2c->mode = REG_CON_MOD_REGISTER_TX; in rk3x_i2c_setup()
1023 i2c_writel(i2c, addr | REG_MRXADDR_VALID(0), in rk3x_i2c_setup()
1025 i2c_writel(i2c, 0, REG_MRXRADDR); in rk3x_i2c_setup()
1027 i2c->mode = REG_CON_MOD_TX; in rk3x_i2c_setup()
1030 i2c->msg = &msgs[0]; in rk3x_i2c_setup()
1035 i2c->addr = msgs[0].addr; in rk3x_i2c_setup()
1036 i2c->busy = true; in rk3x_i2c_setup()
1037 i2c->state = STATE_START; in rk3x_i2c_setup()
1038 i2c->processed = 0; in rk3x_i2c_setup()
1039 i2c->error = 0; in rk3x_i2c_setup()
1041 rk3x_i2c_clean_ipd(i2c); in rk3x_i2c_setup()
1049 struct rk3x_i2c *i2c = (struct rk3x_i2c *)adap->algo_data; in rk3x_i2c_xfer() local
1055 spin_lock_irqsave(&i2c->lock, flags); in rk3x_i2c_xfer()
1057 clk_enable(i2c->clk); in rk3x_i2c_xfer()
1058 clk_enable(i2c->pclk); in rk3x_i2c_xfer()
1060 i2c->is_last_msg = false; in rk3x_i2c_xfer()
1067 ret = rk3x_i2c_setup(i2c, msgs + i, num - i); in rk3x_i2c_xfer()
1070 dev_err(i2c->dev, "rk3x_i2c_setup() failed\n"); in rk3x_i2c_xfer()
1075 i2c->is_last_msg = true; in rk3x_i2c_xfer()
1077 spin_unlock_irqrestore(&i2c->lock, flags); in rk3x_i2c_xfer()
1079 rk3x_i2c_start(i2c); in rk3x_i2c_xfer()
1081 timeout = wait_event_timeout(i2c->wait, !i2c->busy, in rk3x_i2c_xfer()
1084 spin_lock_irqsave(&i2c->lock, flags); in rk3x_i2c_xfer()
1087 dev_err(i2c->dev, "timeout, ipd: 0x%02x, state: %d\n", in rk3x_i2c_xfer()
1088 i2c_readl(i2c, REG_IPD), i2c->state); in rk3x_i2c_xfer()
1091 i2c_writel(i2c, 0, REG_IEN); in rk3x_i2c_xfer()
1092 val = i2c_readl(i2c, REG_CON) & REG_CON_TUNING_MASK; in rk3x_i2c_xfer()
1094 i2c_writel(i2c, val, REG_CON); in rk3x_i2c_xfer()
1096 i2c->state = STATE_IDLE; in rk3x_i2c_xfer()
1098 ret = -ETIMEDOUT; in rk3x_i2c_xfer()
1102 if (i2c->error) { in rk3x_i2c_xfer()
1103 ret = i2c->error; in rk3x_i2c_xfer()
1108 clk_disable(i2c->pclk); in rk3x_i2c_xfer()
1109 clk_disable(i2c->clk); in rk3x_i2c_xfer()
1111 spin_unlock_irqrestore(&i2c->lock, flags); in rk3x_i2c_xfer()
1118 struct rk3x_i2c *i2c = dev_get_drvdata(dev); in rk3x_i2c_resume() local
1120 rk3x_i2c_adapt_div(i2c, clk_get_rate(i2c->clk)); in rk3x_i2c_resume()
1136 .grf_offset = -1,
1151 .grf_offset = -1,
1156 .grf_offset = -1,
1161 .grf_offset = -1,
1167 .compatible = "rockchip,rv1108-i2c",
1171 .compatible = "rockchip,rk3066-i2c",
1175 .compatible = "rockchip,rk3188-i2c",
1179 .compatible = "rockchip,rk3228-i2c",
1183 .compatible = "rockchip,rk3288-i2c",
1187 .compatible = "rockchip,rk3399-i2c",
1196 struct device_node *np = pdev->dev.of_node; in rk3x_i2c_probe()
1198 struct rk3x_i2c *i2c; in rk3x_i2c_probe() local
1206 i2c = devm_kzalloc(&pdev->dev, sizeof(struct rk3x_i2c), GFP_KERNEL); in rk3x_i2c_probe()
1207 if (!i2c) in rk3x_i2c_probe()
1208 return -ENOMEM; in rk3x_i2c_probe()
1211 i2c->soc_data = match->data; in rk3x_i2c_probe()
1213 /* use common interface to get I2C timing properties */ in rk3x_i2c_probe()
1214 i2c_parse_fw_timings(&pdev->dev, &i2c->t, true); in rk3x_i2c_probe()
1216 strlcpy(i2c->adap.name, "rk3x-i2c", sizeof(i2c->adap.name)); in rk3x_i2c_probe()
1217 i2c->adap.owner = THIS_MODULE; in rk3x_i2c_probe()
1218 i2c->adap.algo = &rk3x_i2c_algorithm; in rk3x_i2c_probe()
1219 i2c->adap.retries = 3; in rk3x_i2c_probe()
1220 i2c->adap.dev.of_node = np; in rk3x_i2c_probe()
1221 i2c->adap.algo_data = i2c; in rk3x_i2c_probe()
1222 i2c->adap.dev.parent = &pdev->dev; in rk3x_i2c_probe()
1224 i2c->dev = &pdev->dev; in rk3x_i2c_probe()
1226 spin_lock_init(&i2c->lock); in rk3x_i2c_probe()
1227 init_waitqueue_head(&i2c->wait); in rk3x_i2c_probe()
1230 i2c->regs = devm_ioremap_resource(&pdev->dev, mem); in rk3x_i2c_probe()
1231 if (IS_ERR(i2c->regs)) in rk3x_i2c_probe()
1232 return PTR_ERR(i2c->regs); in rk3x_i2c_probe()
1234 /* Try to set the I2C adapter number from dt */ in rk3x_i2c_probe()
1235 bus_nr = of_alias_get_id(np, "i2c"); in rk3x_i2c_probe()
1241 if (i2c->soc_data->grf_offset >= 0) { in rk3x_i2c_probe()
1246 dev_err(&pdev->dev, in rk3x_i2c_probe()
1247 "rk3x-i2c needs 'rockchip,grf' property\n"); in rk3x_i2c_probe()
1252 dev_err(&pdev->dev, "rk3x-i2c needs i2cX alias"); in rk3x_i2c_probe()
1253 return -EINVAL; in rk3x_i2c_probe()
1259 ret = regmap_write(grf, i2c->soc_data->grf_offset, value); in rk3x_i2c_probe()
1261 dev_err(i2c->dev, "Could not write to GRF: %d\n", ret); in rk3x_i2c_probe()
1269 dev_err(&pdev->dev, "cannot find rk3x IRQ\n"); in rk3x_i2c_probe()
1273 ret = devm_request_irq(&pdev->dev, irq, rk3x_i2c_irq, in rk3x_i2c_probe()
1274 0, dev_name(&pdev->dev), i2c); in rk3x_i2c_probe()
1276 dev_err(&pdev->dev, "cannot request IRQ\n"); in rk3x_i2c_probe()
1280 platform_set_drvdata(pdev, i2c); in rk3x_i2c_probe()
1282 if (i2c->soc_data->calc_timings == rk3x_i2c_v0_calc_timings) { in rk3x_i2c_probe()
1284 i2c->clk = devm_clk_get(&pdev->dev, NULL); in rk3x_i2c_probe()
1285 i2c->pclk = i2c->clk; in rk3x_i2c_probe()
1287 i2c->clk = devm_clk_get(&pdev->dev, "i2c"); in rk3x_i2c_probe()
1288 i2c->pclk = devm_clk_get(&pdev->dev, "pclk"); in rk3x_i2c_probe()
1291 if (IS_ERR(i2c->clk)) { in rk3x_i2c_probe()
1292 ret = PTR_ERR(i2c->clk); in rk3x_i2c_probe()
1293 if (ret != -EPROBE_DEFER) in rk3x_i2c_probe()
1294 dev_err(&pdev->dev, "Can't get bus clk: %d\n", ret); in rk3x_i2c_probe()
1297 if (IS_ERR(i2c->pclk)) { in rk3x_i2c_probe()
1298 ret = PTR_ERR(i2c->pclk); in rk3x_i2c_probe()
1299 if (ret != -EPROBE_DEFER) in rk3x_i2c_probe()
1300 dev_err(&pdev->dev, "Can't get periph clk: %d\n", ret); in rk3x_i2c_probe()
1304 ret = clk_prepare(i2c->clk); in rk3x_i2c_probe()
1306 dev_err(&pdev->dev, "Can't prepare bus clk: %d\n", ret); in rk3x_i2c_probe()
1309 ret = clk_prepare(i2c->pclk); in rk3x_i2c_probe()
1311 dev_err(&pdev->dev, "Can't prepare periph clock: %d\n", ret); in rk3x_i2c_probe()
1315 i2c->clk_rate_nb.notifier_call = rk3x_i2c_clk_notifier_cb; in rk3x_i2c_probe()
1316 ret = clk_notifier_register(i2c->clk, &i2c->clk_rate_nb); in rk3x_i2c_probe()
1318 dev_err(&pdev->dev, "Unable to register clock notifier\n"); in rk3x_i2c_probe()
1322 clk_rate = clk_get_rate(i2c->clk); in rk3x_i2c_probe()
1323 rk3x_i2c_adapt_div(i2c, clk_rate); in rk3x_i2c_probe()
1325 ret = i2c_add_adapter(&i2c->adap); in rk3x_i2c_probe()
1332 clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb); in rk3x_i2c_probe()
1334 clk_unprepare(i2c->pclk); in rk3x_i2c_probe()
1336 clk_unprepare(i2c->clk); in rk3x_i2c_probe()
1342 struct rk3x_i2c *i2c = platform_get_drvdata(pdev); in rk3x_i2c_remove() local
1344 i2c_del_adapter(&i2c->adap); in rk3x_i2c_remove()
1346 clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb); in rk3x_i2c_remove()
1347 clk_unprepare(i2c->pclk); in rk3x_i2c_remove()
1348 clk_unprepare(i2c->clk); in rk3x_i2c_remove()
1359 .name = "rk3x-i2c",
1367 MODULE_DESCRIPTION("Rockchip RK3xxx I2C Bus driver");