Lines Matching +full:clk +full:- +full:out +full:- +full:frequency
1 /* linux/drivers/i2c/busses/i2c-s3c2410.c
31 #include <linux/clk.h>
43 #include <linux/platform_data/i2c-s3c2410.h>
121 struct clk *clk; member
137 .name = "s3c2410-i2c",
140 .name = "s3c2440-i2c",
143 .name = "s3c2440-hdmiphy-i2c",
153 { .compatible = "samsung,s3c2410-i2c", .data = (void *)0 },
154 { .compatible = "samsung,s3c2440-i2c", .data = (void *)QUIRK_S3C2440 },
155 { .compatible = "samsung,s3c2440-hdmiphy-i2c",
157 { .compatible = "samsung,exynos5-sata-phy-i2c",
169 if (pdev->dev.of_node) { in s3c24xx_get_device_quirks()
172 match = of_match_node(s3c24xx_i2c_match, pdev->dev.of_node); in s3c24xx_get_device_quirks()
173 return (kernel_ulong_t)match->data; in s3c24xx_get_device_quirks()
176 return platform_get_device_id(pdev)->driver_data; in s3c24xx_get_device_quirks()
185 dev_dbg(i2c->dev, "master_complete %d\n", ret); in s3c24xx_i2c_master_complete()
187 i2c->msg_ptr = 0; in s3c24xx_i2c_master_complete()
188 i2c->msg = NULL; in s3c24xx_i2c_master_complete()
189 i2c->msg_idx++; in s3c24xx_i2c_master_complete()
190 i2c->msg_num = 0; in s3c24xx_i2c_master_complete()
192 i2c->msg_idx = ret; in s3c24xx_i2c_master_complete()
194 if (!(i2c->quirks & QUIRK_POLL)) in s3c24xx_i2c_master_complete()
195 wake_up(&i2c->wait); in s3c24xx_i2c_master_complete()
202 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_ack()
203 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_ack()
210 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_ack()
211 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_ack()
219 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_irq()
220 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_irq()
227 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_irq()
228 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_irq()
235 for (tries = 50; tries; --tries) { in is_ack()
236 if (readl(i2c->regs + S3C2410_IICCON) in is_ack()
238 if (!(readl(i2c->regs + S3C2410_IICSTAT) in is_ack()
244 dev_err(i2c->dev, "ack was not received\n"); in is_ack()
254 unsigned int addr = (msg->addr & 0x7f) << 1; in s3c24xx_i2c_message_start()
261 if (msg->flags & I2C_M_RD) { in s3c24xx_i2c_message_start()
267 if (msg->flags & I2C_M_REV_DIR_ADDR) in s3c24xx_i2c_message_start()
270 /* todo - check for whether ack wanted or not */ in s3c24xx_i2c_message_start()
273 iiccon = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_message_start()
274 writel(stat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
276 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr); in s3c24xx_i2c_message_start()
277 writeb(addr, i2c->regs + S3C2410_IICDS); in s3c24xx_i2c_message_start()
283 ndelay(i2c->tx_setup); in s3c24xx_i2c_message_start()
285 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon); in s3c24xx_i2c_message_start()
286 writel(iiccon, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_message_start()
289 writel(stat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
291 if (i2c->quirks & QUIRK_POLL) { in s3c24xx_i2c_message_start()
292 while ((i2c->msg_num != 0) && is_ack(i2c)) { in s3c24xx_i2c_message_start()
294 stat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
297 dev_err(i2c->dev, "deal with arbitration loss\n"); in s3c24xx_i2c_message_start()
304 unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_stop()
306 dev_dbg(i2c->dev, "STOP\n"); in s3c24xx_i2c_stop()
310 * 1) I2CSTAT.5 = 0 - Clear BUSY (or 'generate STOP') in s3c24xx_i2c_stop()
311 * 2) I2CCON.4 = 0 - Clear IRQPEND in s3c24xx_i2c_stop()
313 * 4*) I2CSTAT.4 = 0 - Clear TXRXEN in s3c24xx_i2c_stop()
319 * Master->Slave when they complete generating a STOP condition. in s3c24xx_i2c_stop()
332 * To avoid these extra post-STOP transactions on HDMI phy devices, we in s3c24xx_i2c_stop()
342 if (i2c->quirks & QUIRK_HDMIPHY) { in s3c24xx_i2c_stop()
349 writel(iicstat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_stop()
351 i2c->state = STATE_STOP; in s3c24xx_i2c_stop()
367 return i2c->msg_idx >= (i2c->msg_num - 1); in is_lastmsg()
376 * msg->len is always 1 for the first byte of smbus block read. in is_msglast()
380 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1) in is_msglast()
383 return i2c->msg_ptr == i2c->msg->len-1; in is_msglast()
391 return i2c->msg_ptr >= i2c->msg->len; in is_msgend()
395 * process an interrupt and work out what to do
403 switch (i2c->state) { in i2c_s3c_irq_nextbyte()
406 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__); in i2c_s3c_irq_nextbyte()
407 goto out; in i2c_s3c_irq_nextbyte()
410 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__); in i2c_s3c_irq_nextbyte()
420 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) { in i2c_s3c_irq_nextbyte()
422 dev_dbg(i2c->dev, "ack was not received\n"); in i2c_s3c_irq_nextbyte()
423 s3c24xx_i2c_stop(i2c, -ENXIO); in i2c_s3c_irq_nextbyte()
427 if (i2c->msg->flags & I2C_M_RD) in i2c_s3c_irq_nextbyte()
428 i2c->state = STATE_READ; in i2c_s3c_irq_nextbyte()
430 i2c->state = STATE_WRITE; in i2c_s3c_irq_nextbyte()
436 if (is_lastmsg(i2c) && i2c->msg->len == 0) { in i2c_s3c_irq_nextbyte()
441 if (i2c->state == STATE_READ) in i2c_s3c_irq_nextbyte()
452 * end of the message, and if so, work out what to do in i2c_s3c_irq_nextbyte()
454 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) { in i2c_s3c_irq_nextbyte()
456 dev_dbg(i2c->dev, "WRITE: No Ack\n"); in i2c_s3c_irq_nextbyte()
458 s3c24xx_i2c_stop(i2c, -ECONNREFUSED); in i2c_s3c_irq_nextbyte()
466 byte = i2c->msg->buf[i2c->msg_ptr++]; in i2c_s3c_irq_nextbyte()
467 writeb(byte, i2c->regs + S3C2410_IICDS); in i2c_s3c_irq_nextbyte()
476 ndelay(i2c->tx_setup); in i2c_s3c_irq_nextbyte()
481 dev_dbg(i2c->dev, "WRITE: Next Message\n"); in i2c_s3c_irq_nextbyte()
483 i2c->msg_ptr = 0; in i2c_s3c_irq_nextbyte()
484 i2c->msg_idx++; in i2c_s3c_irq_nextbyte()
485 i2c->msg++; in i2c_s3c_irq_nextbyte()
488 if (i2c->msg->flags & I2C_M_NOSTART) { in i2c_s3c_irq_nextbyte()
490 if (i2c->msg->flags & I2C_M_RD) { in i2c_s3c_irq_nextbyte()
496 s3c24xx_i2c_stop(i2c, -EINVAL); in i2c_s3c_irq_nextbyte()
502 s3c24xx_i2c_message_start(i2c, i2c->msg); in i2c_s3c_irq_nextbyte()
503 i2c->state = STATE_START; in i2c_s3c_irq_nextbyte()
515 * something with it, and then work out whether we are in i2c_s3c_irq_nextbyte()
518 byte = readb(i2c->regs + S3C2410_IICDS); in i2c_s3c_irq_nextbyte()
519 i2c->msg->buf[i2c->msg_ptr++] = byte; in i2c_s3c_irq_nextbyte()
522 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1) in i2c_s3c_irq_nextbyte()
523 i2c->msg->len += byte; in i2c_s3c_irq_nextbyte()
538 dev_dbg(i2c->dev, "READ: Send Stop\n"); in i2c_s3c_irq_nextbyte()
543 dev_dbg(i2c->dev, "READ: Next Transfer\n"); in i2c_s3c_irq_nextbyte()
545 i2c->msg_ptr = 0; in i2c_s3c_irq_nextbyte()
546 i2c->msg_idx++; in i2c_s3c_irq_nextbyte()
547 i2c->msg++; in i2c_s3c_irq_nextbyte()
557 tmp = readl(i2c->regs + S3C2410_IICCON); in i2c_s3c_irq_nextbyte()
559 writel(tmp, i2c->regs + S3C2410_IICCON); in i2c_s3c_irq_nextbyte()
560 out: in i2c_s3c_irq_nextbyte()
573 status = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_irq()
577 dev_err(i2c->dev, "deal with arbitration loss\n"); in s3c24xx_i2c_irq()
580 if (i2c->state == STATE_IDLE) { in s3c24xx_i2c_irq()
581 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n"); in s3c24xx_i2c_irq()
583 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_irq()
585 writel(tmp, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_irq()
586 goto out; in s3c24xx_i2c_irq()
595 out: in s3c24xx_i2c_irq()
604 * If there is an event on the bus, or we have a pre-existing event at
613 tmp = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_disable_bus()
615 writel(tmp, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_disable_bus()
618 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_bus()
621 writel(tmp, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_bus()
633 while (timeout-- > 0) { in s3c24xx_i2c_set_master()
634 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_set_master()
642 return -ETIMEDOUT; in s3c24xx_i2c_set_master()
657 dev_dbg(i2c->dev, "waiting for bus idle\n"); in s3c24xx_i2c_wait_idle()
670 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
671 while ((iicstat & S3C2410_IICSTAT_START) && --spins) { in s3c24xx_i2c_wait_idle()
673 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
690 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
694 dev_warn(i2c->dev, "timeout waiting for bus idle\n"); in s3c24xx_i2c_wait_idle()
706 if (i2c->suspended) in s3c24xx_i2c_doxfer()
707 return -EIO; in s3c24xx_i2c_doxfer()
711 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret); in s3c24xx_i2c_doxfer()
712 ret = -EAGAIN; in s3c24xx_i2c_doxfer()
713 goto out; in s3c24xx_i2c_doxfer()
716 i2c->msg = msgs; in s3c24xx_i2c_doxfer()
717 i2c->msg_num = num; in s3c24xx_i2c_doxfer()
718 i2c->msg_ptr = 0; in s3c24xx_i2c_doxfer()
719 i2c->msg_idx = 0; in s3c24xx_i2c_doxfer()
720 i2c->state = STATE_START; in s3c24xx_i2c_doxfer()
725 if (i2c->quirks & QUIRK_POLL) { in s3c24xx_i2c_doxfer()
726 ret = i2c->msg_idx; in s3c24xx_i2c_doxfer()
729 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret); in s3c24xx_i2c_doxfer()
731 goto out; in s3c24xx_i2c_doxfer()
734 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5); in s3c24xx_i2c_doxfer()
736 ret = i2c->msg_idx; in s3c24xx_i2c_doxfer()
743 dev_dbg(i2c->dev, "timeout\n"); in s3c24xx_i2c_doxfer()
745 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret); in s3c24xx_i2c_doxfer()
748 if (i2c->quirks & QUIRK_HDMIPHY) in s3c24xx_i2c_doxfer()
749 goto out; in s3c24xx_i2c_doxfer()
755 out: in s3c24xx_i2c_doxfer()
756 i2c->state = STATE_IDLE; in s3c24xx_i2c_doxfer()
768 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data; in s3c24xx_i2c_xfer()
772 ret = clk_enable(i2c->clk); in s3c24xx_i2c_xfer()
776 for (retry = 0; retry < adap->retries; retry++) { in s3c24xx_i2c_xfer()
780 if (ret != -EAGAIN) { in s3c24xx_i2c_xfer()
781 clk_disable(i2c->clk); in s3c24xx_i2c_xfer()
785 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry); in s3c24xx_i2c_xfer()
790 clk_disable(i2c->clk); in s3c24xx_i2c_xfer()
791 return -EREMOTEIO; in s3c24xx_i2c_xfer()
808 * return the divisor settings for a given frequency
821 calc_divs += calc_div1-1; in s3c24xx_i2c_calcdivisor()
836 * work out a divisor for the user requested frequency setting,
837 * either by the requested frequency, or scanning the acceptable
842 struct s3c2410_platform_i2c *pdata = i2c->pdata; in s3c24xx_i2c_clockrate()
843 unsigned long clkin = clk_get_rate(i2c->clk); in s3c24xx_i2c_clockrate()
849 i2c->clkrate = clkin; in s3c24xx_i2c_clockrate()
852 dev_dbg(i2c->dev, "pdata desired frequency %lu\n", pdata->frequency); in s3c24xx_i2c_clockrate()
854 target_frequency = pdata->frequency ? pdata->frequency : 100000; in s3c24xx_i2c_clockrate()
856 target_frequency /= 1000; /* Target frequency now in KHz */ in s3c24xx_i2c_clockrate()
861 dev_err(i2c->dev, in s3c24xx_i2c_clockrate()
862 "Unable to achieve desired frequency %luKHz." \ in s3c24xx_i2c_clockrate()
864 return -EINVAL; in s3c24xx_i2c_clockrate()
869 iiccon = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_clockrate()
871 iiccon |= (divs-1); in s3c24xx_i2c_clockrate()
876 if (i2c->quirks & QUIRK_POLL) in s3c24xx_i2c_clockrate()
879 writel(iiccon, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_clockrate()
881 if (i2c->quirks & QUIRK_S3C2440) { in s3c24xx_i2c_clockrate()
884 if (pdata->sda_delay) { in s3c24xx_i2c_clockrate()
885 sda_delay = clkin * pdata->sda_delay; in s3c24xx_i2c_clockrate()
894 dev_dbg(i2c->dev, "IICLC=%08lx\n", sda_delay); in s3c24xx_i2c_clockrate()
895 writel(sda_delay, i2c->regs + S3C2440_IICLC); in s3c24xx_i2c_clockrate()
913 delta_f = clk_get_rate(i2c->clk) - i2c->clkrate; in s3c24xx_i2c_cpufreq_transition()
915 /* if we're post-change and the input clock has slowed down in s3c24xx_i2c_cpufreq_transition()
916 * or at pre-change and the clock is about to speed up, then in s3c24xx_i2c_cpufreq_transition()
922 i2c_lock_bus(&i2c->adap, I2C_LOCK_ROOT_ADAPTER); in s3c24xx_i2c_cpufreq_transition()
924 i2c_unlock_bus(&i2c->adap, I2C_LOCK_ROOT_ADAPTER); in s3c24xx_i2c_cpufreq_transition()
927 dev_err(i2c->dev, "cannot find frequency (%d)\n", ret); in s3c24xx_i2c_cpufreq_transition()
929 dev_info(i2c->dev, "setting freq %d\n", got); in s3c24xx_i2c_cpufreq_transition()
937 i2c->freq_transition.notifier_call = s3c24xx_i2c_cpufreq_transition; in s3c24xx_i2c_register_cpufreq()
939 return cpufreq_register_notifier(&i2c->freq_transition, in s3c24xx_i2c_register_cpufreq()
945 cpufreq_unregister_notifier(&i2c->freq_transition, in s3c24xx_i2c_deregister_cpufreq()
965 if (i2c->quirks & QUIRK_NO_GPIO) in s3c24xx_i2c_parse_dt_gpio()
969 gpio = of_get_gpio(i2c->dev->of_node, idx); in s3c24xx_i2c_parse_dt_gpio()
971 dev_err(i2c->dev, "invalid gpio[%d]: %d\n", idx, gpio); in s3c24xx_i2c_parse_dt_gpio()
974 i2c->gpios[idx] = gpio; in s3c24xx_i2c_parse_dt_gpio()
976 ret = gpio_request(gpio, "i2c-bus"); in s3c24xx_i2c_parse_dt_gpio()
978 dev_err(i2c->dev, "gpio [%d] request failed (%d)\n", in s3c24xx_i2c_parse_dt_gpio()
986 while (--idx >= 0) in s3c24xx_i2c_parse_dt_gpio()
987 gpio_free(i2c->gpios[idx]); in s3c24xx_i2c_parse_dt_gpio()
988 return -EINVAL; in s3c24xx_i2c_parse_dt_gpio()
995 if (i2c->quirks & QUIRK_NO_GPIO) in s3c24xx_i2c_dt_gpio_free()
999 gpio_free(i2c->gpios[idx]); in s3c24xx_i2c_dt_gpio_free()
1013 * initialise the controller, set the IO lines and frequency
1022 pdata = i2c->pdata; in s3c24xx_i2c_init()
1026 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD); in s3c24xx_i2c_init()
1028 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr); in s3c24xx_i2c_init()
1030 writel(0, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_init()
1031 writel(0, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_init()
1033 /* we need to work out the divisors for the clock... */ in s3c24xx_i2c_init()
1036 dev_err(i2c->dev, "cannot meet bus frequency required\n"); in s3c24xx_i2c_init()
1037 return -EINVAL; in s3c24xx_i2c_init()
1040 /* todo - check that the i2c lines aren't being dragged anywhere */ in s3c24xx_i2c_init()
1042 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq); in s3c24xx_i2c_init()
1043 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02x\n", in s3c24xx_i2c_init()
1044 readl(i2c->regs + S3C2410_IICCON)); in s3c24xx_i2c_init()
1056 struct s3c2410_platform_i2c *pdata = i2c->pdata; in s3c24xx_i2c_parse_dt()
1062 pdata->bus_num = -1; /* i2c bus number is dynamically assigned */ in s3c24xx_i2c_parse_dt()
1063 of_property_read_u32(np, "samsung,i2c-sda-delay", &pdata->sda_delay); in s3c24xx_i2c_parse_dt()
1064 of_property_read_u32(np, "samsung,i2c-slave-addr", &pdata->slave_addr); in s3c24xx_i2c_parse_dt()
1065 of_property_read_u32(np, "samsung,i2c-max-bus-freq", in s3c24xx_i2c_parse_dt()
1066 (u32 *)&pdata->frequency); in s3c24xx_i2c_parse_dt()
1070 * interrupts for 4-channel HS-I2C controller are enabled. in s3c24xx_i2c_parse_dt()
1072 * are available then re-configure the interrupts via the in s3c24xx_i2c_parse_dt()
1076 i2c->sysreg = syscon_regmap_lookup_by_phandle(np, in s3c24xx_i2c_parse_dt()
1077 "samsung,sysreg-phandle"); in s3c24xx_i2c_parse_dt()
1078 if (IS_ERR(i2c->sysreg)) in s3c24xx_i2c_parse_dt()
1081 regmap_update_bits(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, BIT(id), 0); in s3c24xx_i2c_parse_dt()
1095 if (!pdev->dev.of_node) { in s3c24xx_i2c_probe()
1096 pdata = dev_get_platdata(&pdev->dev); in s3c24xx_i2c_probe()
1098 dev_err(&pdev->dev, "no platform data\n"); in s3c24xx_i2c_probe()
1099 return -EINVAL; in s3c24xx_i2c_probe()
1103 i2c = devm_kzalloc(&pdev->dev, sizeof(struct s3c24xx_i2c), GFP_KERNEL); in s3c24xx_i2c_probe()
1105 return -ENOMEM; in s3c24xx_i2c_probe()
1107 i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); in s3c24xx_i2c_probe()
1108 if (!i2c->pdata) in s3c24xx_i2c_probe()
1109 return -ENOMEM; in s3c24xx_i2c_probe()
1111 i2c->quirks = s3c24xx_get_device_quirks(pdev); in s3c24xx_i2c_probe()
1112 i2c->sysreg = ERR_PTR(-ENOENT); in s3c24xx_i2c_probe()
1114 memcpy(i2c->pdata, pdata, sizeof(*pdata)); in s3c24xx_i2c_probe()
1116 s3c24xx_i2c_parse_dt(pdev->dev.of_node, i2c); in s3c24xx_i2c_probe()
1118 strlcpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name)); in s3c24xx_i2c_probe()
1119 i2c->adap.owner = THIS_MODULE; in s3c24xx_i2c_probe()
1120 i2c->adap.algo = &s3c24xx_i2c_algorithm; in s3c24xx_i2c_probe()
1121 i2c->adap.retries = 2; in s3c24xx_i2c_probe()
1122 i2c->adap.class = I2C_CLASS_DEPRECATED; in s3c24xx_i2c_probe()
1123 i2c->tx_setup = 50; in s3c24xx_i2c_probe()
1125 init_waitqueue_head(&i2c->wait); in s3c24xx_i2c_probe()
1128 i2c->dev = &pdev->dev; in s3c24xx_i2c_probe()
1129 i2c->clk = devm_clk_get(&pdev->dev, "i2c"); in s3c24xx_i2c_probe()
1130 if (IS_ERR(i2c->clk)) { in s3c24xx_i2c_probe()
1131 dev_err(&pdev->dev, "cannot get clock\n"); in s3c24xx_i2c_probe()
1132 return -ENOENT; in s3c24xx_i2c_probe()
1135 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk); in s3c24xx_i2c_probe()
1139 i2c->regs = devm_ioremap_resource(&pdev->dev, res); in s3c24xx_i2c_probe()
1141 if (IS_ERR(i2c->regs)) in s3c24xx_i2c_probe()
1142 return PTR_ERR(i2c->regs); in s3c24xx_i2c_probe()
1144 dev_dbg(&pdev->dev, "registers %p (%p)\n", in s3c24xx_i2c_probe()
1145 i2c->regs, res); in s3c24xx_i2c_probe()
1148 i2c->adap.algo_data = i2c; in s3c24xx_i2c_probe()
1149 i2c->adap.dev.parent = &pdev->dev; in s3c24xx_i2c_probe()
1150 i2c->pctrl = devm_pinctrl_get_select_default(i2c->dev); in s3c24xx_i2c_probe()
1153 if (i2c->pdata->cfg_gpio) in s3c24xx_i2c_probe()
1154 i2c->pdata->cfg_gpio(to_platform_device(i2c->dev)); in s3c24xx_i2c_probe()
1155 else if (IS_ERR(i2c->pctrl) && s3c24xx_i2c_parse_dt_gpio(i2c)) in s3c24xx_i2c_probe()
1156 return -EINVAL; in s3c24xx_i2c_probe()
1159 ret = clk_prepare_enable(i2c->clk); in s3c24xx_i2c_probe()
1161 dev_err(&pdev->dev, "I2C clock enable failed\n"); in s3c24xx_i2c_probe()
1166 clk_disable(i2c->clk); in s3c24xx_i2c_probe()
1168 dev_err(&pdev->dev, "I2C controller init failed\n"); in s3c24xx_i2c_probe()
1169 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1177 if (!(i2c->quirks & QUIRK_POLL)) { in s3c24xx_i2c_probe()
1178 i2c->irq = ret = platform_get_irq(pdev, 0); in s3c24xx_i2c_probe()
1180 dev_err(&pdev->dev, "cannot find IRQ\n"); in s3c24xx_i2c_probe()
1181 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1185 ret = devm_request_irq(&pdev->dev, i2c->irq, s3c24xx_i2c_irq, in s3c24xx_i2c_probe()
1186 0, dev_name(&pdev->dev), i2c); in s3c24xx_i2c_probe()
1188 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq); in s3c24xx_i2c_probe()
1189 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1196 dev_err(&pdev->dev, "failed to register cpufreq notifier\n"); in s3c24xx_i2c_probe()
1197 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1207 i2c->adap.nr = i2c->pdata->bus_num; in s3c24xx_i2c_probe()
1208 i2c->adap.dev.of_node = pdev->dev.of_node; in s3c24xx_i2c_probe()
1212 pm_runtime_enable(&pdev->dev); in s3c24xx_i2c_probe()
1214 ret = i2c_add_numbered_adapter(&i2c->adap); in s3c24xx_i2c_probe()
1216 pm_runtime_disable(&pdev->dev); in s3c24xx_i2c_probe()
1218 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1222 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev)); in s3c24xx_i2c_probe()
1230 clk_unprepare(i2c->clk); in s3c24xx_i2c_remove()
1232 pm_runtime_disable(&pdev->dev); in s3c24xx_i2c_remove()
1236 i2c_del_adapter(&i2c->adap); in s3c24xx_i2c_remove()
1238 if (pdev->dev.of_node && IS_ERR(i2c->pctrl)) in s3c24xx_i2c_remove()
1249 i2c->suspended = 1; in s3c24xx_i2c_suspend_noirq()
1251 if (!IS_ERR(i2c->sysreg)) in s3c24xx_i2c_suspend_noirq()
1252 regmap_read(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, &i2c->sys_i2c_cfg); in s3c24xx_i2c_suspend_noirq()
1262 if (!IS_ERR(i2c->sysreg)) in s3c24xx_i2c_resume_noirq()
1263 regmap_write(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, i2c->sys_i2c_cfg); in s3c24xx_i2c_resume_noirq()
1265 ret = clk_enable(i2c->clk); in s3c24xx_i2c_resume_noirq()
1269 clk_disable(i2c->clk); in s3c24xx_i2c_resume_noirq()
1270 i2c->suspended = 0; in s3c24xx_i2c_resume_noirq()
1292 .name = "s3c-i2c",