6  * Drive tuning added from Rebel.com's kernel sources
7  *  -- Russell King (15/11/98) linux@arm.linux.org.uk
11  *  -- Benjamin Herrenschmidt (01/11/03) benh@kernel.crashing.org
13  * Copyright (C) 2006-2007,2009 MontaVista Software, Inc. <source@mvista.com>
39  * Convert a PIO mode and cycle time to the required on/off times
42 static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)  in get_pio_timings()  argument
48 	cmd_on  = (t->active + 29) / 30;  in get_pio_timings()
49 	cmd_off = (ide_pio_cycle_time(drive, pio) - 30 * cmd_on + 29) / 30;  in get_pio_timings()
57 	if (ide_pio_need_iordy(drive, pio))  in get_pio_timings()
60 	return (cmd_on - 1) << 8 | (cmd_off - 1) | iordy;  in get_pio_timings()
64  * Configure the chipset for PIO mode.
66 static void sl82c105_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)  in sl82c105_set_pio_mode()  argument
68 	struct pci_dev *dev	= to_pci_dev(hwif->dev);  in sl82c105_set_pio_mode()
69 	unsigned long timings	= (unsigned long)ide_get_drivedata(drive);  in sl82c105_set_pio_mode()
70 	int reg			= 0x44 + drive->dn * 4;  in sl82c105_set_pio_mode()
72 	const u8 pio		= drive->pio_mode - XFER_PIO_0;  in sl82c105_set_pio_mode()
74 	drv_ctrl = get_pio_timings(drive, pio);  in sl82c105_set_pio_mode()
82 	ide_set_drivedata(drive, (void *)timings);  in sl82c105_set_pio_mode()
87 	printk(KERN_DEBUG "%s: selected %s (%dns) (%04X)\n", drive->name,  in sl82c105_set_pio_mode()
89 			  ide_pio_cycle_time(drive, pio), drv_ctrl);  in sl82c105_set_pio_mode()
93  * Configure the chipset for DMA mode.
95 static void sl82c105_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)  in sl82c105_set_dma_mode()  argument
98 	unsigned long timings = (unsigned long)ide_get_drivedata(drive);  in sl82c105_set_dma_mode()
100 	const u8 speed = drive->dma_mode;  in sl82c105_set_dma_mode()
102 	drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0];  in sl82c105_set_dma_mode()
110 	ide_set_drivedata(drive, (void *)timings);  in sl82c105_set_dma_mode()
115 	struct pci_dev *dev	= to_pci_dev(hwif->dev);  in sl82c105_test_irq()
116 	u32 val, mask		= hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;  in sl82c105_test_irq()
124  * The SL82C105 holds off all IDE interrupts while in DMA mode until
126  * when the drive wants to report an error condition).
144  * This function is called when the IDE timer expires, the drive
147 static void sl82c105_dma_lost_irq(ide_drive_t *drive)  in sl82c105_dma_lost_irq()  argument
149 	ide_hwif_t *hwif	= drive->hwif;  in sl82c105_dma_lost_irq()
150 	struct pci_dev *dev	= to_pci_dev(hwif->dev);  in sl82c105_dma_lost_irq()
151 	u32 val, mask		= hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;  in sl82c105_dma_lost_irq()
157 	 * Check the raw interrupt from the drive.  in sl82c105_dma_lost_irq()
161 		printk(KERN_INFO "sl82c105: drive was requesting IRQ, "  in sl82c105_dma_lost_irq()
165 	 * Was DMA enabled?  If so, disable it - we're resetting the  in sl82c105_dma_lost_irq()
166 	 * host.  The IDE layer will be handling the drive for us.  in sl82c105_dma_lost_irq()
168 	dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);  in sl82c105_dma_lost_irq()
170 		outb(dma_cmd & ~1, hwif->dma_base + ATA_DMA_CMD);  in sl82c105_dma_lost_irq()
185 static void sl82c105_dma_start(ide_drive_t *drive)  in sl82c105_dma_start()  argument
187 	ide_hwif_t *hwif	= drive->hwif;  in sl82c105_dma_start()
188 	struct pci_dev *dev	= to_pci_dev(hwif->dev);  in sl82c105_dma_start()
189 	int reg 		= 0x44 + drive->dn * 4;  in sl82c105_dma_start()
192 			      (unsigned long)ide_get_drivedata(drive) >> 16);  in sl82c105_dma_start()
195 	ide_dma_start(drive);  in sl82c105_dma_start()
198 static void sl82c105_dma_clear(ide_drive_t *drive)  in sl82c105_dma_clear()  argument
200 	struct pci_dev *dev = to_pci_dev(drive->hwif->dev);  in sl82c105_dma_clear()
205 static int sl82c105_dma_end(ide_drive_t *drive)  in sl82c105_dma_end()  argument
207 	struct pci_dev *dev	= to_pci_dev(drive->hwif->dev);  in sl82c105_dma_end()
208 	int reg 		= 0x44 + drive->dn * 4;  in sl82c105_dma_end()
209 	int ret			= ide_dma_end(drive);  in sl82c105_dma_end()
212 			      (unsigned long)ide_get_drivedata(drive));  in sl82c105_dma_end()
218  * ATA reset will clear the 16 bits mode in the control
221 static void sl82c105_resetproc(ide_drive_t *drive)  in sl82c105_resetproc()  argument
223 	struct pci_dev *dev = to_pci_dev(drive->hwif->dev);  in sl82c105_resetproc()
242 	bridge = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),  in sl82c105_bridge_revision()
243 					dev->bus->number,  in sl82c105_bridge_revision()
244 					PCI_DEVFN(PCI_SLOT(dev->devfn), 0));  in sl82c105_bridge_revision()
246 		return -1;  in sl82c105_bridge_revision()
251 	if (bridge->vendor != PCI_VENDOR_ID_WINBOND ||  in sl82c105_bridge_revision()
252 	    bridge->device != PCI_DEVICE_ID_WINBOND_83C553 ||  in sl82c105_bridge_revision()
253 	    bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA) {  in sl82c105_bridge_revision()
255 		return -1;  in sl82c105_bridge_revision()
262 	return bridge->revision;  in sl82c105_bridge_revision()
268  * --BenH: It's arch fixup code that should enable channels that
271  * firmware or arch code. We still set both to 16 bits mode.
328 				 "revision %d, BM-DMA disabled\n", rev);  in sl82c105_init_one()