Lines Matching +full:dra7 +full:- +full:dsp
4 * Copyright (C) 2008-2010 Nokia Corporation
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
15 #include <linux/dma-mapping.h>
22 #include <linux/omap-iommu.h>
34 #include <linux/platform_data/iommu-omap.h>
36 #include "omap-iopgtable.h"
37 #include "omap-iommu.h"
61 * to_omap_domain - Get struct omap_iommu_domain from generic iommu_domain
70 * omap_iommu_save_ctx - Save registers for pm off-mode support
75 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in omap_iommu_save_ctx()
83 while (arch_data->iommu_dev) { in omap_iommu_save_ctx()
84 obj = arch_data->iommu_dev; in omap_iommu_save_ctx()
85 p = obj->ctx; in omap_iommu_save_ctx()
88 dev_dbg(obj->dev, "%s\t[%02d] %08x\n", __func__, i, in omap_iommu_save_ctx()
97 * omap_iommu_restore_ctx - Restore registers for pm off-mode support
102 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in omap_iommu_restore_ctx()
110 while (arch_data->iommu_dev) { in omap_iommu_restore_ctx()
111 obj = arch_data->iommu_dev; in omap_iommu_restore_ctx()
112 p = obj->ctx; in omap_iommu_restore_ctx()
115 dev_dbg(obj->dev, "%s\t[%02d] %08x\n", __func__, i, in omap_iommu_restore_ctx()
127 if (!obj->syscfg) in dra7_cfg_dspsys_mmu()
130 mask = (1 << (obj->id * DSP_SYS_MMU_CONFIG_EN_SHIFT)); in dra7_cfg_dspsys_mmu()
132 regmap_update_bits(obj->syscfg, DSP_SYS_MMU_CONFIG, mask, val); in dra7_cfg_dspsys_mmu()
157 if (!obj->iopgd || !IS_ALIGNED((u32)obj->iopgd, SZ_16K)) in omap2_iommu_enable()
158 return -EINVAL; in omap2_iommu_enable()
160 pa = virt_to_phys(obj->iopgd); in omap2_iommu_enable()
162 return -EINVAL; in omap2_iommu_enable()
165 dev_info(obj->dev, "%s: version %d.%d\n", obj->name, in omap2_iommu_enable()
172 if (obj->has_bus_err_back) in omap2_iommu_enable()
188 dev_dbg(obj->dev, "%s is shutting down\n", obj->name); in omap2_iommu_disable()
194 struct platform_device *pdev = to_platform_device(obj->dev); in iommu_enable()
195 struct iommu_platform_data *pdata = dev_get_platdata(&pdev->dev); in iommu_enable()
197 if (pdata && pdata->deassert_reset) { in iommu_enable()
198 err = pdata->deassert_reset(pdev, pdata->reset_name); in iommu_enable()
200 dev_err(obj->dev, "deassert_reset failed: %d\n", err); in iommu_enable()
205 pm_runtime_get_sync(obj->dev); in iommu_enable()
214 struct platform_device *pdev = to_platform_device(obj->dev); in iommu_disable()
215 struct iommu_platform_data *pdata = dev_get_platdata(&pdev->dev); in iommu_disable()
219 pm_runtime_put_sync(obj->dev); in iommu_disable()
221 if (pdata && pdata->assert_reset) in iommu_disable()
222 pdata->assert_reset(pdev, pdata->reset_name); in iommu_disable()
230 u32 page_size = cr->cam & MMU_CAM_PGSZ_MASK; in iotlb_cr_to_virt()
231 u32 mask = get_cam_va_mask(cr->cam & page_size); in iotlb_cr_to_virt()
233 return cr->cam & mask; in iotlb_cr_to_virt()
240 attr = e->mixed << 5; in get_iopte_attr()
241 attr |= e->endian; in get_iopte_attr()
242 attr |= e->elsz >> 3; in get_iopte_attr()
243 attr <<= (((e->pgsz == MMU_CAM_PGSZ_4K) || in get_iopte_attr()
244 (e->pgsz == MMU_CAM_PGSZ_64K)) ? 0 : 6); in get_iopte_attr()
273 l->base = MMU_LOCK_BASE(val); in iotlb_lock_get()
274 l->vict = MMU_LOCK_VICT(val); in iotlb_lock_get()
281 val = (l->base << MMU_LOCK_BASE_SHIFT); in iotlb_lock_set()
282 val |= (l->vict << MMU_LOCK_VICT_SHIFT); in iotlb_lock_set()
289 cr->cam = iommu_read_reg(obj, MMU_READ_CAM); in iotlb_read_cr()
290 cr->ram = iommu_read_reg(obj, MMU_READ_RAM); in iotlb_read_cr()
295 iommu_write_reg(obj, cr->cam | MMU_CAM_V, MMU_CAM); in iotlb_load_cr()
296 iommu_write_reg(obj, cr->ram, MMU_RAM); in iotlb_load_cr()
302 /* only used in iotlb iteration for-loop */
325 if (e->da & ~(get_cam_va_mask(e->pgsz))) { in iotlb_alloc_cr()
326 dev_err(obj->dev, "%s:\twrong alignment: %08x\n", __func__, in iotlb_alloc_cr()
327 e->da); in iotlb_alloc_cr()
328 return ERR_PTR(-EINVAL); in iotlb_alloc_cr()
333 return ERR_PTR(-ENOMEM); in iotlb_alloc_cr()
335 cr->cam = (e->da & MMU_CAM_VATAG_MASK) | e->prsvd | e->pgsz | e->valid; in iotlb_alloc_cr()
336 cr->ram = e->pa | e->endian | e->elsz | e->mixed; in iotlb_alloc_cr()
342 * load_iotlb_entry - Set an iommu tlb entry
352 if (!obj || !obj->nr_tlb_entries || !e) in load_iotlb_entry()
353 return -EINVAL; in load_iotlb_entry()
355 pm_runtime_get_sync(obj->dev); in load_iotlb_entry()
358 if (l.base == obj->nr_tlb_entries) { in load_iotlb_entry()
359 dev_warn(obj->dev, "%s: preserve entries full\n", __func__); in load_iotlb_entry()
360 err = -EBUSY; in load_iotlb_entry()
363 if (!e->prsvd) { in load_iotlb_entry()
367 for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, tmp) in load_iotlb_entry()
371 if (i == obj->nr_tlb_entries) { in load_iotlb_entry()
372 dev_dbg(obj->dev, "%s: full: no entry\n", __func__); in load_iotlb_entry()
373 err = -EBUSY; in load_iotlb_entry()
385 pm_runtime_put_sync(obj->dev); in load_iotlb_entry()
392 if (e->prsvd) in load_iotlb_entry()
395 if (++l.vict == obj->nr_tlb_entries) in load_iotlb_entry()
399 pm_runtime_put_sync(obj->dev); in load_iotlb_entry()
418 * flush_iotlb_page - Clear an iommu tlb entry
429 pm_runtime_get_sync(obj->dev); in flush_iotlb_page()
431 for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, cr) { in flush_iotlb_page()
442 dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n", in flush_iotlb_page()
449 pm_runtime_put_sync(obj->dev); in flush_iotlb_page()
451 if (i == obj->nr_tlb_entries) in flush_iotlb_page()
452 dev_dbg(obj->dev, "%s: no page for %08x\n", __func__, da); in flush_iotlb_page()
456 * flush_iotlb_all - Clear all iommu tlb entries
463 pm_runtime_get_sync(obj->dev); in flush_iotlb_all()
471 pm_runtime_put_sync(obj->dev); in flush_iotlb_all()
489 /* Note: freed iopte's must be clean ready for re-use */ in iopte_free()
493 dma_unmap_single(obj->dev, pt_dma, IOPTE_TABLE_SIZE, in iopte_free()
514 spin_unlock(&obj->page_table_lock); in iopte_alloc()
516 spin_lock(&obj->page_table_lock); in iopte_alloc()
520 return ERR_PTR(-ENOMEM); in iopte_alloc()
522 *pt_dma = dma_map_single(obj->dev, iopte, IOPTE_TABLE_SIZE, in iopte_alloc()
524 if (dma_mapping_error(obj->dev, *pt_dma)) { in iopte_alloc()
525 dev_err(obj->dev, "DMA map error for L2 table\n"); in iopte_alloc()
527 return ERR_PTR(-ENOMEM); in iopte_alloc()
535 dev_err(obj->dev, "DMA translation error for L2 table\n"); in iopte_alloc()
536 dma_unmap_single(obj->dev, *pt_dma, IOPTE_TABLE_SIZE, in iopte_alloc()
539 return ERR_PTR(-ENOMEM); in iopte_alloc()
544 flush_iopte_range(obj->dev, obj->pd_dma, offset, 1); in iopte_alloc()
545 dev_vdbg(obj->dev, "%s: a new pte:%p\n", __func__, iopte); in iopte_alloc()
554 dev_vdbg(obj->dev, in iopte_alloc()
567 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n", in iopgd_alloc_section()
569 return -EINVAL; in iopgd_alloc_section()
573 flush_iopte_range(obj->dev, obj->pd_dma, offset, 1); in iopgd_alloc_section()
584 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n", in iopgd_alloc_super()
586 return -EINVAL; in iopgd_alloc_super()
591 flush_iopte_range(obj->dev, obj->pd_dma, offset, 16); in iopgd_alloc_super()
606 flush_iopte_range(obj->dev, pt_dma, offset, 1); in iopte_alloc_page()
608 dev_vdbg(obj->dev, "%s: da:%08x pa:%08x pte:%p *pte:%08x\n", in iopte_alloc_page()
623 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n", in iopte_alloc_large()
625 return -EINVAL; in iopte_alloc_large()
633 flush_iopte_range(obj->dev, pt_dma, offset, 16); in iopte_alloc_large()
645 return -EINVAL; in iopgtable_store_entry_core()
647 switch (e->pgsz) { in iopgtable_store_entry_core()
666 return -EINVAL; in iopgtable_store_entry_core()
670 spin_lock(&obj->page_table_lock); in iopgtable_store_entry_core()
671 err = fn(obj, e->da, e->pa, prot); in iopgtable_store_entry_core()
672 spin_unlock(&obj->page_table_lock); in iopgtable_store_entry_core()
678 * omap_iopgtable_store_entry - Make an iommu pte entry
687 flush_iotlb_page(obj, e->da); in omap_iopgtable_store_entry()
695 * iopgtable_lookup_entry - Lookup an iommu pte entry
742 flush_iopte_range(obj->dev, pt_dma, pt_offset, nent); in iopgtable_clear_entry_core()
764 flush_iopte_range(obj->dev, obj->pd_dma, pd_offset, nent); in iopgtable_clear_entry_core()
770 * iopgtable_clear_entry - Remove an iommu pte entry
778 spin_lock(&obj->page_table_lock); in iopgtable_clear_entry()
783 spin_unlock(&obj->page_table_lock); in iopgtable_clear_entry()
793 spin_lock(&obj->page_table_lock); in iopgtable_clear_entry_all()
810 flush_iopte_range(obj->dev, obj->pd_dma, offset, 1); in iopgtable_clear_entry_all()
815 spin_unlock(&obj->page_table_lock); in iopgtable_clear_entry_all()
826 struct iommu_domain *domain = obj->domain; in iommu_fault_handler()
829 if (!omap_domain->dev) in iommu_fault_handler()
837 if (!report_iommu_fault(domain, obj->dev, da, 0)) in iommu_fault_handler()
845 dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p *pgd:px%08x\n", in iommu_fault_handler()
846 obj->name, errs, da, iopgd, *iopgd); in iommu_fault_handler()
852 dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p *pgd:0x%08x pte:0x%p *pte:0x%08x\n", in iommu_fault_handler()
853 obj->name, errs, da, iopgd, *iopgd, iopte, *iopte); in iommu_fault_handler()
859 * omap_iommu_attach() - attach iommu device to an iommu domain
867 spin_lock(&obj->iommu_lock); in omap_iommu_attach()
869 obj->pd_dma = dma_map_single(obj->dev, iopgd, IOPGD_TABLE_SIZE, in omap_iommu_attach()
871 if (dma_mapping_error(obj->dev, obj->pd_dma)) { in omap_iommu_attach()
872 dev_err(obj->dev, "DMA map error for L1 table\n"); in omap_iommu_attach()
873 err = -ENOMEM; in omap_iommu_attach()
877 obj->iopgd = iopgd; in omap_iommu_attach()
883 spin_unlock(&obj->iommu_lock); in omap_iommu_attach()
885 dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name); in omap_iommu_attach()
890 spin_unlock(&obj->iommu_lock); in omap_iommu_attach()
896 * omap_iommu_detach - release iommu device
904 spin_lock(&obj->iommu_lock); in omap_iommu_detach()
906 dma_unmap_single(obj->dev, obj->pd_dma, IOPGD_TABLE_SIZE, in omap_iommu_detach()
909 obj->pd_dma = 0; in omap_iommu_detach()
910 obj->iopgd = NULL; in omap_iommu_detach()
912 spin_unlock(&obj->iommu_lock); in omap_iommu_detach()
914 dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name); in omap_iommu_detach()
919 struct device_node *np = pdev->dev.of_node; in omap_iommu_can_register()
921 if (!of_device_is_compatible(np, "ti,dra7-dsp-iommu")) in omap_iommu_can_register()
925 * restrict IOMMU core registration only for processor-port MDMA MMUs in omap_iommu_can_register()
926 * on DRA7 DSPs in omap_iommu_can_register()
928 if ((!strcmp(dev_name(&pdev->dev), "40d01000.mmu")) || in omap_iommu_can_register()
929 (!strcmp(dev_name(&pdev->dev), "41501000.mmu"))) in omap_iommu_can_register()
938 struct device_node *np = pdev->dev.of_node; in omap_iommu_dra7_get_dsp_system_cfg()
941 if (!of_device_is_compatible(np, "ti,dra7-dsp-iommu")) in omap_iommu_dra7_get_dsp_system_cfg()
944 if (!of_property_read_bool(np, "ti,syscon-mmuconfig")) { in omap_iommu_dra7_get_dsp_system_cfg()
945 dev_err(&pdev->dev, "ti,syscon-mmuconfig property is missing\n"); in omap_iommu_dra7_get_dsp_system_cfg()
946 return -EINVAL; in omap_iommu_dra7_get_dsp_system_cfg()
949 obj->syscfg = in omap_iommu_dra7_get_dsp_system_cfg()
950 syscon_regmap_lookup_by_phandle(np, "ti,syscon-mmuconfig"); in omap_iommu_dra7_get_dsp_system_cfg()
951 if (IS_ERR(obj->syscfg)) { in omap_iommu_dra7_get_dsp_system_cfg()
952 /* can fail with -EPROBE_DEFER */ in omap_iommu_dra7_get_dsp_system_cfg()
953 ret = PTR_ERR(obj->syscfg); in omap_iommu_dra7_get_dsp_system_cfg()
957 if (of_property_read_u32_index(np, "ti,syscon-mmuconfig", 1, in omap_iommu_dra7_get_dsp_system_cfg()
958 &obj->id)) { in omap_iommu_dra7_get_dsp_system_cfg()
959 dev_err(&pdev->dev, "couldn't get the IOMMU instance id within subsystem\n"); in omap_iommu_dra7_get_dsp_system_cfg()
960 return -EINVAL; in omap_iommu_dra7_get_dsp_system_cfg()
963 if (obj->id != 0 && obj->id != 1) { in omap_iommu_dra7_get_dsp_system_cfg()
964 dev_err(&pdev->dev, "invalid IOMMU instance id\n"); in omap_iommu_dra7_get_dsp_system_cfg()
965 return -EINVAL; in omap_iommu_dra7_get_dsp_system_cfg()
976 int err = -ENODEV; in omap_iommu_probe()
980 struct device_node *of = pdev->dev.of_node; in omap_iommu_probe()
983 pr_err("%s: only DT-based devices are supported\n", __func__); in omap_iommu_probe()
984 return -ENODEV; in omap_iommu_probe()
987 obj = devm_kzalloc(&pdev->dev, sizeof(*obj) + MMU_REG_SIZE, GFP_KERNEL); in omap_iommu_probe()
989 return -ENOMEM; in omap_iommu_probe()
991 obj->name = dev_name(&pdev->dev); in omap_iommu_probe()
992 obj->nr_tlb_entries = 32; in omap_iommu_probe()
993 err = of_property_read_u32(of, "ti,#tlb-entries", &obj->nr_tlb_entries); in omap_iommu_probe()
994 if (err && err != -EINVAL) in omap_iommu_probe()
996 if (obj->nr_tlb_entries != 32 && obj->nr_tlb_entries != 8) in omap_iommu_probe()
997 return -EINVAL; in omap_iommu_probe()
998 if (of_find_property(of, "ti,iommu-bus-err-back", NULL)) in omap_iommu_probe()
999 obj->has_bus_err_back = MMU_GP_REG_BUS_ERR_BACK_EN; in omap_iommu_probe()
1001 obj->dev = &pdev->dev; in omap_iommu_probe()
1002 obj->ctx = (void *)obj + sizeof(*obj); in omap_iommu_probe()
1004 spin_lock_init(&obj->iommu_lock); in omap_iommu_probe()
1005 spin_lock_init(&obj->page_table_lock); in omap_iommu_probe()
1008 obj->regbase = devm_ioremap_resource(obj->dev, res); in omap_iommu_probe()
1009 if (IS_ERR(obj->regbase)) in omap_iommu_probe()
1010 return PTR_ERR(obj->regbase); in omap_iommu_probe()
1018 return -ENODEV; in omap_iommu_probe()
1020 err = devm_request_irq(obj->dev, irq, iommu_fault_handler, IRQF_SHARED, in omap_iommu_probe()
1021 dev_name(obj->dev), obj); in omap_iommu_probe()
1027 obj->group = iommu_group_alloc(); in omap_iommu_probe()
1028 if (IS_ERR(obj->group)) in omap_iommu_probe()
1029 return PTR_ERR(obj->group); in omap_iommu_probe()
1031 err = iommu_device_sysfs_add(&obj->iommu, obj->dev, NULL, in omap_iommu_probe()
1032 obj->name); in omap_iommu_probe()
1036 iommu_device_set_ops(&obj->iommu, &omap_iommu_ops); in omap_iommu_probe()
1038 err = iommu_device_register(&obj->iommu); in omap_iommu_probe()
1043 pm_runtime_irq_safe(obj->dev); in omap_iommu_probe()
1044 pm_runtime_enable(obj->dev); in omap_iommu_probe()
1048 dev_info(&pdev->dev, "%s registered\n", obj->name); in omap_iommu_probe()
1053 iommu_device_sysfs_remove(&obj->iommu); in omap_iommu_probe()
1055 iommu_group_put(obj->group); in omap_iommu_probe()
1063 if (obj->group) { in omap_iommu_remove()
1064 iommu_group_put(obj->group); in omap_iommu_remove()
1065 obj->group = NULL; in omap_iommu_remove()
1067 iommu_device_sysfs_remove(&obj->iommu); in omap_iommu_remove()
1068 iommu_device_unregister(&obj->iommu); in omap_iommu_remove()
1073 pm_runtime_disable(obj->dev); in omap_iommu_remove()
1075 dev_info(&pdev->dev, "%s removed\n", obj->name); in omap_iommu_remove()
1080 { .compatible = "ti,omap2-iommu" },
1081 { .compatible = "ti,omap4-iommu" },
1082 { .compatible = "ti,dra7-iommu" },
1083 { .compatible = "ti,dra7-dsp-iommu" },
1091 .name = "omap-iommu",
1100 e->da = da; in iotlb_init_entry()
1101 e->pa = pa; in iotlb_init_entry()
1102 e->valid = MMU_CAM_V; in iotlb_init_entry()
1103 e->pgsz = pgsz; in iotlb_init_entry()
1104 e->endian = MMU_RAM_ENDIAN_LITTLE; in iotlb_init_entry()
1105 e->elsz = MMU_RAM_ELSZ_8; in iotlb_init_entry()
1106 e->mixed = 0; in iotlb_init_entry()
1108 return iopgsz_to_bytes(e->pgsz); in iotlb_init_entry()
1115 struct device *dev = omap_domain->dev; in omap_iommu_map()
1120 u32 ret = -EINVAL; in omap_iommu_map()
1126 return -EINVAL; in omap_iommu_map()
1133 iommu = omap_domain->iommus; in omap_iommu_map()
1134 for (i = 0; i < omap_domain->num_iommus; i++, iommu++) { in omap_iommu_map()
1135 oiommu = iommu->iommu_dev; in omap_iommu_map()
1145 while (i--) { in omap_iommu_map()
1146 iommu--; in omap_iommu_map()
1147 oiommu = iommu->iommu_dev; in omap_iommu_map()
1159 struct device *dev = omap_domain->dev; in omap_iommu_unmap()
1168 iommu = omap_domain->iommus; in omap_iommu_unmap()
1169 for (i = 0; i < omap_domain->num_iommus; i++, iommu++) { in omap_iommu_unmap()
1170 oiommu = iommu->iommu_dev; in omap_iommu_unmap()
1177 * simplify return - we are only checking if any of the iommus in omap_iommu_unmap()
1187 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in omap_iommu_count()
1190 while (arch_data->iommu_dev) { in omap_iommu_count()
1205 odomain->num_iommus = omap_iommu_count(dev); in omap_iommu_attach_init()
1206 if (!odomain->num_iommus) in omap_iommu_attach_init()
1207 return -EINVAL; in omap_iommu_attach_init()
1209 odomain->iommus = kcalloc(odomain->num_iommus, sizeof(*iommu), in omap_iommu_attach_init()
1211 if (!odomain->iommus) in omap_iommu_attach_init()
1212 return -ENOMEM; in omap_iommu_attach_init()
1214 iommu = odomain->iommus; in omap_iommu_attach_init()
1215 for (i = 0; i < odomain->num_iommus; i++, iommu++) { in omap_iommu_attach_init()
1216 iommu->pgtable = kzalloc(IOPGD_TABLE_SIZE, GFP_ATOMIC); in omap_iommu_attach_init()
1217 if (!iommu->pgtable) in omap_iommu_attach_init()
1218 return -ENOMEM; in omap_iommu_attach_init()
1224 if (WARN_ON(!IS_ALIGNED((long)iommu->pgtable, in omap_iommu_attach_init()
1226 return -EINVAL; in omap_iommu_attach_init()
1235 struct omap_iommu_device *iommu = odomain->iommus; in omap_iommu_detach_fini()
1237 for (i = 0; iommu && i < odomain->num_iommus; i++, iommu++) in omap_iommu_detach_fini()
1238 kfree(iommu->pgtable); in omap_iommu_detach_fini()
1240 kfree(odomain->iommus); in omap_iommu_detach_fini()
1241 odomain->num_iommus = 0; in omap_iommu_detach_fini()
1242 odomain->iommus = NULL; in omap_iommu_detach_fini()
1249 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in omap_iommu_attach_dev()
1255 if (!arch_data || !arch_data->iommu_dev) { in omap_iommu_attach_dev()
1257 return -EINVAL; in omap_iommu_attach_dev()
1260 spin_lock(&omap_domain->lock); in omap_iommu_attach_dev()
1263 if (omap_domain->dev) { in omap_iommu_attach_dev()
1265 ret = -EBUSY; in omap_iommu_attach_dev()
1276 iommu = omap_domain->iommus; in omap_iommu_attach_dev()
1277 for (i = 0; i < omap_domain->num_iommus; i++, iommu++, arch_data++) { in omap_iommu_attach_dev()
1279 oiommu = arch_data->iommu_dev; in omap_iommu_attach_dev()
1280 ret = omap_iommu_attach(oiommu, iommu->pgtable); in omap_iommu_attach_dev()
1286 oiommu->domain = domain; in omap_iommu_attach_dev()
1287 iommu->iommu_dev = oiommu; in omap_iommu_attach_dev()
1290 omap_domain->dev = dev; in omap_iommu_attach_dev()
1295 while (i--) { in omap_iommu_attach_dev()
1296 iommu--; in omap_iommu_attach_dev()
1297 arch_data--; in omap_iommu_attach_dev()
1298 oiommu = iommu->iommu_dev; in omap_iommu_attach_dev()
1300 iommu->iommu_dev = NULL; in omap_iommu_attach_dev()
1301 oiommu->domain = NULL; in omap_iommu_attach_dev()
1306 spin_unlock(&omap_domain->lock); in omap_iommu_attach_dev()
1313 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in _omap_iommu_detach_dev()
1314 struct omap_iommu_device *iommu = omap_domain->iommus; in _omap_iommu_detach_dev()
1318 if (!omap_domain->dev) { in _omap_iommu_detach_dev()
1324 if (omap_domain->dev != dev) { in _omap_iommu_detach_dev()
1330 * cleanup in the reverse order of attachment - this addresses in _omap_iommu_detach_dev()
1333 iommu += (omap_domain->num_iommus - 1); in _omap_iommu_detach_dev()
1334 arch_data += (omap_domain->num_iommus - 1); in _omap_iommu_detach_dev()
1335 for (i = 0; i < omap_domain->num_iommus; i++, iommu--, arch_data--) { in _omap_iommu_detach_dev()
1336 oiommu = iommu->iommu_dev; in _omap_iommu_detach_dev()
1340 iommu->iommu_dev = NULL; in _omap_iommu_detach_dev()
1341 oiommu->domain = NULL; in _omap_iommu_detach_dev()
1346 omap_domain->dev = NULL; in _omap_iommu_detach_dev()
1354 spin_lock(&omap_domain->lock); in omap_iommu_detach_dev()
1356 spin_unlock(&omap_domain->lock); in omap_iommu_detach_dev()
1370 spin_lock_init(&omap_domain->lock); in omap_iommu_domain_alloc()
1372 omap_domain->domain.geometry.aperture_start = 0; in omap_iommu_domain_alloc()
1373 omap_domain->domain.geometry.aperture_end = (1ULL << 32) - 1; in omap_iommu_domain_alloc()
1374 omap_domain->domain.geometry.force_aperture = true; in omap_iommu_domain_alloc()
1376 return &omap_domain->domain; in omap_iommu_domain_alloc()
1387 if (omap_domain->dev) in omap_iommu_domain_free()
1388 _omap_iommu_detach_dev(omap_domain, omap_domain->dev); in omap_iommu_domain_free()
1397 struct omap_iommu_device *iommu = omap_domain->iommus; in omap_iommu_iova_to_phys()
1398 struct omap_iommu *oiommu = iommu->iommu_dev; in omap_iommu_iova_to_phys()
1399 struct device *dev = oiommu->dev; in omap_iommu_iova_to_phys()
1441 * Allocate the archdata iommu structure for DT-based devices. in omap_iommu_add_device()
1443 * TODO: Simplify this when removing non-DT support completely from the in omap_iommu_add_device()
1446 if (!dev->of_node) in omap_iommu_add_device()
1451 * since #iommu-cells = 0 for OMAP in omap_iommu_add_device()
1453 num_iommus = of_property_count_elems_of_size(dev->of_node, "iommus", in omap_iommu_add_device()
1460 return -ENOMEM; in omap_iommu_add_device()
1463 np = of_parse_phandle(dev->of_node, "iommus", i); in omap_iommu_add_device()
1466 return -EINVAL; in omap_iommu_add_device()
1473 return -EINVAL; in omap_iommu_add_device()
1480 return -EINVAL; in omap_iommu_add_device()
1483 tmp->iommu_dev = oiommu; in omap_iommu_add_device()
1493 oiommu = arch_data->iommu_dev; in omap_iommu_add_device()
1494 ret = iommu_device_link(&oiommu->iommu, dev); in omap_iommu_add_device()
1500 dev->archdata.iommu = arch_data; in omap_iommu_add_device()
1504 * needs a valid dev->archdata.iommu pointer in omap_iommu_add_device()
1508 iommu_device_unlink(&oiommu->iommu, dev); in omap_iommu_add_device()
1509 dev->archdata.iommu = NULL; in omap_iommu_add_device()
1520 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in omap_iommu_remove_device()
1522 if (!dev->of_node || !arch_data) in omap_iommu_remove_device()
1525 iommu_device_unlink(&arch_data->iommu_dev->iommu, dev); in omap_iommu_remove_device()
1528 dev->archdata.iommu = NULL; in omap_iommu_remove_device()
1535 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in omap_iommu_device_group()
1536 struct iommu_group *group = ERR_PTR(-EINVAL); in omap_iommu_device_group()
1538 if (arch_data->iommu_dev) in omap_iommu_device_group()
1539 group = iommu_group_ref_get(arch_data->iommu_dev->group); in omap_iommu_device_group()
1575 return -ENOMEM; in omap_iommu_init()