2  * ARM GIC v2m MSI(-X) support
19 #include <linux/dma-iommu.h>
23 #include <linux/msi.h>
28 #include <linux/irqchip/arm-gic.h>
33 *     [25:16] lowest SPI assigned to MSI
35 *     [9:0]   Numer of SPIs assigned to MSI
51 /* APM X-Gene with GICv2m MSI_IIDR register value */
67 	void __iomem *base;	/* GICv2m virt address */  member
68 	u32 spi_start;		/* The SPI number that MSIs start */
70 	u32 spi_offset;		/* offset to be subtracted from SPI number */
71 	unsigned long *bm;	/* MSI vector bitmap */
88 	.name			= "MSI",
104 	phys_addr_t addr = v2m->res.start + V2M_MSI_SETSPI_NS;  in gicv2m_compose_msi_msg()
106 	msg->address_hi = upper_32_bits(addr);  in gicv2m_compose_msi_msg()
107 	msg->address_lo = lower_32_bits(addr);  in gicv2m_compose_msi_msg()
108 	msg->data = data->hwirq;  in gicv2m_compose_msi_msg()
110 	if (v2m->flags & GICV2M_NEEDS_SPI_OFFSET)  in gicv2m_compose_msi_msg()
111 		msg->data -= v2m->spi_offset;  in gicv2m_compose_msi_msg()
113 	iommu_dma_map_msi_msg(data->irq, msg);  in gicv2m_compose_msi_msg()
133 	if (is_of_node(domain->parent->fwnode)) {  in gicv2m_irq_gic_domain_alloc()
134 		fwspec.fwnode = domain->parent->fwnode;  in gicv2m_irq_gic_domain_alloc()
137 		fwspec.param[1] = hwirq - 32;  in gicv2m_irq_gic_domain_alloc()
139 	} else if (is_fwnode_irqchip(domain->parent->fwnode)) {  in gicv2m_irq_gic_domain_alloc()
140 		fwspec.fwnode = domain->parent->fwnode;  in gicv2m_irq_gic_domain_alloc()
145 		return -EINVAL;  in gicv2m_irq_gic_domain_alloc()
153 	d = irq_domain_get_irq_data(domain->parent, virq);  in gicv2m_irq_gic_domain_alloc()
154 	d->chip->irq_set_type(d, IRQ_TYPE_EDGE_RISING);  in gicv2m_irq_gic_domain_alloc()
162 	bitmap_release_region(v2m->bm, hwirq - v2m->spi_start,  in gicv2m_unalloc_msi()
175 		offset = bitmap_find_free_region(tmp->bm, tmp->nr_spis,  in gicv2m_irq_domain_alloc()
185 		return -ENOSPC;  in gicv2m_irq_domain_alloc()
187 	hwirq = v2m->spi_start + offset;  in gicv2m_irq_domain_alloc()
212 	gicv2m_unalloc_msi(v2m, d->hwirq, nr_irqs);  in gicv2m_irq_domain_free()
221 static bool is_msi_spi_valid(u32 base, u32 num)  in is_msi_spi_valid()  argument
223 	if (base < V2M_MIN_SPI) {  in is_msi_spi_valid()
224 		pr_err("Invalid MSI base SPI (base:%u)\n", base);  in is_msi_spi_valid()
228 	if ((num == 0) || (base + num > V2M_MAX_SPI)) {  in is_msi_spi_valid()
230 		       num, V2M_MAX_SPI - V2M_MIN_SPI + 1);  in is_msi_spi_valid()
255 		list_del(&v2m->entry);  in gicv2m_teardown()
256 		kfree(v2m->bm);  in gicv2m_teardown()
257 		iounmap(v2m->base);  in gicv2m_teardown()
258 		of_node_put(to_of_node(v2m->fwnode));  in gicv2m_teardown()
259 		if (is_fwnode_irqchip(v2m->fwnode))  in gicv2m_teardown()
260 			irq_domain_free_fwnode(v2m->fwnode);  in gicv2m_teardown()
274 	inner_domain = irq_domain_create_tree(v2m->fwnode,  in gicv2m_allocate_domains()
278 		return -ENOMEM;  in gicv2m_allocate_domains()
282 	inner_domain->parent = parent;  in gicv2m_allocate_domains()
283 	pci_domain = pci_msi_create_irq_domain(v2m->fwnode,  in gicv2m_allocate_domains()
286 	plat_domain = platform_msi_create_irq_domain(v2m->fwnode,  in gicv2m_allocate_domains()
290 		pr_err("Failed to create MSI domains\n");  in gicv2m_allocate_domains()
296 		return -ENOMEM;  in gicv2m_allocate_domains()
312 		return -ENOMEM;  in gicv2m_init_one()
315 	INIT_LIST_HEAD(&v2m->entry);  in gicv2m_init_one()
316 	v2m->fwnode = fwnode;  in gicv2m_init_one()
318 	memcpy(&v2m->res, res, sizeof(struct resource));  in gicv2m_init_one()
320 	v2m->base = ioremap(v2m->res.start, resource_size(&v2m->res));  in gicv2m_init_one()
321 	if (!v2m->base) {  in gicv2m_init_one()
323 		ret = -ENOMEM;  in gicv2m_init_one()
328 		v2m->spi_start = spi_start;  in gicv2m_init_one()
329 		v2m->nr_spis = nr_spis;  in gicv2m_init_one()
331 		u32 typer = readl_relaxed(v2m->base + V2M_MSI_TYPER);  in gicv2m_init_one()
333 		v2m->spi_start = V2M_MSI_TYPER_BASE_SPI(typer);  in gicv2m_init_one()
334 		v2m->nr_spis = V2M_MSI_TYPER_NUM_SPI(typer);  in gicv2m_init_one()
337 	if (!is_msi_spi_valid(v2m->spi_start, v2m->nr_spis)) {  in gicv2m_init_one()
338 		ret = -EINVAL;  in gicv2m_init_one()
343 	 * APM X-Gene GICv2m implementation has an erratum where  in gicv2m_init_one()
344 	 * the MSI data needs to be the offset from the spi_start  in gicv2m_init_one()
345 	 * in order to trigger the correct MSI interrupt. This is  in gicv2m_init_one()
347 	 * the MSI data is the absolute value within the range from  in gicv2m_init_one()
350 	 * Broadom NS2 GICv2m implementation has an erratum where the MSI data  in gicv2m_init_one()
351 	 * is 'spi_number - 32'  in gicv2m_init_one()
353 	switch (readl_relaxed(v2m->base + V2M_MSI_IIDR)) {  in gicv2m_init_one()
355 		v2m->flags |= GICV2M_NEEDS_SPI_OFFSET;  in gicv2m_init_one()
356 		v2m->spi_offset = v2m->spi_start;  in gicv2m_init_one()
359 		v2m->flags |= GICV2M_NEEDS_SPI_OFFSET;  in gicv2m_init_one()
360 		v2m->spi_offset = 32;  in gicv2m_init_one()
364 	v2m->bm = kcalloc(BITS_TO_LONGS(v2m->nr_spis), sizeof(long),  in gicv2m_init_one()
366 	if (!v2m->bm) {  in gicv2m_init_one()
367 		ret = -ENOMEM;  in gicv2m_init_one()
371 	list_add_tail(&v2m->entry, &v2m_nodes);  in gicv2m_init_one()
373 	pr_info("range%pR, SPI[%d:%d]\n", res,  in gicv2m_init_one()
374 		v2m->spi_start, (v2m->spi_start + v2m->nr_spis - 1));  in gicv2m_init_one()
378 	iounmap(v2m->base);  in gicv2m_init_one()
385 	{	.compatible	= "arm,gic-v2m-frame",	},
401 		if (!of_find_property(child, "msi-controller", NULL))  in gicv2m_of_init()
410 		if (!of_property_read_u32(child, "arm,msi-base-spi",  in gicv2m_of_init()
412 		    !of_property_read_u32(child, "arm,msi-num-spis", &nr_spis))  in gicv2m_of_init()
413 			pr_info("DT overriding V2M MSI_TYPER (base:%u, num:%u)\n",  in gicv2m_of_init()
416 		ret = gicv2m_init_one(&child->fwnode, spi_start, nr_spis, &res);  in gicv2m_of_init()
440 	/* We only return the fwnode of the first MSI frame. */  in gicv2m_get_fwnode()
445 	return data->fwnode;  in gicv2m_get_fwnode()
460 		return -EINVAL;  in acpi_parse_madt_msi()
462 	res.start = m->base_address;  in acpi_parse_madt_msi()
463 	res.end = m->base_address + SZ_4K - 1;  in acpi_parse_madt_msi()
466 	if (m->flags & ACPI_MADT_OVERRIDE_SPI_VALUES) {  in acpi_parse_madt_msi()
467 		spi_start = m->spi_base;  in acpi_parse_madt_msi()
468 		nr_spis = m->spi_count;  in acpi_parse_madt_msi()
470 		pr_info("ACPI overriding V2M MSI_TYPER (base:%u, num:%u)\n",  in acpi_parse_madt_msi()
474 	fwnode = irq_domain_alloc_fwnode((void *)m->base_address);  in acpi_parse_madt_msi()
477 		return -EINVAL;  in acpi_parse_madt_msi()
510 	return -EINVAL;  in gicv2m_acpi_init()
515 	return -EINVAL;  in gicv2m_acpi_init()