2  *  linux/arch/arm/mach-mmp/irq.c
4  *  Generic IRQ handling, GPIO IRQ demultiplexing, etc.
5  *  Copyright (C) 2008 - 2012 Marvell Technology Group Ltd.
17 #include <linux/irq.h>
68 	struct irq_domain *domain = d->domain;  in icu_mask_ack_irq()
69 	struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data;  in icu_mask_ack_irq()
73 	hwirq = d->irq - data->virq_base;  in icu_mask_ack_irq()
76 		r &= ~data->conf_mask;  in icu_mask_ack_irq()
77 		r |= data->conf_disable;  in icu_mask_ack_irq()
81 		if ((data->virq_base == data->clr_mfp_irq_base)  in icu_mask_ack_irq()
82 			&& (hwirq == data->clr_mfp_hwirq))  in icu_mask_ack_irq()
85 		r = readl_relaxed(data->reg_mask) | (1 << hwirq);  in icu_mask_ack_irq()
86 		writel_relaxed(r, data->reg_mask);  in icu_mask_ack_irq()
92 	struct irq_domain *domain = d->domain;  in icu_mask_irq()
93 	struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data;  in icu_mask_irq()
97 	hwirq = d->irq - data->virq_base;  in icu_mask_irq()
100 		r &= ~data->conf_mask;  in icu_mask_irq()
101 		r |= data->conf_disable;  in icu_mask_irq()
104 		r = readl_relaxed(data->reg_mask) | (1 << hwirq);  in icu_mask_irq()
105 		writel_relaxed(r, data->reg_mask);  in icu_mask_irq()
111 	struct irq_domain *domain = d->domain;  in icu_unmask_irq()
112 	struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data;  in icu_unmask_irq()
116 	hwirq = d->irq - data->virq_base;  in icu_unmask_irq()
119 		r &= ~data->conf_mask;  in icu_unmask_irq()
120 		r |= data->conf_enable;  in icu_unmask_irq()
123 		r = readl_relaxed(data->reg_mask) & ~(1 << hwirq);  in icu_unmask_irq()
124 		writel_relaxed(r, data->reg_mask);  in icu_unmask_irq()
137 	unsigned int irq = irq_desc_get_irq(desc);  in icu_mux_irq_demux()  local
144 		if (irq == icu_data[i].cascade_irq) {  in icu_mux_irq_demux()
146 			data = (struct icu_chip_data *)domain->host_data;  in icu_mux_irq_demux()
151 		pr_err("Spurious irq %d in MMP INTC\n", irq);  in icu_mux_irq_demux()
155 	mask = readl_relaxed(data->reg_mask);  in icu_mux_irq_demux()
157 		status = readl_relaxed(data->reg_status) & ~mask;  in icu_mux_irq_demux()
166 static int mmp_irq_domain_map(struct irq_domain *d, unsigned int irq,  in mmp_irq_domain_map()  argument
169 	irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq);  in mmp_irq_domain_map()
225 	int irq;  in icu_init_irq()  local
237 	for (irq = 0; irq < 64; irq++) {  in icu_init_irq()
238 		icu_mask_irq(irq_get_irq_data(irq));  in icu_init_irq()
239 		irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq);  in icu_init_irq()
248 	int irq, end;  in mmp2_init_icu()  local
327 	for (irq = 0; irq < end; irq++) {  in mmp2_init_icu()
328 		icu_mask_irq(irq_get_irq_data(irq));  in mmp2_init_icu()
329 		if (irq == icu_data[1].cascade_irq ||  in mmp2_init_icu()
330 		    irq == icu_data[2].cascade_irq ||  in mmp2_init_icu()
331 		    irq == icu_data[3].cascade_irq ||  in mmp2_init_icu()
332 		    irq == icu_data[4].cascade_irq ||  in mmp2_init_icu()
333 		    irq == icu_data[5].cascade_irq ||  in mmp2_init_icu()
334 		    irq == icu_data[6].cascade_irq ||  in mmp2_init_icu()
335 		    irq == icu_data[7].cascade_irq) {  in mmp2_init_icu()
336 			irq_set_chip(irq, &icu_irq_chip);  in mmp2_init_icu()
337 			irq_set_chained_handler(irq, icu_mux_irq_demux);  in mmp2_init_icu()
339 			irq_set_chip_and_handler(irq, &icu_irq_chip,  in mmp2_init_icu()
350 	int ret, nr_irqs, irq, i = 0;  in mmp_init_bases()  local
352 	ret = of_property_read_u32(node, "mrvl,intc-nr-irqs", &nr_irqs);  in mmp_init_bases()
354 		pr_err("Not found mrvl,intc-nr-irqs property\n");  in mmp_init_bases()
361 		return -ENOMEM;  in mmp_init_bases()
368 	for (irq = 0; irq < nr_irqs; irq++) {  in mmp_init_bases()
369 		ret = irq_create_mapping(icu_data[0].domain, irq);  in mmp_init_bases()
374 		if (!irq)  in mmp_init_bases()
381 		for (i = 0; i < irq; i++)  in mmp_init_bases()
386 	return -EINVAL;  in mmp_init_bases()
406 IRQCHIP_DECLARE(mmp_intc, "mrvl,mmp-intc", mmp_of_init);
425 IRQCHIP_DECLARE(mmp2_intc, "mrvl,mmp2-intc", mmp2_of_init);
431 	int i, ret, irq, j = 0;  in mmp2_mux_of_init()  local
435 		return -ENODEV;  in mmp2_mux_of_init()
438 	ret = of_property_read_u32(node, "mrvl,intc-nr-irqs",  in mmp2_mux_of_init()
441 		pr_err("Not found mrvl,intc-nr-irqs property\n");  in mmp2_mux_of_init()
442 		return -EINVAL;  in mmp2_mux_of_init()
447 		return -EINVAL;  in mmp2_mux_of_init()
453 		return -EINVAL;  in mmp2_mux_of_init()
458 		return -EINVAL;  in mmp2_mux_of_init()
464 	for (irq = 0; irq < nr_irqs; irq++) {  in mmp2_mux_of_init()
465 		ret = irq_create_mapping(icu_data[i].domain, irq);  in mmp2_mux_of_init()
470 		if (!irq)  in mmp2_mux_of_init()
474 	if (!of_property_read_u32(node, "mrvl,clr-mfp-irq",  in mmp2_mux_of_init()
485 		for (j = 0; j < irq; j++)  in mmp2_mux_of_init()
489 	return -EINVAL;  in mmp2_mux_of_init()
491 IRQCHIP_DECLARE(mmp2_mux_intc, "mrvl,mmp2-mux-intc", mmp2_mux_of_init);