Lines Matching +full:cs +full:- +full:0
33 #define DIVA_HSCX_DATA 0
38 #define DIVA_IPAC_ADR 0
42 #define DIVA_PCI_ISAC_ADR 0xc
43 #define DIVA_PCI_CTRL 0x10
53 #define DIVA_IRQ_STAT 0x01
54 #define DIVA_EEPROM_SDA 0x02
57 #define DIVA_IRQ_REQ 0x01
58 #define DIVA_RESET 0x08
59 #define DIVA_EEPROM_CLK 0x40
60 #define DIVA_PCI_LED_A 0x10
61 #define DIVA_PCI_LED_B 0x20
62 #define DIVA_ISA_LED_A 0x20
63 #define DIVA_ISA_LED_B 0x40
64 #define DIVA_IRQ_CLR 0x80
67 #define PITA_MISC_REG 0x1c
69 #define PITA_PARA_SOFTRESET 0x00000001
70 #define PITA_SER_SOFTRESET 0x00000002
71 #define PITA_PARA_MPX_MODE 0x00000004
72 #define PITA_INT0_ENABLE 0x00000200
74 #define PITA_PARA_SOFTRESET 0x01000000
75 #define PITA_SER_SOFTRESET 0x02000000
76 #define PITA_PARA_MPX_MODE 0x04000000
77 #define PITA_INT0_ENABLE 0x00020000
79 #define PITA_INT0_STATUS 0x02
132 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
134 return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset)); in ReadISAC()
138 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
140 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset, value); in WriteISAC()
144 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size) in ReadISACfifo() argument
146 readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size); in ReadISACfifo()
150 WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size) in WriteISACfifo() argument
152 writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size); in WriteISACfifo()
156 ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset) in ReadISAC_IPAC() argument
158 return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset + 0x80)); in ReadISAC_IPAC()
162 WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC_IPAC() argument
164 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset | 0x80, value); in WriteISAC_IPAC()
168 ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size) in ReadISACfifo_IPAC() argument
170 readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size); in ReadISACfifo_IPAC()
174 WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size) in WriteISACfifo_IPAC() argument
176 writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size); in WriteISACfifo_IPAC()
180 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument
182 return (readreg(cs->hw.diva.hscx_adr, in ReadHSCX()
183 cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0))); in ReadHSCX()
187 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument
189 writereg(cs->hw.diva.hscx_adr, in WriteHSCX()
190 cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0), value); in WriteHSCX()
194 MemReadISAC_IPAC(struct IsdnCardState *cs, u_char offset) in MemReadISAC_IPAC() argument
196 return (memreadreg(cs->hw.diva.cfg_reg, offset + 0x80)); in MemReadISAC_IPAC()
200 MemWriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value) in MemWriteISAC_IPAC() argument
202 memwritereg(cs->hw.diva.cfg_reg, offset | 0x80, value); in MemWriteISAC_IPAC()
206 MemReadISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size) in MemReadISACfifo_IPAC() argument
208 while (size--) in MemReadISACfifo_IPAC()
209 *data++ = memreadreg(cs->hw.diva.cfg_reg, 0x80); in MemReadISACfifo_IPAC()
213 MemWriteISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size) in MemWriteISACfifo_IPAC() argument
215 while (size--) in MemWriteISACfifo_IPAC()
216 memwritereg(cs->hw.diva.cfg_reg, 0x80, *data++); in MemWriteISACfifo_IPAC()
220 MemReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in MemReadHSCX() argument
222 return (memreadreg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0))); in MemReadHSCX()
226 MemWriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in MemWriteHSCX() argument
228 memwritereg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0), value); in MemWriteHSCX()
231 /* IO-Functions for IPACX type cards */
233 MemReadISAC_IPACX(struct IsdnCardState *cs, u_char offset) in MemReadISAC_IPACX() argument
235 return (memreadreg(cs->hw.diva.cfg_reg, offset)); in MemReadISAC_IPACX()
239 MemWriteISAC_IPACX(struct IsdnCardState *cs, u_char offset, u_char value) in MemWriteISAC_IPACX() argument
241 memwritereg(cs->hw.diva.cfg_reg, offset, value); in MemWriteISAC_IPACX()
245 MemReadISACfifo_IPACX(struct IsdnCardState *cs, u_char *data, int size) in MemReadISACfifo_IPACX() argument
247 while (size--) in MemReadISACfifo_IPACX()
248 *data++ = memreadreg(cs->hw.diva.cfg_reg, 0); in MemReadISACfifo_IPACX()
252 MemWriteISACfifo_IPACX(struct IsdnCardState *cs, u_char *data, int size) in MemWriteISACfifo_IPACX() argument
254 while (size--) in MemWriteISACfifo_IPACX()
255 memwritereg(cs->hw.diva.cfg_reg, 0, *data++); in MemWriteISACfifo_IPACX()
259 MemReadHSCX_IPACX(struct IsdnCardState *cs, int hscx, u_char offset) in MemReadHSCX_IPACX() argument
261 return (memreadreg(cs->hw.diva.cfg_reg, offset + in MemReadHSCX_IPACX()
266 MemWriteHSCX_IPACX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in MemWriteHSCX_IPACX() argument
268 memwritereg(cs->hw.diva.cfg_reg, offset + in MemWriteHSCX_IPACX()
276 #define READHSCX(cs, nr, reg) readreg(cs->hw.diva.hscx_adr, \ argument
277 cs->hw.diva.hscx, reg + (nr ? 0x40 : 0))
278 #define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.diva.hscx_adr, \ argument
279 cs->hw.diva.hscx, reg + (nr ? 0x40 : 0), data)
281 #define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.diva.hscx_adr, \ argument
282 cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt)
284 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.diva.hscx_adr, \ argument
285 cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt)
292 struct IsdnCardState *cs = dev_id; in diva_interrupt() local
297 spin_lock_irqsave(&cs->lock, flags); in diva_interrupt()
298 while (((sval = bytein(cs->hw.diva.ctrl)) & DIVA_IRQ_REQ) && cnt) { in diva_interrupt()
299 val = readreg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_ISTA + 0x40); in diva_interrupt()
301 hscx_int_main(cs, val); in diva_interrupt()
302 val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_ISTA); in diva_interrupt()
304 isac_interrupt(cs, val); in diva_interrupt()
305 cnt--; in diva_interrupt()
309 writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK, 0xFF); in diva_interrupt()
310 writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK + 0x40, 0xFF); in diva_interrupt()
311 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_MASK, 0xFF); in diva_interrupt()
312 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_MASK, 0x0); in diva_interrupt()
313 writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK, 0x0); in diva_interrupt()
314 writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK + 0x40, 0x0); in diva_interrupt()
315 spin_unlock_irqrestore(&cs->lock, flags); in diva_interrupt()
322 struct IsdnCardState *cs = dev_id; in diva_irq_ipac_isa() local
327 spin_lock_irqsave(&cs->lock, flags); in diva_irq_ipac_isa()
328 ista = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ISTA); in diva_irq_ipac_isa()
330 if (cs->debug & L1_DEB_IPAC) in diva_irq_ipac_isa()
331 debugl1(cs, "IPAC ISTA %02X", ista); in diva_irq_ipac_isa()
332 if (ista & 0x0f) { in diva_irq_ipac_isa()
333 val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, HSCX_ISTA + 0x40); in diva_irq_ipac_isa()
334 if (ista & 0x01) in diva_irq_ipac_isa()
335 val |= 0x01; in diva_irq_ipac_isa()
336 if (ista & 0x04) in diva_irq_ipac_isa()
337 val |= 0x02; in diva_irq_ipac_isa()
338 if (ista & 0x08) in diva_irq_ipac_isa()
339 val |= 0x04; in diva_irq_ipac_isa()
341 hscx_int_main(cs, val); in diva_irq_ipac_isa()
343 if (ista & 0x20) { in diva_irq_ipac_isa()
344 val = 0xfe & readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_ISTA + 0x80); in diva_irq_ipac_isa()
346 isac_interrupt(cs, val); in diva_irq_ipac_isa()
349 if (ista & 0x10) { in diva_irq_ipac_isa()
350 val = 0x01; in diva_irq_ipac_isa()
351 isac_interrupt(cs, val); in diva_irq_ipac_isa()
353 ista = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ISTA); in diva_irq_ipac_isa()
354 if ((ista & 0x3f) && icnt) { in diva_irq_ipac_isa()
355 icnt--; in diva_irq_ipac_isa()
360 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xFF); in diva_irq_ipac_isa()
361 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xC0); in diva_irq_ipac_isa()
362 spin_unlock_irqrestore(&cs->lock, flags); in diva_irq_ipac_isa()
367 MemwaitforCEC(struct IsdnCardState *cs, int hscx) in MemwaitforCEC() argument
371 while ((MemReadHSCX(cs, hscx, HSCX_STAR) & 0x04) && to) { in MemwaitforCEC()
373 to--; in MemwaitforCEC()
381 MemwaitforXFW(struct IsdnCardState *cs, int hscx) in MemwaitforXFW() argument
385 while (((MemReadHSCX(cs, hscx, HSCX_STAR) & 0x44) != 0x40) && to) { in MemwaitforXFW()
387 to--; in MemwaitforXFW()
394 MemWriteHSCXCMDR(struct IsdnCardState *cs, int hscx, u_char data) in MemWriteHSCXCMDR() argument
396 MemwaitforCEC(cs, hscx); in MemWriteHSCXCMDR()
397 MemWriteHSCX(cs, hscx, HSCX_CMDR, data); in MemWriteHSCXCMDR()
404 struct IsdnCardState *cs = bcs->cs; in Memhscx_empty_fifo() local
407 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO)) in Memhscx_empty_fifo()
408 debugl1(cs, "hscx_empty_fifo"); in Memhscx_empty_fifo()
410 if (bcs->hw.hscx.rcvidx + count > HSCX_BUFMAX) { in Memhscx_empty_fifo()
411 if (cs->debug & L1_DEB_WARN) in Memhscx_empty_fifo()
412 debugl1(cs, "hscx_empty_fifo: incoming packet too large"); in Memhscx_empty_fifo()
413 MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, 0x80); in Memhscx_empty_fifo()
414 bcs->hw.hscx.rcvidx = 0; in Memhscx_empty_fifo()
417 ptr = bcs->hw.hscx.rcvbuf + bcs->hw.hscx.rcvidx; in Memhscx_empty_fifo()
419 while (cnt--) in Memhscx_empty_fifo()
420 *ptr++ = memreadreg(cs->hw.diva.cfg_reg, bcs->hw.hscx.hscx ? 0x40 : 0); in Memhscx_empty_fifo()
421 MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, 0x80); in Memhscx_empty_fifo()
422 ptr = bcs->hw.hscx.rcvbuf + bcs->hw.hscx.rcvidx; in Memhscx_empty_fifo()
423 bcs->hw.hscx.rcvidx += count; in Memhscx_empty_fifo()
424 if (cs->debug & L1_DEB_HSCX_FIFO) { in Memhscx_empty_fifo()
425 char *t = bcs->blog; in Memhscx_empty_fifo()
428 bcs->hw.hscx.hscx ? 'B' : 'A', count); in Memhscx_empty_fifo()
430 debugl1(cs, "%s", bcs->blog); in Memhscx_empty_fifo()
437 struct IsdnCardState *cs = bcs->cs; in Memhscx_fill_fifo() local
439 int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags) ? 64 : 32; in Memhscx_fill_fifo()
442 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO)) in Memhscx_fill_fifo()
443 debugl1(cs, "hscx_fill_fifo"); in Memhscx_fill_fifo()
445 if (!bcs->tx_skb) in Memhscx_fill_fifo()
447 if (bcs->tx_skb->len <= 0) in Memhscx_fill_fifo()
450 more = (bcs->mode == L1_MODE_TRANS) ? 1 : 0; in Memhscx_fill_fifo()
451 if (bcs->tx_skb->len > fifo_size) { in Memhscx_fill_fifo()
452 more = !0; in Memhscx_fill_fifo()
455 count = bcs->tx_skb->len; in Memhscx_fill_fifo()
457 MemwaitforXFW(cs, bcs->hw.hscx.hscx); in Memhscx_fill_fifo()
458 p = ptr = bcs->tx_skb->data; in Memhscx_fill_fifo()
459 skb_pull(bcs->tx_skb, count); in Memhscx_fill_fifo()
460 bcs->tx_cnt -= count; in Memhscx_fill_fifo()
461 bcs->hw.hscx.count += count; in Memhscx_fill_fifo()
462 while (cnt--) in Memhscx_fill_fifo()
463 memwritereg(cs->hw.diva.cfg_reg, bcs->hw.hscx.hscx ? 0x40 : 0, in Memhscx_fill_fifo()
465 MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, more ? 0x8 : 0xa); in Memhscx_fill_fifo()
466 if (cs->debug & L1_DEB_HSCX_FIFO) { in Memhscx_fill_fifo()
467 char *t = bcs->blog; in Memhscx_fill_fifo()
470 bcs->hw.hscx.hscx ? 'B' : 'A', count); in Memhscx_fill_fifo()
472 debugl1(cs, "%s", bcs->blog); in Memhscx_fill_fifo()
477 Memhscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx) in Memhscx_interrupt() argument
480 struct BCState *bcs = cs->bcs + hscx; in Memhscx_interrupt()
482 int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags) ? 64 : 32; in Memhscx_interrupt()
485 if (!test_bit(BC_FLG_INIT, &bcs->Flag)) in Memhscx_interrupt()
488 if (val & 0x80) { /* RME */ in Memhscx_interrupt()
489 r = MemReadHSCX(cs, hscx, HSCX_RSTA); in Memhscx_interrupt()
490 if ((r & 0xf0) != 0xa0) { in Memhscx_interrupt()
491 if (!(r & 0x80)) in Memhscx_interrupt()
492 if (cs->debug & L1_DEB_WARN) in Memhscx_interrupt()
493 debugl1(cs, "HSCX invalid frame"); in Memhscx_interrupt()
494 if ((r & 0x40) && bcs->mode) in Memhscx_interrupt()
495 if (cs->debug & L1_DEB_WARN) in Memhscx_interrupt()
496 debugl1(cs, "HSCX RDO mode=%d", in Memhscx_interrupt()
497 bcs->mode); in Memhscx_interrupt()
498 if (!(r & 0x20)) in Memhscx_interrupt()
499 if (cs->debug & L1_DEB_WARN) in Memhscx_interrupt()
500 debugl1(cs, "HSCX CRC error"); in Memhscx_interrupt()
501 MemWriteHSCXCMDR(cs, hscx, 0x80); in Memhscx_interrupt()
503 count = MemReadHSCX(cs, hscx, HSCX_RBCL) & ( in Memhscx_interrupt()
504 test_bit(HW_IPAC, &cs->HW_Flags) ? 0x3f : 0x1f); in Memhscx_interrupt()
505 if (count == 0) in Memhscx_interrupt()
508 if ((count = bcs->hw.hscx.rcvidx - 1) > 0) { in Memhscx_interrupt()
509 if (cs->debug & L1_DEB_HSCX_FIFO) in Memhscx_interrupt()
510 debugl1(cs, "HX Frame %d", count); in Memhscx_interrupt()
514 skb_put_data(skb, bcs->hw.hscx.rcvbuf, in Memhscx_interrupt()
516 skb_queue_tail(&bcs->rqueue, skb); in Memhscx_interrupt()
520 bcs->hw.hscx.rcvidx = 0; in Memhscx_interrupt()
523 if (val & 0x40) { /* RPF */ in Memhscx_interrupt()
525 if (bcs->mode == L1_MODE_TRANS) { in Memhscx_interrupt()
530 skb_put_data(skb, bcs->hw.hscx.rcvbuf, in Memhscx_interrupt()
532 skb_queue_tail(&bcs->rqueue, skb); in Memhscx_interrupt()
534 bcs->hw.hscx.rcvidx = 0; in Memhscx_interrupt()
538 if (val & 0x10) { /* XPR */ in Memhscx_interrupt()
539 if (bcs->tx_skb) { in Memhscx_interrupt()
540 if (bcs->tx_skb->len) { in Memhscx_interrupt()
544 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) && in Memhscx_interrupt()
545 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { in Memhscx_interrupt()
547 spin_lock_irqsave(&bcs->aclock, flags); in Memhscx_interrupt()
548 bcs->ackcnt += bcs->hw.hscx.count; in Memhscx_interrupt()
549 spin_unlock_irqrestore(&bcs->aclock, flags); in Memhscx_interrupt()
552 dev_kfree_skb_irq(bcs->tx_skb); in Memhscx_interrupt()
553 bcs->hw.hscx.count = 0; in Memhscx_interrupt()
554 bcs->tx_skb = NULL; in Memhscx_interrupt()
557 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) { in Memhscx_interrupt()
558 bcs->hw.hscx.count = 0; in Memhscx_interrupt()
559 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); in Memhscx_interrupt()
562 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); in Memhscx_interrupt()
569 Memhscx_int_main(struct IsdnCardState *cs, u_char val) in Memhscx_int_main() argument
575 if (val & 0x01) { // EXB in Memhscx_int_main()
576 bcs = cs->bcs + 1; in Memhscx_int_main()
577 exval = MemReadHSCX(cs, 1, HSCX_EXIR); in Memhscx_int_main()
578 if (exval & 0x40) { in Memhscx_int_main()
579 if (bcs->mode == 1) in Memhscx_int_main()
585 if (bcs->tx_skb) { in Memhscx_int_main()
586 skb_push(bcs->tx_skb, bcs->hw.hscx.count); in Memhscx_int_main()
587 bcs->tx_cnt += bcs->hw.hscx.count; in Memhscx_int_main()
588 bcs->hw.hscx.count = 0; in Memhscx_int_main()
590 MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, 0x01); in Memhscx_int_main()
591 if (cs->debug & L1_DEB_WARN) in Memhscx_int_main()
592 debugl1(cs, "HSCX B EXIR %x Lost TX", exval); in Memhscx_int_main()
594 } else if (cs->debug & L1_DEB_HSCX) in Memhscx_int_main()
595 debugl1(cs, "HSCX B EXIR %x", exval); in Memhscx_int_main()
597 if (val & 0xf8) { in Memhscx_int_main()
598 if (cs->debug & L1_DEB_HSCX) in Memhscx_int_main()
599 debugl1(cs, "HSCX B interrupt %x", val); in Memhscx_int_main()
600 Memhscx_interrupt(cs, val, 1); in Memhscx_int_main()
602 if (val & 0x02) { // EXA in Memhscx_int_main()
603 bcs = cs->bcs; in Memhscx_int_main()
604 exval = MemReadHSCX(cs, 0, HSCX_EXIR); in Memhscx_int_main()
605 if (exval & 0x40) { in Memhscx_int_main()
606 if (bcs->mode == L1_MODE_TRANS) in Memhscx_int_main()
612 if (bcs->tx_skb) { in Memhscx_int_main()
613 skb_push(bcs->tx_skb, bcs->hw.hscx.count); in Memhscx_int_main()
614 bcs->tx_cnt += bcs->hw.hscx.count; in Memhscx_int_main()
615 bcs->hw.hscx.count = 0; in Memhscx_int_main()
617 MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, 0x01); in Memhscx_int_main()
618 if (cs->debug & L1_DEB_WARN) in Memhscx_int_main()
619 debugl1(cs, "HSCX A EXIR %x Lost TX", exval); in Memhscx_int_main()
621 } else if (cs->debug & L1_DEB_HSCX) in Memhscx_int_main()
622 debugl1(cs, "HSCX A EXIR %x", exval); in Memhscx_int_main()
624 if (val & 0x04) { // ICA in Memhscx_int_main()
625 exval = MemReadHSCX(cs, 0, HSCX_ISTA); in Memhscx_int_main()
626 if (cs->debug & L1_DEB_HSCX) in Memhscx_int_main()
627 debugl1(cs, "HSCX A interrupt %x", exval); in Memhscx_int_main()
628 Memhscx_interrupt(cs, exval, 0); in Memhscx_int_main()
635 struct IsdnCardState *cs = dev_id; in diva_irq_ipac_pci() local
641 spin_lock_irqsave(&cs->lock, flags); in diva_irq_ipac_pci()
642 cfg = (u_char *) cs->hw.diva.pci_cfg; in diva_irq_ipac_pci()
645 spin_unlock_irqrestore(&cs->lock, flags); in diva_irq_ipac_pci()
649 ista = memreadreg(cs->hw.diva.cfg_reg, IPAC_ISTA); in diva_irq_ipac_pci()
651 if (cs->debug & L1_DEB_IPAC) in diva_irq_ipac_pci()
652 debugl1(cs, "IPAC ISTA %02X", ista); in diva_irq_ipac_pci()
653 if (ista & 0x0f) { in diva_irq_ipac_pci()
654 val = memreadreg(cs->hw.diva.cfg_reg, HSCX_ISTA + 0x40); in diva_irq_ipac_pci()
655 if (ista & 0x01) in diva_irq_ipac_pci()
656 val |= 0x01; in diva_irq_ipac_pci()
657 if (ista & 0x04) in diva_irq_ipac_pci()
658 val |= 0x02; in diva_irq_ipac_pci()
659 if (ista & 0x08) in diva_irq_ipac_pci()
660 val |= 0x04; in diva_irq_ipac_pci()
662 Memhscx_int_main(cs, val); in diva_irq_ipac_pci()
664 if (ista & 0x20) { in diva_irq_ipac_pci()
665 val = 0xfe & memreadreg(cs->hw.diva.cfg_reg, ISAC_ISTA + 0x80); in diva_irq_ipac_pci()
667 isac_interrupt(cs, val); in diva_irq_ipac_pci()
670 if (ista & 0x10) { in diva_irq_ipac_pci()
671 val = 0x01; in diva_irq_ipac_pci()
672 isac_interrupt(cs, val); in diva_irq_ipac_pci()
674 ista = memreadreg(cs->hw.diva.cfg_reg, IPAC_ISTA); in diva_irq_ipac_pci()
675 if ((ista & 0x3f) && icnt) { in diva_irq_ipac_pci()
676 icnt--; in diva_irq_ipac_pci()
681 memwritereg(cs->hw.diva.cfg_reg, IPAC_MASK, 0xFF); in diva_irq_ipac_pci()
682 memwritereg(cs->hw.diva.cfg_reg, IPAC_MASK, 0xC0); in diva_irq_ipac_pci()
683 spin_unlock_irqrestore(&cs->lock, flags); in diva_irq_ipac_pci()
690 struct IsdnCardState *cs = dev_id; in diva_irq_ipacx_pci() local
695 spin_lock_irqsave(&cs->lock, flags); in diva_irq_ipacx_pci()
696 cfg = (u_char *) cs->hw.diva.pci_cfg; in diva_irq_ipacx_pci()
699 spin_unlock_irqrestore(&cs->lock, flags); in diva_irq_ipacx_pci()
702 interrupt_ipacx(cs); // handler for chip in diva_irq_ipacx_pci()
704 spin_unlock_irqrestore(&cs->lock, flags); in diva_irq_ipacx_pci()
709 release_io_diva(struct IsdnCardState *cs) in release_io_diva() argument
713 if ((cs->subtyp == DIVA_IPAC_PCI) || in release_io_diva()
714 (cs->subtyp == DIVA_IPACX_PCI)) { in release_io_diva()
715 u_int *cfg = (unsigned int *)cs->hw.diva.pci_cfg; in release_io_diva()
717 *cfg = 0; /* disable INT0/1 */ in release_io_diva()
719 if (cs->hw.diva.cfg_reg) in release_io_diva()
720 iounmap((void *)cs->hw.diva.cfg_reg); in release_io_diva()
721 if (cs->hw.diva.pci_cfg) in release_io_diva()
722 iounmap((void *)cs->hw.diva.pci_cfg); in release_io_diva()
724 } else if (cs->subtyp != DIVA_IPAC_ISA) { in release_io_diva()
725 del_timer(&cs->hw.diva.tl); in release_io_diva()
726 if (cs->hw.diva.cfg_reg) in release_io_diva()
727 byteout(cs->hw.diva.ctrl, 0); /* LED off, Reset */ in release_io_diva()
729 if ((cs->subtyp == DIVA_ISA) || (cs->subtyp == DIVA_IPAC_ISA)) in release_io_diva()
733 if (cs->hw.diva.cfg_reg) { in release_io_diva()
734 release_region(cs->hw.diva.cfg_reg, bytecnt); in release_io_diva()
739 iounmap_diva(struct IsdnCardState *cs) in iounmap_diva() argument
741 if ((cs->subtyp == DIVA_IPAC_PCI) || (cs->subtyp == DIVA_IPACX_PCI)) { in iounmap_diva()
742 if (cs->hw.diva.cfg_reg) { in iounmap_diva()
743 iounmap((void *)cs->hw.diva.cfg_reg); in iounmap_diva()
744 cs->hw.diva.cfg_reg = 0; in iounmap_diva()
746 if (cs->hw.diva.pci_cfg) { in iounmap_diva()
747 iounmap((void *)cs->hw.diva.pci_cfg); in iounmap_diva()
748 cs->hw.diva.pci_cfg = 0; in iounmap_diva()
756 reset_diva(struct IsdnCardState *cs) in reset_diva() argument
758 if (cs->subtyp == DIVA_IPAC_ISA) { in reset_diva()
759 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_POTA2, 0x20); in reset_diva()
761 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_POTA2, 0x00); in reset_diva()
763 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xc0); in reset_diva()
764 } else if (cs->subtyp == DIVA_IPAC_PCI) { in reset_diva()
765 unsigned int *ireg = (unsigned int *)(cs->hw.diva.pci_cfg + in reset_diva()
771 memwritereg(cs->hw.diva.cfg_reg, IPAC_MASK, 0xc0); in reset_diva()
772 } else if (cs->subtyp == DIVA_IPACX_PCI) { in reset_diva()
773 unsigned int *ireg = (unsigned int *)(cs->hw.diva.pci_cfg + in reset_diva()
779 MemWriteISAC_IPACX(cs, IPACX_MASK, 0xff); // Interrupts off in reset_diva()
781 cs->hw.diva.ctrl_reg = 0; /* Reset On */ in reset_diva()
782 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg); in reset_diva()
784 cs->hw.diva.ctrl_reg |= DIVA_RESET; /* Reset Off */ in reset_diva()
785 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg); in reset_diva()
787 if (cs->subtyp == DIVA_ISA) in reset_diva()
788 cs->hw.diva.ctrl_reg |= DIVA_ISA_LED_A; in reset_diva()
791 byteout(cs->hw.diva.pci_cfg + 0x69, 9); in reset_diva()
792 cs->hw.diva.ctrl_reg |= DIVA_PCI_LED_A; in reset_diva()
794 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg); in reset_diva()
803 struct IsdnCardState *cs = from_timer(cs, t, hw.diva.tl); in diva_led_handler() local
804 int blink = 0; in diva_led_handler()
806 if ((cs->subtyp == DIVA_IPAC_ISA) || in diva_led_handler()
807 (cs->subtyp == DIVA_IPAC_PCI) || in diva_led_handler()
808 (cs->subtyp == DIVA_IPACX_PCI)) in diva_led_handler()
810 del_timer(&cs->hw.diva.tl); in diva_led_handler()
811 if (cs->hw.diva.status & DIVA_ASSIGN) in diva_led_handler()
812 cs->hw.diva.ctrl_reg |= (DIVA_ISA == cs->subtyp) ? in diva_led_handler()
815 cs->hw.diva.ctrl_reg ^= (DIVA_ISA == cs->subtyp) ? in diva_led_handler()
819 if (cs->hw.diva.status & 0xf000) in diva_led_handler()
820 cs->hw.diva.ctrl_reg |= (DIVA_ISA == cs->subtyp) ? in diva_led_handler()
822 else if (cs->hw.diva.status & 0x0f00) { in diva_led_handler()
823 cs->hw.diva.ctrl_reg ^= (DIVA_ISA == cs->subtyp) ? in diva_led_handler()
827 cs->hw.diva.ctrl_reg &= ~((DIVA_ISA == cs->subtyp) ? in diva_led_handler()
830 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg); in diva_led_handler()
832 cs->hw.diva.tl.expires = jiffies + ((blink * HZ) / 1000); in diva_led_handler()
833 add_timer(&cs->hw.diva.tl); in diva_led_handler()
838 Diva_card_msg(struct IsdnCardState *cs, int mt, void *arg) in Diva_card_msg() argument
845 spin_lock_irqsave(&cs->lock, flags); in Diva_card_msg()
846 reset_diva(cs); in Diva_card_msg()
847 spin_unlock_irqrestore(&cs->lock, flags); in Diva_card_msg()
848 return (0); in Diva_card_msg()
850 release_io_diva(cs); in Diva_card_msg()
851 return (0); in Diva_card_msg()
853 spin_lock_irqsave(&cs->lock, flags); in Diva_card_msg()
854 reset_diva(cs); in Diva_card_msg()
855 if (cs->subtyp == DIVA_IPACX_PCI) { in Diva_card_msg()
856 ireg = (unsigned int *)cs->hw.diva.pci_cfg; in Diva_card_msg()
858 init_ipacx(cs, 3); // init chip and enable interrupts in Diva_card_msg()
859 spin_unlock_irqrestore(&cs->lock, flags); in Diva_card_msg()
860 return (0); in Diva_card_msg()
862 if (cs->subtyp == DIVA_IPAC_PCI) { in Diva_card_msg()
863 ireg = (unsigned int *)cs->hw.diva.pci_cfg; in Diva_card_msg()
866 inithscxisac(cs, 3); in Diva_card_msg()
867 spin_unlock_irqrestore(&cs->lock, flags); in Diva_card_msg()
868 return (0); in Diva_card_msg()
870 return (0); in Diva_card_msg()
872 cs->hw.diva.status = 0; in Diva_card_msg()
875 cs->hw.diva.status |= DIVA_ASSIGN; in Diva_card_msg()
879 cs->hw.diva.status |= 0x0200; in Diva_card_msg()
881 cs->hw.diva.status |= 0x0100; in Diva_card_msg()
885 cs->hw.diva.status |= 0x2000; in Diva_card_msg()
887 cs->hw.diva.status |= 0x1000; in Diva_card_msg()
891 cs->hw.diva.status &= ~0x2000; in Diva_card_msg()
892 cs->hw.diva.status &= ~0x0200; in Diva_card_msg()
894 cs->hw.diva.status &= ~0x1000; in Diva_card_msg()
895 cs->hw.diva.status &= ~0x0100; in Diva_card_msg()
899 if ((cs->subtyp != DIVA_IPAC_ISA) && in Diva_card_msg()
900 (cs->subtyp != DIVA_IPAC_PCI) && in Diva_card_msg()
901 (cs->subtyp != DIVA_IPACX_PCI)) { in Diva_card_msg()
902 spin_lock_irqsave(&cs->lock, flags); in Diva_card_msg()
903 diva_led_handler(&cs->hw.diva.tl); in Diva_card_msg()
904 spin_unlock_irqrestore(&cs->lock, flags); in Diva_card_msg()
906 return (0); in Diva_card_msg()
909 static int setup_diva_common(struct IsdnCardState *cs) in setup_diva_common() argument
914 if ((cs->subtyp == DIVA_ISA) || (cs->subtyp == DIVA_IPAC_ISA)) in setup_diva_common()
921 (cs->subtyp == DIVA_PCI) ? "PCI" : in setup_diva_common()
922 (cs->subtyp == DIVA_ISA) ? "ISA" : in setup_diva_common()
923 (cs->subtyp == DIVA_IPAC_ISA) ? "IPAC ISA" : in setup_diva_common()
924 (cs->subtyp == DIVA_IPAC_PCI) ? "IPAC PCI" : "IPACX PCI", in setup_diva_common()
925 cs->hw.diva.cfg_reg, cs->irq); in setup_diva_common()
926 if ((cs->subtyp == DIVA_IPAC_PCI) || in setup_diva_common()
927 (cs->subtyp == DIVA_IPACX_PCI) || in setup_diva_common()
928 (cs->subtyp == DIVA_PCI)) in setup_diva_common()
930 (cs->subtyp == DIVA_PCI) ? "PCI" : in setup_diva_common()
931 (cs->subtyp == DIVA_IPAC_PCI) ? "IPAC PCI" : "IPACX PCI", in setup_diva_common()
932 cs->hw.diva.pci_cfg); in setup_diva_common()
933 if ((cs->subtyp != DIVA_IPAC_PCI) && in setup_diva_common()
934 (cs->subtyp != DIVA_IPACX_PCI)) { in setup_diva_common()
935 if (!request_region(cs->hw.diva.cfg_reg, bytecnt, "diva isdn")) { in setup_diva_common()
937 "HiSax: %s config port %lx-%lx already in use\n", in setup_diva_common()
939 cs->hw.diva.cfg_reg, in setup_diva_common()
940 cs->hw.diva.cfg_reg + bytecnt); in setup_diva_common()
941 iounmap_diva(cs); in setup_diva_common()
942 return (0); in setup_diva_common()
945 cs->BC_Read_Reg = &ReadHSCX; in setup_diva_common()
946 cs->BC_Write_Reg = &WriteHSCX; in setup_diva_common()
947 cs->BC_Send_Data = &hscx_fill_fifo; in setup_diva_common()
948 cs->cardmsg = &Diva_card_msg; in setup_diva_common()
949 setup_isac(cs); in setup_diva_common()
950 if (cs->subtyp == DIVA_IPAC_ISA) { in setup_diva_common()
951 cs->readisac = &ReadISAC_IPAC; in setup_diva_common()
952 cs->writeisac = &WriteISAC_IPAC; in setup_diva_common()
953 cs->readisacfifo = &ReadISACfifo_IPAC; in setup_diva_common()
954 cs->writeisacfifo = &WriteISACfifo_IPAC; in setup_diva_common()
955 cs->irq_func = &diva_irq_ipac_isa; in setup_diva_common()
956 val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ID); in setup_diva_common()
958 } else if (cs->subtyp == DIVA_IPAC_PCI) { in setup_diva_common()
959 cs->readisac = &MemReadISAC_IPAC; in setup_diva_common()
960 cs->writeisac = &MemWriteISAC_IPAC; in setup_diva_common()
961 cs->readisacfifo = &MemReadISACfifo_IPAC; in setup_diva_common()
962 cs->writeisacfifo = &MemWriteISACfifo_IPAC; in setup_diva_common()
963 cs->BC_Read_Reg = &MemReadHSCX; in setup_diva_common()
964 cs->BC_Write_Reg = &MemWriteHSCX; in setup_diva_common()
965 cs->BC_Send_Data = &Memhscx_fill_fifo; in setup_diva_common()
966 cs->irq_func = &diva_irq_ipac_pci; in setup_diva_common()
967 val = memreadreg(cs->hw.diva.cfg_reg, IPAC_ID); in setup_diva_common()
969 } else if (cs->subtyp == DIVA_IPACX_PCI) { in setup_diva_common()
970 cs->readisac = &MemReadISAC_IPACX; in setup_diva_common()
971 cs->writeisac = &MemWriteISAC_IPACX; in setup_diva_common()
972 cs->readisacfifo = &MemReadISACfifo_IPACX; in setup_diva_common()
973 cs->writeisacfifo = &MemWriteISACfifo_IPACX; in setup_diva_common()
974 cs->BC_Read_Reg = &MemReadHSCX_IPACX; in setup_diva_common()
975 cs->BC_Write_Reg = &MemWriteHSCX_IPACX; in setup_diva_common()
976 cs->BC_Send_Data = NULL; // function located in ipacx module in setup_diva_common()
977 cs->irq_func = &diva_irq_ipacx_pci; in setup_diva_common()
979 MemReadISAC_IPACX(cs, IPACX_ID) & 0x3F); in setup_diva_common()
981 timer_setup(&cs->hw.diva.tl, diva_led_handler, 0); in setup_diva_common()
982 cs->readisac = &ReadISAC; in setup_diva_common()
983 cs->writeisac = &WriteISAC; in setup_diva_common()
984 cs->readisacfifo = &ReadISACfifo; in setup_diva_common()
985 cs->writeisacfifo = &WriteISACfifo; in setup_diva_common()
986 cs->irq_func = &diva_interrupt; in setup_diva_common()
987 ISACVersion(cs, "Diva:"); in setup_diva_common()
988 if (HscxVersion(cs, "Diva:")) { in setup_diva_common()
991 release_io_diva(cs); in setup_diva_common()
992 return (0); in setup_diva_common()
1002 struct IsdnCardState *cs = card->cs; in setup_diva_isa() local
1005 if (!card->para[1]) in setup_diva_isa()
1006 return (-1); /* card not found; continue search */ in setup_diva_isa()
1008 cs->hw.diva.ctrl_reg = 0; in setup_diva_isa()
1009 cs->hw.diva.cfg_reg = card->para[1]; in setup_diva_isa()
1010 val = readreg(cs->hw.diva.cfg_reg + DIVA_IPAC_ADR, in setup_diva_isa()
1011 cs->hw.diva.cfg_reg + DIVA_IPAC_DATA, IPAC_ID); in setup_diva_isa()
1014 cs->subtyp = DIVA_IPAC_ISA; in setup_diva_isa()
1015 cs->hw.diva.ctrl = 0; in setup_diva_isa()
1016 cs->hw.diva.isac = card->para[1] + DIVA_IPAC_DATA; in setup_diva_isa()
1017 cs->hw.diva.hscx = card->para[1] + DIVA_IPAC_DATA; in setup_diva_isa()
1018 cs->hw.diva.isac_adr = card->para[1] + DIVA_IPAC_ADR; in setup_diva_isa()
1019 cs->hw.diva.hscx_adr = card->para[1] + DIVA_IPAC_ADR; in setup_diva_isa()
1020 test_and_set_bit(HW_IPAC, &cs->HW_Flags); in setup_diva_isa()
1022 cs->subtyp = DIVA_ISA; in setup_diva_isa()
1023 cs->hw.diva.ctrl = card->para[1] + DIVA_ISA_CTRL; in setup_diva_isa()
1024 cs->hw.diva.isac = card->para[1] + DIVA_ISA_ISAC_DATA; in setup_diva_isa()
1025 cs->hw.diva.hscx = card->para[1] + DIVA_HSCX_DATA; in setup_diva_isa()
1026 cs->hw.diva.isac_adr = card->para[1] + DIVA_ISA_ISAC_ADR; in setup_diva_isa()
1027 cs->hw.diva.hscx_adr = card->para[1] + DIVA_HSCX_ADR; in setup_diva_isa()
1029 cs->irq = card->para[0]; in setup_diva_isa()
1038 return (-1); /* card not found; continue search */ in setup_diva_isa()
1045 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x51),
1046 ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x51),
1048 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x51),
1049 ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0x51),
1051 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x71),
1052 ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x71),
1054 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x71),
1055 ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0x71),
1057 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0xA1),
1058 ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0xA1),
1060 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0xA1),
1061 ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0xA1),
1063 { 0, }
1066 static struct isapnp_device_id *ipid = &diva_ids[0];
1071 struct IsdnCardState *cs = card->cs; in setup_diva_isapnp() local
1075 return (-1); /* card not found; continue search */ in setup_diva_isapnp()
1077 while (ipid->card_vendor) { in setup_diva_isapnp()
1078 if ((pnp_c = pnp_find_card(ipid->card_vendor, in setup_diva_isapnp()
1079 ipid->card_device, pnp_c))) { in setup_diva_isapnp()
1082 ipid->vendor, ipid->function, pnp_d))) { in setup_diva_isapnp()
1086 (char *)ipid->driver_data); in setup_diva_isapnp()
1089 if (err < 0) { in setup_diva_isapnp()
1092 return (0); in setup_diva_isapnp()
1094 card->para[1] = pnp_port_start(pnp_d, 0); in setup_diva_isapnp()
1095 card->para[0] = pnp_irq(pnp_d, 0); in setup_diva_isapnp()
1096 if (card->para[0] == -1 || !card->para[1]) { in setup_diva_isapnp()
1098 card->para[0], card->para[1]); in setup_diva_isapnp()
1100 return (0); in setup_diva_isapnp()
1102 cs->hw.diva.cfg_reg = card->para[1]; in setup_diva_isapnp()
1103 cs->irq = card->para[0]; in setup_diva_isapnp()
1104 if (ipid->function == ISAPNP_FUNCTION(0xA1)) { in setup_diva_isapnp()
1105 cs->subtyp = DIVA_IPAC_ISA; in setup_diva_isapnp()
1106 cs->hw.diva.ctrl = 0; in setup_diva_isapnp()
1107 cs->hw.diva.isac = in setup_diva_isapnp()
1108 card->para[1] + DIVA_IPAC_DATA; in setup_diva_isapnp()
1109 cs->hw.diva.hscx = in setup_diva_isapnp()
1110 card->para[1] + DIVA_IPAC_DATA; in setup_diva_isapnp()
1111 cs->hw.diva.isac_adr = in setup_diva_isapnp()
1112 card->para[1] + DIVA_IPAC_ADR; in setup_diva_isapnp()
1113 cs->hw.diva.hscx_adr = in setup_diva_isapnp()
1114 card->para[1] + DIVA_IPAC_ADR; in setup_diva_isapnp()
1115 test_and_set_bit(HW_IPAC, &cs->HW_Flags); in setup_diva_isapnp()
1117 cs->subtyp = DIVA_ISA; in setup_diva_isapnp()
1118 cs->hw.diva.ctrl = in setup_diva_isapnp()
1119 card->para[1] + DIVA_ISA_CTRL; in setup_diva_isapnp()
1120 cs->hw.diva.isac = in setup_diva_isapnp()
1121 card->para[1] + DIVA_ISA_ISAC_DATA; in setup_diva_isapnp()
1122 cs->hw.diva.hscx = in setup_diva_isapnp()
1123 card->para[1] + DIVA_HSCX_DATA; in setup_diva_isapnp()
1124 cs->hw.diva.isac_adr = in setup_diva_isapnp()
1125 card->para[1] + DIVA_ISA_ISAC_ADR; in setup_diva_isapnp()
1126 cs->hw.diva.hscx_adr = in setup_diva_isapnp()
1127 card->para[1] + DIVA_HSCX_ADR; in setup_diva_isapnp()
1132 return (0); in setup_diva_isapnp()
1139 return (-1); /* card not found; continue search */ in setup_diva_isapnp()
1146 return (-1); /* card not found; continue search */ in setup_diva_isapnp()
1159 struct IsdnCardState *cs = card->cs; in setup_diva_pci() local
1161 cs->subtyp = 0; in setup_diva_pci()
1165 return (0); in setup_diva_pci()
1166 cs->subtyp = DIVA_PCI; in setup_diva_pci()
1167 cs->irq = dev_diva->irq; in setup_diva_pci()
1168 cs->hw.diva.cfg_reg = pci_resource_start(dev_diva, 2); in setup_diva_pci()
1172 return (0); in setup_diva_pci()
1173 cs->subtyp = DIVA_PCI; in setup_diva_pci()
1174 cs->irq = dev_diva_u->irq; in setup_diva_pci()
1175 cs->hw.diva.cfg_reg = pci_resource_start(dev_diva_u, 2); in setup_diva_pci()
1179 return (0); in setup_diva_pci()
1180 cs->subtyp = DIVA_IPAC_PCI; in setup_diva_pci()
1181 cs->irq = dev_diva201->irq; in setup_diva_pci()
1182 cs->hw.diva.pci_cfg = in setup_diva_pci()
1183 (ulong) ioremap(pci_resource_start(dev_diva201, 0), 4096); in setup_diva_pci()
1184 cs->hw.diva.cfg_reg = in setup_diva_pci()
1189 return (0); in setup_diva_pci()
1190 cs->subtyp = DIVA_IPACX_PCI; in setup_diva_pci()
1191 cs->irq = dev_diva202->irq; in setup_diva_pci()
1192 cs->hw.diva.pci_cfg = in setup_diva_pci()
1193 (ulong) ioremap(pci_resource_start(dev_diva202, 0), 4096); in setup_diva_pci()
1194 cs->hw.diva.cfg_reg = in setup_diva_pci()
1197 return (-1); /* card not found; continue search */ in setup_diva_pci()
1200 if (!cs->irq) { in setup_diva_pci()
1202 iounmap_diva(cs); in setup_diva_pci()
1203 return (0); in setup_diva_pci()
1206 if (!cs->hw.diva.cfg_reg) { in setup_diva_pci()
1207 printk(KERN_WARNING "Diva: No IO-Adr for PCI card found\n"); in setup_diva_pci()
1208 iounmap_diva(cs); in setup_diva_pci()
1209 return (0); in setup_diva_pci()
1211 cs->irq_flags |= IRQF_SHARED; in setup_diva_pci()
1213 if ((cs->subtyp == DIVA_IPAC_PCI) || in setup_diva_pci()
1214 (cs->subtyp == DIVA_IPACX_PCI)) { in setup_diva_pci()
1215 cs->hw.diva.ctrl = 0; in setup_diva_pci()
1216 cs->hw.diva.isac = 0; in setup_diva_pci()
1217 cs->hw.diva.hscx = 0; in setup_diva_pci()
1218 cs->hw.diva.isac_adr = 0; in setup_diva_pci()
1219 cs->hw.diva.hscx_adr = 0; in setup_diva_pci()
1220 test_and_set_bit(HW_IPAC, &cs->HW_Flags); in setup_diva_pci()
1222 cs->hw.diva.ctrl = cs->hw.diva.cfg_reg + DIVA_PCI_CTRL; in setup_diva_pci()
1223 cs->hw.diva.isac = cs->hw.diva.cfg_reg + DIVA_PCI_ISAC_DATA; in setup_diva_pci()
1224 cs->hw.diva.hscx = cs->hw.diva.cfg_reg + DIVA_HSCX_DATA; in setup_diva_pci()
1225 cs->hw.diva.isac_adr = cs->hw.diva.cfg_reg + DIVA_PCI_ISAC_ADR; in setup_diva_pci()
1226 cs->hw.diva.hscx_adr = cs->hw.diva.cfg_reg + DIVA_HSCX_ADR; in setup_diva_pci()
1236 return (-1); /* card not found; continue search */ in setup_diva_pci()
1243 int rc, have_card = 0; in setup_diva()
1244 struct IsdnCardState *cs = card->cs; in setup_diva() local
1249 if (cs->typ != ISDN_CTYPE_DIEHLDIVA) in setup_diva()
1250 return (0); in setup_diva()
1251 cs->hw.diva.status = 0; in setup_diva()
1256 if (rc > 0) { in setup_diva()
1264 if (rc > 0) { in setup_diva()
1272 if (rc > 0) in setup_diva()
1278 return (0); in setup_diva()
1281 return setup_diva_common(card->cs); in setup_diva()