Lines Matching full:cs
104 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
108 switch (cs->subtyp) { in ReadISAC()
113 return (readreg(cs->hw.gazel.isac, off2)); in ReadISAC()
116 return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2)); in ReadISAC()
122 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
126 switch (cs->subtyp) { in WriteISAC()
131 writereg(cs->hw.gazel.isac, off2, value); in WriteISAC()
135 writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value); in WriteISAC()
141 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size) in ReadISACfifo() argument
143 switch (cs->subtyp) { in ReadISACfifo()
146 read_fifo(cs->hw.gazel.isacfifo, data, size); in ReadISACfifo()
150 read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size); in ReadISACfifo()
156 WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size) in WriteISACfifo() argument
158 switch (cs->subtyp) { in WriteISACfifo()
161 write_fifo(cs->hw.gazel.isacfifo, data, size); in WriteISACfifo()
165 write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size); in WriteISACfifo()
171 ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size) in ReadHSCXfifo() argument
173 switch (cs->subtyp) { in ReadHSCXfifo()
176 read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size); in ReadHSCXfifo()
180 read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); in ReadHSCXfifo()
186 WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size) in WriteHSCXfifo() argument
188 switch (cs->subtyp) { in WriteHSCXfifo()
191 write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size); in WriteHSCXfifo()
195 write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); in WriteHSCXfifo()
201 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument
205 switch (cs->subtyp) { in ReadHSCX()
210 return (readreg(cs->hw.gazel.hscx[hscx], off2)); in ReadHSCX()
213 return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2)); in ReadHSCX()
219 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) in WriteHSCX() argument
223 switch (cs->subtyp) { in WriteHSCX()
228 writereg(cs->hw.gazel.hscx[hscx], off2, value); in WriteHSCX()
232 writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value); in WriteHSCX()
241 #define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg) argument
242 #define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data) argument
243 #define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt) argument
244 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt) argument
252 struct IsdnCardState *cs = dev_id; in gazel_interrupt() local
257 spin_lock_irqsave(&cs->lock, flags); in gazel_interrupt()
259 valhscx = ReadHSCX(cs, 1, HSCX_ISTA); in gazel_interrupt()
261 hscx_int_main(cs, valhscx); in gazel_interrupt()
262 valisac = ReadISAC(cs, ISAC_ISTA); in gazel_interrupt()
264 isac_interrupt(cs, valisac); in gazel_interrupt()
268 WriteHSCX(cs, 0, HSCX_MASK, 0xFF); in gazel_interrupt()
269 WriteHSCX(cs, 1, HSCX_MASK, 0xFF); in gazel_interrupt()
270 WriteISAC(cs, ISAC_MASK, 0xFF); in gazel_interrupt()
271 WriteISAC(cs, ISAC_MASK, 0x0); in gazel_interrupt()
272 WriteHSCX(cs, 0, HSCX_MASK, 0x0); in gazel_interrupt()
273 WriteHSCX(cs, 1, HSCX_MASK, 0x0); in gazel_interrupt()
274 spin_unlock_irqrestore(&cs->lock, flags); in gazel_interrupt()
282 struct IsdnCardState *cs = dev_id; in gazel_interrupt_ipac() local
287 spin_lock_irqsave(&cs->lock, flags); in gazel_interrupt_ipac()
288 ista = ReadISAC(cs, IPAC_ISTA - 0x80); in gazel_interrupt_ipac()
291 val = ReadHSCX(cs, 1, HSCX_ISTA); in gazel_interrupt_ipac()
299 hscx_int_main(cs, val); in gazel_interrupt_ipac()
303 val = 0xfe & ReadISAC(cs, ISAC_ISTA); in gazel_interrupt_ipac()
305 isac_interrupt(cs, val); in gazel_interrupt_ipac()
310 isac_interrupt(cs, val); in gazel_interrupt_ipac()
312 ista = ReadISAC(cs, IPAC_ISTA - 0x80); in gazel_interrupt_ipac()
317 WriteISAC(cs, IPAC_MASK - 0x80, 0xFF); in gazel_interrupt_ipac()
318 WriteISAC(cs, IPAC_MASK - 0x80, 0xC0); in gazel_interrupt_ipac()
319 spin_unlock_irqrestore(&cs->lock, flags); in gazel_interrupt_ipac()
324 release_io_gazel(struct IsdnCardState *cs) in release_io_gazel() argument
328 switch (cs->subtyp) { in release_io_gazel()
331 release_region(i + cs->hw.gazel.hscx[0], 16); in release_io_gazel()
332 release_region(0xC000 + cs->hw.gazel.hscx[0], 1); in release_io_gazel()
336 release_region(cs->hw.gazel.hscx[0], 0x100); in release_io_gazel()
337 release_region(cs->hw.gazel.cfg_reg, 0x80); in release_io_gazel()
341 release_region(cs->hw.gazel.ipac, 0x8); in release_io_gazel()
342 release_region(cs->hw.gazel.cfg_reg, 0x80); in release_io_gazel()
346 release_region(cs->hw.gazel.ipac, 8); in release_io_gazel()
352 reset_gazel(struct IsdnCardState *cs) in reset_gazel() argument
354 unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg; in reset_gazel()
356 switch (cs->subtyp) { in reset_gazel()
378 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20); in reset_gazel()
382 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00); in reset_gazel()
383 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff); in reset_gazel()
384 WriteISAC(cs, IPAC_AOE - 0x80, 0x0); in reset_gazel()
385 WriteISAC(cs, IPAC_MASK - 0x80, 0xff); in reset_gazel()
386 WriteISAC(cs, IPAC_CONF - 0x80, 0x1); in reset_gazel()
388 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0); in reset_gazel()
391 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20); in reset_gazel()
393 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00); in reset_gazel()
394 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff); in reset_gazel()
395 WriteISAC(cs, IPAC_AOE - 0x80, 0x0); in reset_gazel()
396 WriteISAC(cs, IPAC_MASK - 0x80, 0xff); in reset_gazel()
397 WriteISAC(cs, IPAC_CONF - 0x80, 0x1); in reset_gazel()
398 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0); in reset_gazel()
405 Gazel_card_msg(struct IsdnCardState *cs, int mt, void *arg) in Gazel_card_msg() argument
411 spin_lock_irqsave(&cs->lock, flags); in Gazel_card_msg()
412 reset_gazel(cs); in Gazel_card_msg()
413 spin_unlock_irqrestore(&cs->lock, flags); in Gazel_card_msg()
416 release_io_gazel(cs); in Gazel_card_msg()
419 spin_lock_irqsave(&cs->lock, flags); in Gazel_card_msg()
420 inithscxisac(cs, 1); in Gazel_card_msg()
421 if ((cs->subtyp == R647) || (cs->subtyp == R685)) { in Gazel_card_msg()
424 cs->bcs[i].hw.hscx.tsaxr0 = 0x1f; in Gazel_card_msg()
425 cs->bcs[i].hw.hscx.tsaxr1 = 0x23; in Gazel_card_msg()
428 spin_unlock_irqrestore(&cs->lock, flags); in Gazel_card_msg()
437 reserve_regions(struct IsdnCard *card, struct IsdnCardState *cs) in reserve_regions() argument
441 switch (cs->subtyp) { in reserve_regions()
443 base = cs->hw.gazel.hscx[0]; in reserve_regions()
459 if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel")) in reserve_regions()
461 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) { in reserve_regions()
462 release_region(cs->hw.gazel.hscx[0], 0x100); in reserve_regions()
468 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel")) in reserve_regions()
470 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) { in reserve_regions()
471 release_region(cs->hw.gazel.ipac, 8); in reserve_regions()
477 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel")) in reserve_regions()
490 static int setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs) in setup_gazelisa() argument
498 cs->subtyp = R742; in setup_gazelisa()
500 cs->subtyp = R647; in setup_gazelisa()
502 setup_isac(cs); in setup_gazelisa()
503 cs->hw.gazel.cfg_reg = card->para[1] + 0xC000; in setup_gazelisa()
504 cs->hw.gazel.ipac = card->para[1]; in setup_gazelisa()
505 cs->hw.gazel.isac = card->para[1] + 0x8000; in setup_gazelisa()
506 cs->hw.gazel.hscx[0] = card->para[1]; in setup_gazelisa()
507 cs->hw.gazel.hscx[1] = card->para[1] + 0x4000; in setup_gazelisa()
508 cs->irq = card->para[0]; in setup_gazelisa()
509 cs->hw.gazel.isacfifo = cs->hw.gazel.isac; in setup_gazelisa()
510 cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0]; in setup_gazelisa()
511 cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1]; in setup_gazelisa()
513 switch (cs->subtyp) { in setup_gazelisa()
516 cs->dc.isac.adf2 = 0x87; in setup_gazelisa()
519 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg); in setup_gazelisa()
522 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]); in setup_gazelisa()
527 test_and_set_bit(HW_IPAC, &cs->HW_Flags); in setup_gazelisa()
530 cs->irq, cs->hw.gazel.ipac); in setup_gazelisa()
540 static int setup_gazelpci(struct IsdnCardState *cs) in setup_gazelpci() argument
584 cs->hw.gazel.pciaddr[0] = pci_ioaddr0; in setup_gazelpci()
585 cs->hw.gazel.pciaddr[1] = pci_ioaddr1; in setup_gazelpci()
586 setup_isac(cs); in setup_gazelpci()
588 cs->hw.gazel.cfg_reg = pci_ioaddr0 & 0xfffe; in setup_gazelpci()
589 cs->hw.gazel.ipac = pci_ioaddr1; in setup_gazelpci()
590 cs->hw.gazel.isac = pci_ioaddr1 + 0x80; in setup_gazelpci()
591 cs->hw.gazel.hscx[0] = pci_ioaddr1; in setup_gazelpci()
592 cs->hw.gazel.hscx[1] = pci_ioaddr1 + 0x40; in setup_gazelpci()
593 cs->hw.gazel.isacfifo = cs->hw.gazel.isac; in setup_gazelpci()
594 cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0]; in setup_gazelpci()
595 cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1]; in setup_gazelpci()
596 cs->irq = pci_irq; in setup_gazelpci()
597 cs->irq_flags |= IRQF_SHARED; in setup_gazelpci()
602 cs->subtyp = R685; in setup_gazelpci()
603 cs->dc.isac.adf2 = 0x87; in setup_gazelpci()
606 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg); in setup_gazelpci()
609 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]); in setup_gazelpci()
615 cs->subtyp = R753; in setup_gazelpci()
616 test_and_set_bit(HW_IPAC, &cs->HW_Flags); in setup_gazelpci()
619 cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg); in setup_gazelpci()
629 struct IsdnCardState *cs = card->cs; in setup_gazel() local
636 if (cs->typ != ISDN_CTYPE_GAZEL) in setup_gazel()
640 if (setup_gazelisa(card, cs)) in setup_gazel()
645 if (setup_gazelpci(cs)) in setup_gazel()
653 if (reserve_regions(card, cs)) { in setup_gazel()
656 if (reset_gazel(cs)) { in setup_gazel()
658 release_io_gazel(cs); in setup_gazel()
661 cs->readisac = &ReadISAC; in setup_gazel()
662 cs->writeisac = &WriteISAC; in setup_gazel()
663 cs->readisacfifo = &ReadISACfifo; in setup_gazel()
664 cs->writeisacfifo = &WriteISACfifo; in setup_gazel()
665 cs->BC_Read_Reg = &ReadHSCX; in setup_gazel()
666 cs->BC_Write_Reg = &WriteHSCX; in setup_gazel()
667 cs->BC_Send_Data = &hscx_fill_fifo; in setup_gazel()
668 cs->cardmsg = &Gazel_card_msg; in setup_gazel()
670 switch (cs->subtyp) { in setup_gazel()
673 cs->irq_func = &gazel_interrupt; in setup_gazel()
674 ISACVersion(cs, "Gazel:"); in setup_gazel()
675 if (HscxVersion(cs, "Gazel:")) { in setup_gazel()
678 release_io_gazel(cs); in setup_gazel()
684 cs->irq_func = &gazel_interrupt_ipac; in setup_gazel()
685 val = ReadISAC(cs, IPAC_ID - 0x80); in setup_gazel()