1 // SPDX-License-Identifier: GPL-2.0-only
3  * adv7604 - Analog Devices ADV7604 video decoder driver
11  * REF_01 - Analog devices, ADV7604, Register Settings Recommendations,
13  * REF_02 - Analog devices, Register map documentation, Documentation of
15  * REF_03 - Analog devices, ADV7604, Hardware Manual, Rev. F, August 2010
26 #include <linux/v4l2-dv-timings.h>
33 #include <media/v4l2-ctrls.h>
34 #include <media/v4l2-device.h>
35 #include <media/v4l2-event.h>
36 #include <media/v4l2-dv-timings.h>
37 #include <media/v4l2-fwnode.h>
41 MODULE_PARM_DESC(debug, "debug level (0-2)");
120 	void (*set_termination)(struct v4l2_subdev *sd, bool enable);
121 	void (*setup_irqs)(struct v4l2_subdev *sd);
122 	unsigned int (*read_hdmi_pixelclock)(struct v4l2_subdev *sd);
123 	unsigned int (*read_cable_det)(struct v4l2_subdev *sd);
161 	struct v4l2_subdev sd;  member
205 	return state->info->has_afe;  in adv76xx_has_afe()
312 /* ----------------------------------------------------------------------- */
314 static inline struct adv76xx_state *to_state(struct v4l2_subdev *sd)  in to_state()  argument
316 	return container_of(sd, struct adv76xx_state, sd);  in to_state()
329 /* ----------------------------------------------------------------------- */
334 	struct i2c_client *client = state->i2c_clients[client_page];  in adv76xx_read_check()
338 	err = regmap_read(state->regmap[client_page], reg, &val);  in adv76xx_read_check()
342 				client->addr, reg);  in adv76xx_read_check()
358 	struct regmap *regmap = state->regmap[client_page];  in adv76xx_write_block()
366 /* ----------------------------------------------------------------------- */
368 static inline int io_read(struct v4l2_subdev *sd, u8 reg)  in io_read()  argument
370 	struct adv76xx_state *state = to_state(sd);  in io_read()
375 static inline int io_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in io_write()  argument
377 	struct adv76xx_state *state = to_state(sd);  in io_write()
379 	return regmap_write(state->regmap[ADV76XX_PAGE_IO], reg, val);  in io_write()
382 static inline int io_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask,  in io_write_clr_set()  argument
385 	return io_write(sd, reg, (io_read(sd, reg) & ~mask) | val);  in io_write_clr_set()
388 static inline int avlink_read(struct v4l2_subdev *sd, u8 reg)  in avlink_read()  argument
390 	struct adv76xx_state *state = to_state(sd);  in avlink_read()
395 static inline int avlink_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in avlink_write()  argument
397 	struct adv76xx_state *state = to_state(sd);  in avlink_write()
399 	return regmap_write(state->regmap[ADV7604_PAGE_AVLINK], reg, val);  in avlink_write()
402 static inline int cec_read(struct v4l2_subdev *sd, u8 reg)  in cec_read()  argument
404 	struct adv76xx_state *state = to_state(sd);  in cec_read()
409 static inline int cec_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in cec_write()  argument
411 	struct adv76xx_state *state = to_state(sd);  in cec_write()
413 	return regmap_write(state->regmap[ADV76XX_PAGE_CEC], reg, val);  in cec_write()
416 static inline int cec_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask,  in cec_write_clr_set()  argument
419 	return cec_write(sd, reg, (cec_read(sd, reg) & ~mask) | val);  in cec_write_clr_set()
422 static inline int infoframe_read(struct v4l2_subdev *sd, u8 reg)  in infoframe_read()  argument
424 	struct adv76xx_state *state = to_state(sd);  in infoframe_read()
429 static inline int infoframe_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in infoframe_write()  argument
431 	struct adv76xx_state *state = to_state(sd);  in infoframe_write()
433 	return regmap_write(state->regmap[ADV76XX_PAGE_INFOFRAME], reg, val);  in infoframe_write()
436 static inline int afe_read(struct v4l2_subdev *sd, u8 reg)  in afe_read()  argument
438 	struct adv76xx_state *state = to_state(sd);  in afe_read()
443 static inline int afe_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in afe_write()  argument
445 	struct adv76xx_state *state = to_state(sd);  in afe_write()
447 	return regmap_write(state->regmap[ADV76XX_PAGE_AFE], reg, val);  in afe_write()
450 static inline int rep_read(struct v4l2_subdev *sd, u8 reg)  in rep_read()  argument
452 	struct adv76xx_state *state = to_state(sd);  in rep_read()
457 static inline int rep_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in rep_write()  argument
459 	struct adv76xx_state *state = to_state(sd);  in rep_write()
461 	return regmap_write(state->regmap[ADV76XX_PAGE_REP], reg, val);  in rep_write()
464 static inline int rep_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)  in rep_write_clr_set()  argument
466 	return rep_write(sd, reg, (rep_read(sd, reg) & ~mask) | val);  in rep_write_clr_set()
469 static inline int edid_read(struct v4l2_subdev *sd, u8 reg)  in edid_read()  argument
471 	struct adv76xx_state *state = to_state(sd);  in edid_read()
476 static inline int edid_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in edid_write()  argument
478 	struct adv76xx_state *state = to_state(sd);  in edid_write()
480 	return regmap_write(state->regmap[ADV76XX_PAGE_EDID], reg, val);  in edid_write()
483 static inline int edid_write_block(struct v4l2_subdev *sd,  in edid_write_block()  argument
486 	struct adv76xx_state *state = to_state(sd);  in edid_write_block()
491 	v4l2_dbg(2, debug, sd, "%s: write EDID block (%d byte)\n",  in edid_write_block()
495 		len = (total_len - i) > I2C_SMBUS_BLOCK_MAX ?  in edid_write_block()
497 				(total_len - i);  in edid_write_block()
511 	for (i = 0; i < state->info->num_dv_ports; ++i)  in adv76xx_set_hpd()
512 		gpiod_set_value_cansleep(state->hpd_gpio[i], hpd & BIT(i));  in adv76xx_set_hpd()
514 	v4l2_subdev_notify(&state->sd, ADV76XX_HOTPLUG, &hpd);  in adv76xx_set_hpd()
522 	struct v4l2_subdev *sd = &state->sd;  in adv76xx_delayed_work_enable_hotplug()  local
524 	v4l2_dbg(2, debug, sd, "%s: enable hotplug\n", __func__);  in adv76xx_delayed_work_enable_hotplug()
526 	adv76xx_set_hpd(state, state->edid.present);  in adv76xx_delayed_work_enable_hotplug()
529 static inline int hdmi_read(struct v4l2_subdev *sd, u8 reg)  in hdmi_read()  argument
531 	struct adv76xx_state *state = to_state(sd);  in hdmi_read()
536 static u16 hdmi_read16(struct v4l2_subdev *sd, u8 reg, u16 mask)  in hdmi_read16()  argument
538 	return ((hdmi_read(sd, reg) << 8) | hdmi_read(sd, reg + 1)) & mask;  in hdmi_read16()
541 static inline int hdmi_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in hdmi_write()  argument
543 	struct adv76xx_state *state = to_state(sd);  in hdmi_write()
545 	return regmap_write(state->regmap[ADV76XX_PAGE_HDMI], reg, val);  in hdmi_write()
548 static inline int hdmi_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)  in hdmi_write_clr_set()  argument
550 	return hdmi_write(sd, reg, (hdmi_read(sd, reg) & ~mask) | val);  in hdmi_write_clr_set()
553 static inline int test_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in test_write()  argument
555 	struct adv76xx_state *state = to_state(sd);  in test_write()
557 	return regmap_write(state->regmap[ADV76XX_PAGE_TEST], reg, val);  in test_write()
560 static inline int cp_read(struct v4l2_subdev *sd, u8 reg)  in cp_read()  argument
562 	struct adv76xx_state *state = to_state(sd);  in cp_read()
567 static u16 cp_read16(struct v4l2_subdev *sd, u8 reg, u16 mask)  in cp_read16()  argument
569 	return ((cp_read(sd, reg) << 8) | cp_read(sd, reg + 1)) & mask;  in cp_read16()
572 static inline int cp_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in cp_write()  argument
574 	struct adv76xx_state *state = to_state(sd);  in cp_write()
576 	return regmap_write(state->regmap[ADV76XX_PAGE_CP], reg, val);  in cp_write()
579 static inline int cp_write_clr_set(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)  in cp_write_clr_set()  argument
581 	return cp_write(sd, reg, (cp_read(sd, reg) & ~mask) | val);  in cp_write_clr_set()
584 static inline int vdp_read(struct v4l2_subdev *sd, u8 reg)  in vdp_read()  argument
586 	struct adv76xx_state *state = to_state(sd);  in vdp_read()
591 static inline int vdp_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in vdp_write()  argument
593 	struct adv76xx_state *state = to_state(sd);  in vdp_write()
595 	return regmap_write(state->regmap[ADV7604_PAGE_VDP], reg, val);  in vdp_write()
602 static int adv76xx_read_reg(struct v4l2_subdev *sd, unsigned int reg)  in adv76xx_read_reg()  argument
604 	struct adv76xx_state *state = to_state(sd);  in adv76xx_read_reg()
609 	if (page >= ADV76XX_PAGE_MAX || !(BIT(page) & state->info->page_mask))  in adv76xx_read_reg()
610 		return -EINVAL;  in adv76xx_read_reg()
613 	err = regmap_read(state->regmap[page], reg, &val);  in adv76xx_read_reg()
619 static int adv76xx_write_reg(struct v4l2_subdev *sd, unsigned int reg, u8 val)  in adv76xx_write_reg()  argument
621 	struct adv76xx_state *state = to_state(sd);  in adv76xx_write_reg()
624 	if (page >= ADV76XX_PAGE_MAX || !(BIT(page) & state->info->page_mask))  in adv76xx_write_reg()
625 		return -EINVAL;  in adv76xx_write_reg()
629 	return regmap_write(state->regmap[page], reg, val);  in adv76xx_write_reg()
632 static void adv76xx_write_reg_seq(struct v4l2_subdev *sd,  in adv76xx_write_reg_seq()  argument
638 		adv76xx_write_reg(sd, reg_seq[i].reg, reg_seq[i].val);  in adv76xx_write_reg_seq()
641 /* -----------------------------------------------------------------------------
737 	for (i = 0; i < state->info->nformats; ++i) {  in adv76xx_format_info()
738 		if (state->info->formats[i].code == code)  in adv76xx_format_info()
739 			return &state->info->formats[i];  in adv76xx_format_info()
745 /* ----------------------------------------------------------------------- */
747 static inline bool is_analog_input(struct v4l2_subdev *sd)  in is_analog_input()  argument
749 	struct adv76xx_state *state = to_state(sd);  in is_analog_input()
751 	return state->selected_input == ADV7604_PAD_VGA_RGB ||  in is_analog_input()
752 	       state->selected_input == ADV7604_PAD_VGA_COMP;  in is_analog_input()
755 static inline bool is_digital_input(struct v4l2_subdev *sd)  in is_digital_input()  argument
757 	struct adv76xx_state *state = to_state(sd);  in is_digital_input()
759 	return state->selected_input == ADV76XX_PAD_HDMI_PORT_A ||  in is_digital_input()
760 	       state->selected_input == ADV7604_PAD_HDMI_PORT_B ||  in is_digital_input()
761 	       state->selected_input == ADV7604_PAD_HDMI_PORT_C ||  in is_digital_input()
762 	       state->selected_input == ADV7604_PAD_HDMI_PORT_D;  in is_digital_input()
789  * case, pad value -1 returns the capabilities for the currently selected input.
792 adv76xx_get_dv_timings_cap(struct v4l2_subdev *sd, int pad)  in adv76xx_get_dv_timings_cap()  argument
794 	if (pad == -1) {  in adv76xx_get_dv_timings_cap()
795 		struct adv76xx_state *state = to_state(sd);  in adv76xx_get_dv_timings_cap()
797 		pad = state->selected_input;  in adv76xx_get_dv_timings_cap()
815 /* ----------------------------------------------------------------------- */
818 static void adv76xx_inv_register(struct v4l2_subdev *sd)  in adv76xx_inv_register()  argument
820 	v4l2_info(sd, "0x000-0x0ff: IO Map\n");  in adv76xx_inv_register()
821 	v4l2_info(sd, "0x100-0x1ff: AVLink Map\n");  in adv76xx_inv_register()
822 	v4l2_info(sd, "0x200-0x2ff: CEC Map\n");  in adv76xx_inv_register()
823 	v4l2_info(sd, "0x300-0x3ff: InfoFrame Map\n");  in adv76xx_inv_register()
824 	v4l2_info(sd, "0x400-0x4ff: ESDP Map\n");  in adv76xx_inv_register()
825 	v4l2_info(sd, "0x500-0x5ff: DPP Map\n");  in adv76xx_inv_register()
826 	v4l2_info(sd, "0x600-0x6ff: AFE Map\n");  in adv76xx_inv_register()
827 	v4l2_info(sd, "0x700-0x7ff: Repeater Map\n");  in adv76xx_inv_register()
828 	v4l2_info(sd, "0x800-0x8ff: EDID Map\n");  in adv76xx_inv_register()
829 	v4l2_info(sd, "0x900-0x9ff: HDMI Map\n");  in adv76xx_inv_register()
830 	v4l2_info(sd, "0xa00-0xaff: Test Map\n");  in adv76xx_inv_register()
831 	v4l2_info(sd, "0xb00-0xbff: CP Map\n");  in adv76xx_inv_register()
832 	v4l2_info(sd, "0xc00-0xcff: VDP Map\n");  in adv76xx_inv_register()
835 static int adv76xx_g_register(struct v4l2_subdev *sd,  in adv76xx_g_register()  argument
840 	ret = adv76xx_read_reg(sd, reg->reg);  in adv76xx_g_register()
842 		v4l2_info(sd, "Register %03llx not supported\n", reg->reg);  in adv76xx_g_register()
843 		adv76xx_inv_register(sd);  in adv76xx_g_register()
847 	reg->size = 1;  in adv76xx_g_register()
848 	reg->val = ret;  in adv76xx_g_register()
853 static int adv76xx_s_register(struct v4l2_subdev *sd,  in adv76xx_s_register()  argument
858 	ret = adv76xx_write_reg(sd, reg->reg, reg->val);  in adv76xx_s_register()
860 		v4l2_info(sd, "Register %03llx not supported\n", reg->reg);  in adv76xx_s_register()
861 		adv76xx_inv_register(sd);  in adv76xx_s_register()
869 static unsigned int adv7604_read_cable_det(struct v4l2_subdev *sd)  in adv7604_read_cable_det()  argument
871 	u8 value = io_read(sd, 0x6f);  in adv7604_read_cable_det()
879 static unsigned int adv7611_read_cable_det(struct v4l2_subdev *sd)  in adv7611_read_cable_det()  argument
881 	u8 value = io_read(sd, 0x6f);  in adv7611_read_cable_det()
886 static unsigned int adv7612_read_cable_det(struct v4l2_subdev *sd)  in adv7612_read_cable_det()  argument
891 	u8 value = io_read(sd, 0x6f);  in adv7612_read_cable_det()
896 static int adv76xx_s_detect_tx_5v_ctrl(struct v4l2_subdev *sd)  in adv76xx_s_detect_tx_5v_ctrl()  argument
898 	struct adv76xx_state *state = to_state(sd);  in adv76xx_s_detect_tx_5v_ctrl()
899 	const struct adv76xx_chip_info *info = state->info;  in adv76xx_s_detect_tx_5v_ctrl()
900 	u16 cable_det = info->read_cable_det(sd);  in adv76xx_s_detect_tx_5v_ctrl()
902 	return v4l2_ctrl_s_ctrl(state->detect_tx_5v_ctrl, cable_det);  in adv76xx_s_detect_tx_5v_ctrl()
905 static int find_and_set_predefined_video_timings(struct v4l2_subdev *sd,  in find_and_set_predefined_video_timings()  argument
914 				is_digital_input(sd) ? 250000 : 1000000, false))  in find_and_set_predefined_video_timings()
916 		io_write(sd, 0x00, predef_vid_timings[i].vid_std); /* video std */  in find_and_set_predefined_video_timings()
917 		io_write(sd, 0x01, (predef_vid_timings[i].v_freq << 4) +  in find_and_set_predefined_video_timings()
922 	return -1;  in find_and_set_predefined_video_timings()
925 static int configure_predefined_video_timings(struct v4l2_subdev *sd,  in configure_predefined_video_timings()  argument
928 	struct adv76xx_state *state = to_state(sd);  in configure_predefined_video_timings()
931 	v4l2_dbg(1, debug, sd, "%s", __func__);  in configure_predefined_video_timings()
935 		io_write(sd, 0x16, 0x43);  in configure_predefined_video_timings()
936 		io_write(sd, 0x17, 0x5a);  in configure_predefined_video_timings()
939 	cp_write_clr_set(sd, 0x81, 0x10, 0x00);  in configure_predefined_video_timings()
940 	cp_write(sd, 0x8f, 0x00);  in configure_predefined_video_timings()
941 	cp_write(sd, 0x90, 0x00);  in configure_predefined_video_timings()
942 	cp_write(sd, 0xa2, 0x00);  in configure_predefined_video_timings()
943 	cp_write(sd, 0xa3, 0x00);  in configure_predefined_video_timings()
944 	cp_write(sd, 0xa4, 0x00);  in configure_predefined_video_timings()
945 	cp_write(sd, 0xa5, 0x00);  in configure_predefined_video_timings()
946 	cp_write(sd, 0xa6, 0x00);  in configure_predefined_video_timings()
947 	cp_write(sd, 0xa7, 0x00);  in configure_predefined_video_timings()
948 	cp_write(sd, 0xab, 0x00);  in configure_predefined_video_timings()
949 	cp_write(sd, 0xac, 0x00);  in configure_predefined_video_timings()
951 	if (is_analog_input(sd)) {  in configure_predefined_video_timings()
952 		err = find_and_set_predefined_video_timings(sd,  in configure_predefined_video_timings()
955 			err = find_and_set_predefined_video_timings(sd,  in configure_predefined_video_timings()
957 	} else if (is_digital_input(sd)) {  in configure_predefined_video_timings()
958 		err = find_and_set_predefined_video_timings(sd,  in configure_predefined_video_timings()
961 			err = find_and_set_predefined_video_timings(sd,  in configure_predefined_video_timings()
964 		v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n",  in configure_predefined_video_timings()
965 				__func__, state->selected_input);  in configure_predefined_video_timings()
966 		err = -1;  in configure_predefined_video_timings()
973 static void configure_custom_video_timings(struct v4l2_subdev *sd,  in configure_custom_video_timings()  argument
976 	struct adv76xx_state *state = to_state(sd);  in configure_custom_video_timings()
979 	u16 cp_start_sav = bt->hsync + bt->hbackporch - 4;  in configure_custom_video_timings()
980 	u16 cp_start_eav = width - bt->hfrontporch;  in configure_custom_video_timings()
981 	u16 cp_start_vbi = height - bt->vfrontporch;  in configure_custom_video_timings()
982 	u16 cp_end_vbi = bt->vsync + bt->vbackporch;  in configure_custom_video_timings()
983 	u16 ch1_fr_ll = (((u32)bt->pixelclock / 100) > 0) ?  in configure_custom_video_timings()
984 		((width * (ADV76XX_FSC / 100)) / ((u32)bt->pixelclock / 100)) : 0;  in configure_custom_video_timings()
990 	v4l2_dbg(2, debug, sd, "%s\n", __func__);  in configure_custom_video_timings()
992 	if (is_analog_input(sd)) {  in configure_custom_video_timings()
994 		io_write(sd, 0x00, 0x07); /* video std */  in configure_custom_video_timings()
995 		io_write(sd, 0x01, 0x02); /* prim mode */  in configure_custom_video_timings()
997 		cp_write_clr_set(sd, 0x81, 0x10, 0x10);  in configure_custom_video_timings()
999 		/* Should only be set in auto-graphics mode [REF_02, p. 91-92] */  in configure_custom_video_timings()
1001 		/* IO-map reg. 0x16 and 0x17 should be written in sequence */  in configure_custom_video_timings()
1002 		if (regmap_raw_write(state->regmap[ADV76XX_PAGE_IO],  in configure_custom_video_timings()
1004 			v4l2_err(sd, "writing to reg 0x16 and 0x17 failed\n");  in configure_custom_video_timings()
1006 		/* active video - horizontal timing */  in configure_custom_video_timings()
1007 		cp_write(sd, 0xa2, (cp_start_sav >> 4) & 0xff);  in configure_custom_video_timings()
1008 		cp_write(sd, 0xa3, ((cp_start_sav & 0x0f) << 4) |  in configure_custom_video_timings()
1010 		cp_write(sd, 0xa4, cp_start_eav & 0xff);  in configure_custom_video_timings()
1012 		/* active video - vertical timing */  in configure_custom_video_timings()
1013 		cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff);  in configure_custom_video_timings()
1014 		cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) |  in configure_custom_video_timings()
1016 		cp_write(sd, 0xa7, cp_end_vbi & 0xff);  in configure_custom_video_timings()
1017 	} else if (is_digital_input(sd)) {  in configure_custom_video_timings()
1020 		io_write(sd, 0x00, 0x02); /* video std */  in configure_custom_video_timings()
1021 		io_write(sd, 0x01, 0x06); /* prim mode */  in configure_custom_video_timings()
1023 		v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n",  in configure_custom_video_timings()
1024 				__func__, state->selected_input);  in configure_custom_video_timings()
1027 	cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7);  in configure_custom_video_timings()
1028 	cp_write(sd, 0x90, ch1_fr_ll & 0xff);  in configure_custom_video_timings()
1029 	cp_write(sd, 0xab, (height >> 4) & 0xff);  in configure_custom_video_timings()
1030 	cp_write(sd, 0xac, (height & 0x0f) << 4);  in configure_custom_video_timings()
1033 static void adv76xx_set_offset(struct v4l2_subdev *sd, bool auto_offset, u16 offset_a, u16 offset_b…  in adv76xx_set_offset()  argument
1035 	struct adv76xx_state *state = to_state(sd);  in adv76xx_set_offset()
1044 	v4l2_dbg(2, debug, sd, "%s: %s offset: a = 0x%x, b = 0x%x, c = 0x%x\n",  in adv76xx_set_offset()
1048 	offset_buf[0] = (cp_read(sd, 0x77) & 0xc0) | ((offset_a & 0x3f0) >> 4);  in adv76xx_set_offset()
1053 	/* Registers must be written in this order with no i2c access in between */  in adv76xx_set_offset()
1054 	if (regmap_raw_write(state->regmap[ADV76XX_PAGE_CP],  in adv76xx_set_offset()
1056 		v4l2_err(sd, "%s: i2c error writing to CP reg 0x77, 0x78, 0x79, 0x7a\n", __func__);  in adv76xx_set_offset()
1059 static void adv76xx_set_gain(struct v4l2_subdev *sd, bool auto_gain, u16 gain_a, u16 gain_b, u16 ga…  in adv76xx_set_gain()  argument
1061 	struct adv76xx_state *state = to_state(sd);  in adv76xx_set_gain()
1074 	v4l2_dbg(2, debug, sd, "%s: %s gain: a = 0x%x, b = 0x%x, c = 0x%x\n",  in adv76xx_set_gain()
1083 	/* Registers must be written in this order with no i2c access in between */  in adv76xx_set_gain()
1084 	if (regmap_raw_write(state->regmap[ADV76XX_PAGE_CP],  in adv76xx_set_gain()
1086 		v4l2_err(sd, "%s: i2c error writing to CP reg 0x73, 0x74, 0x75, 0x76\n", __func__);  in adv76xx_set_gain()
1089 static void set_rgb_quantization_range(struct v4l2_subdev *sd)  in set_rgb_quantization_range()  argument
1091 	struct adv76xx_state *state = to_state(sd);  in set_rgb_quantization_range()
1092 	bool rgb_output = io_read(sd, 0x02) & 0x02;  in set_rgb_quantization_range()
1093 	bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80;  in set_rgb_quantization_range()
1096 	if (hdmi_signal && (io_read(sd, 0x60) & 1))  in set_rgb_quantization_range()
1097 		y = infoframe_read(sd, 0x01) >> 5;  in set_rgb_quantization_range()
1099 	v4l2_dbg(2, debug, sd, "%s: RGB quantization range: %d, RGB out: %d, HDMI: %d\n",  in set_rgb_quantization_range()
1100 			__func__, state->rgb_quantization_range,  in set_rgb_quantization_range()
1103 	adv76xx_set_gain(sd, true, 0x0, 0x0, 0x0);  in set_rgb_quantization_range()
1104 	adv76xx_set_offset(sd, true, 0x0, 0x0, 0x0);  in set_rgb_quantization_range()
1105 	io_write_clr_set(sd, 0x02, 0x04, rgb_output ? 0 : 4);  in set_rgb_quantization_range()
1107 	switch (state->rgb_quantization_range) {  in set_rgb_quantization_range()
1109 		if (state->selected_input == ADV7604_PAD_VGA_RGB) {  in set_rgb_quantization_range()
1111 			 * Set RGB full range (0-255) */  in set_rgb_quantization_range()
1112 			io_write_clr_set(sd, 0x02, 0xf0, 0x10);  in set_rgb_quantization_range()
1116 		if (state->selected_input == ADV7604_PAD_VGA_COMP) {  in set_rgb_quantization_range()
1119 			io_write_clr_set(sd, 0x02, 0xf0, 0xf0);  in set_rgb_quantization_range()
1126 			io_write_clr_set(sd, 0x02, 0xf0, 0xf0);  in set_rgb_quantization_range()
1130 		/* Receiving DVI-D signal  in set_rgb_quantization_range()
1133 		if (state->timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) {  in set_rgb_quantization_range()
1134 			/* RGB limited range (16-235) */  in set_rgb_quantization_range()
1135 			io_write_clr_set(sd, 0x02, 0xf0, 0x00);  in set_rgb_quantization_range()
1137 			/* RGB full range (0-255) */  in set_rgb_quantization_range()
1138 			io_write_clr_set(sd, 0x02, 0xf0, 0x10);  in set_rgb_quantization_range()
1140 			if (is_digital_input(sd) && rgb_output) {  in set_rgb_quantization_range()
1141 				adv76xx_set_offset(sd, false, 0x40, 0x40, 0x40);  in set_rgb_quantization_range()
1143 				adv76xx_set_gain(sd, false, 0xe0, 0xe0, 0xe0);  in set_rgb_quantization_range()
1144 				adv76xx_set_offset(sd, false, 0x70, 0x70, 0x70);  in set_rgb_quantization_range()
1149 		if (state->selected_input == ADV7604_PAD_VGA_COMP) {  in set_rgb_quantization_range()
1150 			/* YCrCb limited range (16-235) */  in set_rgb_quantization_range()
1151 			io_write_clr_set(sd, 0x02, 0xf0, 0x20);  in set_rgb_quantization_range()
1158 		/* RGB limited range (16-235) */  in set_rgb_quantization_range()
1159 		io_write_clr_set(sd, 0x02, 0xf0, 0x00);  in set_rgb_quantization_range()
1163 		if (state->selected_input == ADV7604_PAD_VGA_COMP) {  in set_rgb_quantization_range()
1164 			/* YCrCb full range (0-255) */  in set_rgb_quantization_range()
1165 			io_write_clr_set(sd, 0x02, 0xf0, 0x60);  in set_rgb_quantization_range()
1172 		/* RGB full range (0-255) */  in set_rgb_quantization_range()
1173 		io_write_clr_set(sd, 0x02, 0xf0, 0x10);  in set_rgb_quantization_range()
1175 		if (is_analog_input(sd) || hdmi_signal)  in set_rgb_quantization_range()
1178 		/* Adjust gain/offset for DVI-D signals only */  in set_rgb_quantization_range()
1180 			adv76xx_set_offset(sd, false, 0x40, 0x40, 0x40);  in set_rgb_quantization_range()
1182 			adv76xx_set_gain(sd, false, 0xe0, 0xe0, 0xe0);  in set_rgb_quantization_range()
1183 			adv76xx_set_offset(sd, false, 0x70, 0x70, 0x70);  in set_rgb_quantization_range()
1191 	struct v4l2_subdev *sd =  in adv76xx_s_ctrl()  local
1192 		&container_of(ctrl->handler, struct adv76xx_state, hdl)->sd;  in adv76xx_s_ctrl()
1194 	struct adv76xx_state *state = to_state(sd);  in adv76xx_s_ctrl()
1196 	switch (ctrl->id) {  in adv76xx_s_ctrl()
1198 		cp_write(sd, 0x3c, ctrl->val);  in adv76xx_s_ctrl()
1201 		cp_write(sd, 0x3a, ctrl->val);  in adv76xx_s_ctrl()
1204 		cp_write(sd, 0x3b, ctrl->val);  in adv76xx_s_ctrl()
1207 		cp_write(sd, 0x3d, ctrl->val);  in adv76xx_s_ctrl()
1210 		state->rgb_quantization_range = ctrl->val;  in adv76xx_s_ctrl()
1211 		set_rgb_quantization_range(sd);  in adv76xx_s_ctrl()
1215 			return -EINVAL;  in adv76xx_s_ctrl()
1220 		afe_write(sd, 0xc8, ctrl->val);  in adv76xx_s_ctrl()
1225 		cp_write_clr_set(sd, 0xbf, 0x04, ctrl->val << 2);  in adv76xx_s_ctrl()
1228 		cp_write(sd, 0xc0, (ctrl->val & 0xff0000) >> 16);  in adv76xx_s_ctrl()
1229 		cp_write(sd, 0xc1, (ctrl->val & 0x00ff00) >> 8);  in adv76xx_s_ctrl()
1230 		cp_write(sd, 0xc2, (u8)(ctrl->val & 0x0000ff));  in adv76xx_s_ctrl()
1233 	return -EINVAL;  in adv76xx_s_ctrl()
1238 	struct v4l2_subdev *sd =  in adv76xx_g_volatile_ctrl()  local
1239 		&container_of(ctrl->handler, struct adv76xx_state, hdl)->sd;  in adv76xx_g_volatile_ctrl()
1241 	if (ctrl->id == V4L2_CID_DV_RX_IT_CONTENT_TYPE) {  in adv76xx_g_volatile_ctrl()
1242 		ctrl->val = V4L2_DV_IT_CONTENT_TYPE_NO_ITC;  in adv76xx_g_volatile_ctrl()
1243 		if ((io_read(sd, 0x60) & 1) && (infoframe_read(sd, 0x03) & 0x80))  in adv76xx_g_volatile_ctrl()
1244 			ctrl->val = (infoframe_read(sd, 0x05) >> 4) & 3;  in adv76xx_g_volatile_ctrl()
1247 	return -EINVAL;  in adv76xx_g_volatile_ctrl()
1250 /* ----------------------------------------------------------------------- */
1252 static inline bool no_power(struct v4l2_subdev *sd)  in no_power()  argument
1255 	return io_read(sd, 0x0c) & 0x24;  in no_power()
1258 static inline bool no_signal_tmds(struct v4l2_subdev *sd)  in no_signal_tmds()  argument
1260 	struct adv76xx_state *state = to_state(sd);  in no_signal_tmds()
1262 	return !(io_read(sd, 0x6a) & (0x10 >> state->selected_input));  in no_signal_tmds()
1265 static inline bool no_lock_tmds(struct v4l2_subdev *sd)  in no_lock_tmds()  argument
1267 	struct adv76xx_state *state = to_state(sd);  in no_lock_tmds()
1268 	const struct adv76xx_chip_info *info = state->info;  in no_lock_tmds()
1270 	return (io_read(sd, 0x6a) & info->tdms_lock_mask) != info->tdms_lock_mask;  in no_lock_tmds()
1273 static inline bool is_hdmi(struct v4l2_subdev *sd)  in is_hdmi()  argument
1275 	return hdmi_read(sd, 0x05) & 0x80;  in is_hdmi()
1278 static inline bool no_lock_sspd(struct v4l2_subdev *sd)  in no_lock_sspd()  argument
1280 	struct adv76xx_state *state = to_state(sd);  in no_lock_sspd()
1290 	return ((cp_read(sd, 0xb5) & 0xd0) != 0xd0);  in no_lock_sspd()
1293 static inline bool no_lock_stdi(struct v4l2_subdev *sd)  in no_lock_stdi()  argument
1296 	return !(cp_read(sd, 0xb1) & 0x80);  in no_lock_stdi()
1299 static inline bool no_signal(struct v4l2_subdev *sd)  in no_signal()  argument
1303 	ret = no_power(sd);  in no_signal()
1305 	ret |= no_lock_stdi(sd);  in no_signal()
1306 	ret |= no_lock_sspd(sd);  in no_signal()
1308 	if (is_digital_input(sd)) {  in no_signal()
1309 		ret |= no_lock_tmds(sd);  in no_signal()
1310 		ret |= no_signal_tmds(sd);  in no_signal()
1316 static inline bool no_lock_cp(struct v4l2_subdev *sd)  in no_lock_cp()  argument
1318 	struct adv76xx_state *state = to_state(sd);  in no_lock_cp()
1325 	return io_read(sd, 0x12) & 0x01;  in no_lock_cp()
1328 static inline bool in_free_run(struct v4l2_subdev *sd)  in in_free_run()  argument
1330 	return cp_read(sd, 0xff) & 0x10;  in in_free_run()
1333 static int adv76xx_g_input_status(struct v4l2_subdev *sd, u32 *status)  in adv76xx_g_input_status()  argument
1336 	*status |= no_power(sd) ? V4L2_IN_ST_NO_POWER : 0;  in adv76xx_g_input_status()
1337 	*status |= no_signal(sd) ? V4L2_IN_ST_NO_SIGNAL : 0;  in adv76xx_g_input_status()
1338 	if (!in_free_run(sd) && no_lock_cp(sd))  in adv76xx_g_input_status()
1339 		*status |= is_digital_input(sd) ?  in adv76xx_g_input_status()
1342 	v4l2_dbg(1, debug, sd, "%s: status = 0x%x\n", __func__, *status);  in adv76xx_g_input_status()
1347 /* ----------------------------------------------------------------------- */
1355 static int stdi2dv_timings(struct v4l2_subdev *sd,  in stdi2dv_timings()  argument
1359 	struct adv76xx_state *state = to_state(sd);  in stdi2dv_timings()
1360 	u32 hfreq = (ADV76XX_FSC * 8) / stdi->bl;  in stdi2dv_timings()
1368 					   adv76xx_get_dv_timings_cap(sd, -1),  in stdi2dv_timings()
1371 		if (vtotal(bt) != stdi->lcf + 1)  in stdi2dv_timings()
1373 		if (bt->vsync != stdi->lcvs)  in stdi2dv_timings()
1378 		if ((pix_clk < bt->pixelclock + 1000000) &&  in stdi2dv_timings()
1379 		    (pix_clk > bt->pixelclock - 1000000)) {  in stdi2dv_timings()
1385 	if (v4l2_detect_cvt(stdi->lcf + 1, hfreq, stdi->lcvs, 0,  in stdi2dv_timings()
1386 			(stdi->hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |  in stdi2dv_timings()
1387 			(stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),  in stdi2dv_timings()
1390 	if (v4l2_detect_gtf(stdi->lcf + 1, hfreq, stdi->lcvs,  in stdi2dv_timings()
1391 			(stdi->hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |  in stdi2dv_timings()
1392 			(stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),  in stdi2dv_timings()
1393 			false, state->aspect_ratio, timings))  in stdi2dv_timings()
1396 	v4l2_dbg(2, debug, sd,  in stdi2dv_timings()
1397 		"%s: No format candidate found for lcvs = %d, lcf=%d, bl = %d, %chsync, %cvsync\n",  in stdi2dv_timings()
1398 		__func__, stdi->lcvs, stdi->lcf, stdi->bl,  in stdi2dv_timings()
1399 		stdi->hs_pol, stdi->vs_pol);  in stdi2dv_timings()
1400 	return -1;  in stdi2dv_timings()
1404 static int read_stdi(struct v4l2_subdev *sd, struct stdi_readback *stdi)  in read_stdi()  argument
1406 	struct adv76xx_state *state = to_state(sd);  in read_stdi()
1407 	const struct adv76xx_chip_info *info = state->info;  in read_stdi()
1410 	if (no_lock_stdi(sd) || no_lock_sspd(sd)) {  in read_stdi()
1411 		v4l2_dbg(2, debug, sd, "%s: STDI and/or SSPD not locked\n", __func__);  in read_stdi()
1412 		return -1;  in read_stdi()
1416 	stdi->bl = cp_read16(sd, 0xb1, 0x3fff);  in read_stdi()
1417 	stdi->lcf = cp_read16(sd, info->lcf_reg, 0x7ff);  in read_stdi()
1418 	stdi->lcvs = cp_read(sd, 0xb3) >> 3;  in read_stdi()
1419 	stdi->interlaced = io_read(sd, 0x12) & 0x10;  in read_stdi()
1423 		polarity = cp_read(sd, 0xb5);  in read_stdi()
1425 			stdi->hs_pol = polarity & 0x10  in read_stdi()
1426 				     ? (polarity & 0x08 ? '+' : '-') : 'x';  in read_stdi()
1427 			stdi->vs_pol = polarity & 0x40  in read_stdi()
1428 				     ? (polarity & 0x20 ? '+' : '-') : 'x';  in read_stdi()
1430 			stdi->hs_pol = 'x';  in read_stdi()
1431 			stdi->vs_pol = 'x';  in read_stdi()
1434 		polarity = hdmi_read(sd, 0x05);  in read_stdi()
1435 		stdi->hs_pol = polarity & 0x20 ? '+' : '-';  in read_stdi()
1436 		stdi->vs_pol = polarity & 0x10 ? '+' : '-';  in read_stdi()
1439 	if (no_lock_stdi(sd) || no_lock_sspd(sd)) {  in read_stdi()
1440 		v4l2_dbg(2, debug, sd,  in read_stdi()
1442 		return -1;  in read_stdi()
1445 	if (stdi->lcf < 239 || stdi->bl < 8 || stdi->bl == 0x3fff) {  in read_stdi()
1446 		v4l2_dbg(2, debug, sd, "%s: invalid signal\n", __func__);  in read_stdi()
1448 		return -1;  in read_stdi()
1451 	v4l2_dbg(2, debug, sd,  in read_stdi()
1452 		"%s: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, %chsync, %cvsync, %s\n",  in read_stdi()
1453 		__func__, stdi->lcf, stdi->bl, stdi->lcvs,  in read_stdi()
1454 		stdi->hs_pol, stdi->vs_pol,  in read_stdi()
1455 		stdi->interlaced ? "interlaced" : "progressive");  in read_stdi()
1460 static int adv76xx_enum_dv_timings(struct v4l2_subdev *sd,  in adv76xx_enum_dv_timings()  argument
1463 	struct adv76xx_state *state = to_state(sd);  in adv76xx_enum_dv_timings()
1465 	if (timings->pad >= state->source_pad)  in adv76xx_enum_dv_timings()
1466 		return -EINVAL;  in adv76xx_enum_dv_timings()
1469 		adv76xx_get_dv_timings_cap(sd, timings->pad),  in adv76xx_enum_dv_timings()
1473 static int adv76xx_dv_timings_cap(struct v4l2_subdev *sd,  in adv76xx_dv_timings_cap()  argument
1476 	struct adv76xx_state *state = to_state(sd);  in adv76xx_dv_timings_cap()
1477 	unsigned int pad = cap->pad;  in adv76xx_dv_timings_cap()
1479 	if (cap->pad >= state->source_pad)  in adv76xx_dv_timings_cap()
1480 		return -EINVAL;  in adv76xx_dv_timings_cap()
1482 	*cap = *adv76xx_get_dv_timings_cap(sd, pad);  in adv76xx_dv_timings_cap()
1483 	cap->pad = pad;  in adv76xx_dv_timings_cap()
1490 static void adv76xx_fill_optional_dv_timings_fields(struct v4l2_subdev *sd,  in adv76xx_fill_optional_dv_timings_fields()  argument
1493 	v4l2_find_dv_timings_cap(timings, adv76xx_get_dv_timings_cap(sd, -1),  in adv76xx_fill_optional_dv_timings_fields()
1494 				 is_digital_input(sd) ? 250000 : 1000000,  in adv76xx_fill_optional_dv_timings_fields()
1498 static unsigned int adv7604_read_hdmi_pixelclock(struct v4l2_subdev *sd)  in adv7604_read_hdmi_pixelclock()  argument
1503 	a = hdmi_read(sd, 0x06);  in adv7604_read_hdmi_pixelclock()
1504 	b = hdmi_read(sd, 0x3b);  in adv7604_read_hdmi_pixelclock()
1509 	if (is_hdmi(sd)) {  in adv7604_read_hdmi_pixelclock()
1511 		unsigned bits_per_channel = ((hdmi_read(sd, 0x0b) & 0x60) >> 4) + 8;  in adv7604_read_hdmi_pixelclock()
1519 static unsigned int adv7611_read_hdmi_pixelclock(struct v4l2_subdev *sd)  in adv7611_read_hdmi_pixelclock()  argument
1523 	a = hdmi_read(sd, 0x51);  in adv7611_read_hdmi_pixelclock()
1524 	b = hdmi_read(sd, 0x52);  in adv7611_read_hdmi_pixelclock()
1530 static int adv76xx_query_dv_timings(struct v4l2_subdev *sd,  in adv76xx_query_dv_timings()  argument
1533 	struct adv76xx_state *state = to_state(sd);  in adv76xx_query_dv_timings()
1534 	const struct adv76xx_chip_info *info = state->info;  in adv76xx_query_dv_timings()
1535 	struct v4l2_bt_timings *bt = &timings->bt;  in adv76xx_query_dv_timings()
1539 		return -EINVAL;  in adv76xx_query_dv_timings()
1543 	if (no_signal(sd)) {  in adv76xx_query_dv_timings()
1544 		state->restart_stdi_once = true;  in adv76xx_query_dv_timings()
1545 		v4l2_dbg(1, debug, sd, "%s: no valid signal\n", __func__);  in adv76xx_query_dv_timings()
1546 		return -ENOLINK;  in adv76xx_query_dv_timings()
1550 	if (read_stdi(sd, &stdi)) {  in adv76xx_query_dv_timings()
1551 		v4l2_dbg(1, debug, sd, "%s: STDI/SSPD not locked\n", __func__);  in adv76xx_query_dv_timings()
1552 		return -ENOLINK;  in adv76xx_query_dv_timings()
1554 	bt->interlaced = stdi.interlaced ?  in adv76xx_query_dv_timings()
1557 	if (is_digital_input(sd)) {  in adv76xx_query_dv_timings()
1558 		bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80;  in adv76xx_query_dv_timings()
1562 		w = hdmi_read16(sd, 0x07, info->linewidth_mask);  in adv76xx_query_dv_timings()
1563 		h = hdmi_read16(sd, 0x09, info->field0_height_mask);  in adv76xx_query_dv_timings()
1565 		if (hdmi_signal && (io_read(sd, 0x60) & 1))  in adv76xx_query_dv_timings()
1566 			vic = infoframe_read(sd, 0x04);  in adv76xx_query_dv_timings()
1569 		    bt->width == w && bt->height == h)  in adv76xx_query_dv_timings()
1572 		timings->type = V4L2_DV_BT_656_1120;  in adv76xx_query_dv_timings()
1574 		bt->width = w;  in adv76xx_query_dv_timings()
1575 		bt->height = h;  in adv76xx_query_dv_timings()
1576 		bt->pixelclock = info->read_hdmi_pixelclock(sd);  in adv76xx_query_dv_timings()
1577 		bt->hfrontporch = hdmi_read16(sd, 0x20, info->hfrontporch_mask);  in adv76xx_query_dv_timings()
1578 		bt->hsync = hdmi_read16(sd, 0x22, info->hsync_mask);  in adv76xx_query_dv_timings()
1579 		bt->hbackporch = hdmi_read16(sd, 0x24, info->hbackporch_mask);  in adv76xx_query_dv_timings()
1580 		bt->vfrontporch = hdmi_read16(sd, 0x2a,  in adv76xx_query_dv_timings()
1581 			info->field0_vfrontporch_mask) / 2;  in adv76xx_query_dv_timings()
1582 		bt->vsync = hdmi_read16(sd, 0x2e, info->field0_vsync_mask) / 2;  in adv76xx_query_dv_timings()
1583 		bt->vbackporch = hdmi_read16(sd, 0x32,  in adv76xx_query_dv_timings()
1584 			info->field0_vbackporch_mask) / 2;  in adv76xx_query_dv_timings()
1585 		bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) |  in adv76xx_query_dv_timings()
1586 			((hdmi_read(sd, 0x05) & 0x20) ? V4L2_DV_HSYNC_POS_POL : 0);  in adv76xx_query_dv_timings()
1587 		if (bt->interlaced == V4L2_DV_INTERLACED) {  in adv76xx_query_dv_timings()
1588 			bt->height += hdmi_read16(sd, 0x0b,  in adv76xx_query_dv_timings()
1589 				info->field1_height_mask);  in adv76xx_query_dv_timings()
1590 			bt->il_vfrontporch = hdmi_read16(sd, 0x2c,  in adv76xx_query_dv_timings()
1591 				info->field1_vfrontporch_mask) / 2;  in adv76xx_query_dv_timings()
1592 			bt->il_vsync = hdmi_read16(sd, 0x30,  in adv76xx_query_dv_timings()
1593 				info->field1_vsync_mask) / 2;  in adv76xx_query_dv_timings()
1594 			bt->il_vbackporch = hdmi_read16(sd, 0x34,  in adv76xx_query_dv_timings()
1595 				info->field1_vbackporch_mask) / 2;  in adv76xx_query_dv_timings()
1597 		adv76xx_fill_optional_dv_timings_fields(sd, timings);  in adv76xx_query_dv_timings()
1600 		 * Since LCVS values are inaccurate [REF_03, p. 275-276],  in adv76xx_query_dv_timings()
1601 		 * stdi2dv_timings() is called with lcvs +-1 if the first attempt fails.  in adv76xx_query_dv_timings()
1603 		if (!stdi2dv_timings(sd, &stdi, timings))  in adv76xx_query_dv_timings()
1606 		v4l2_dbg(1, debug, sd, "%s: lcvs + 1 = %d\n", __func__, stdi.lcvs);  in adv76xx_query_dv_timings()
1607 		if (!stdi2dv_timings(sd, &stdi, timings))  in adv76xx_query_dv_timings()
1609 		stdi.lcvs -= 2;  in adv76xx_query_dv_timings()
1610 		v4l2_dbg(1, debug, sd, "%s: lcvs - 1 = %d\n", __func__, stdi.lcvs);  in adv76xx_query_dv_timings()
1611 		if (stdi2dv_timings(sd, &stdi, timings)) {  in adv76xx_query_dv_timings()
1621 			if (state->restart_stdi_once) {  in adv76xx_query_dv_timings()
1622 				v4l2_dbg(1, debug, sd, "%s: restart STDI\n", __func__);  in adv76xx_query_dv_timings()
1624 				/* enter one-shot mode */  in adv76xx_query_dv_timings()
1625 				cp_write_clr_set(sd, 0x86, 0x06, 0x00);  in adv76xx_query_dv_timings()
1627 				cp_write_clr_set(sd, 0x86, 0x06, 0x04);  in adv76xx_query_dv_timings()
1629 				cp_write_clr_set(sd, 0x86, 0x06, 0x02);  in adv76xx_query_dv_timings()
1630 				state->restart_stdi_once = false;  in adv76xx_query_dv_timings()
1631 				return -ENOLINK;  in adv76xx_query_dv_timings()
1633 			v4l2_dbg(1, debug, sd, "%s: format not supported\n", __func__);  in adv76xx_query_dv_timings()
1634 			return -ERANGE;  in adv76xx_query_dv_timings()
1636 		state->restart_stdi_once = true;  in adv76xx_query_dv_timings()
1640 	if (no_signal(sd)) {  in adv76xx_query_dv_timings()
1641 		v4l2_dbg(1, debug, sd, "%s: signal lost during readout\n", __func__);  in adv76xx_query_dv_timings()
1643 		return -ENOLINK;  in adv76xx_query_dv_timings()
1646 	if ((is_analog_input(sd) && bt->pixelclock > 170000000) ||  in adv76xx_query_dv_timings()
1647 			(is_digital_input(sd) && bt->pixelclock > 225000000)) {  in adv76xx_query_dv_timings()
1648 		v4l2_dbg(1, debug, sd, "%s: pixelclock out of range %d\n",  in adv76xx_query_dv_timings()
1649 				__func__, (u32)bt->pixelclock);  in adv76xx_query_dv_timings()
1650 		return -ERANGE;  in adv76xx_query_dv_timings()
1654 		v4l2_print_dv_timings(sd->name, "adv76xx_query_dv_timings: ",  in adv76xx_query_dv_timings()
1660 static int adv76xx_s_dv_timings(struct v4l2_subdev *sd,  in adv76xx_s_dv_timings()  argument
1663 	struct adv76xx_state *state = to_state(sd);  in adv76xx_s_dv_timings()
1668 		return -EINVAL;  in adv76xx_s_dv_timings()
1670 	if (v4l2_match_dv_timings(&state->timings, timings, 0, false)) {  in adv76xx_s_dv_timings()
1671 		v4l2_dbg(1, debug, sd, "%s: no change\n", __func__);  in adv76xx_s_dv_timings()
1675 	bt = &timings->bt;  in adv76xx_s_dv_timings()
1677 	if (!v4l2_valid_dv_timings(timings, adv76xx_get_dv_timings_cap(sd, -1),  in adv76xx_s_dv_timings()
1679 		return -ERANGE;  in adv76xx_s_dv_timings()
1681 	adv76xx_fill_optional_dv_timings_fields(sd, timings);  in adv76xx_s_dv_timings()
1683 	state->timings = *timings;  in adv76xx_s_dv_timings()
1685 	cp_write_clr_set(sd, 0x91, 0x40, bt->interlaced ? 0x40 : 0x00);  in adv76xx_s_dv_timings()
1688 	err = configure_predefined_video_timings(sd, timings);  in adv76xx_s_dv_timings()
1692 		configure_custom_video_timings(sd, bt);  in adv76xx_s_dv_timings()
1695 	set_rgb_quantization_range(sd);  in adv76xx_s_dv_timings()
1698 		v4l2_print_dv_timings(sd->name, "adv76xx_s_dv_timings: ",  in adv76xx_s_dv_timings()
1703 static int adv76xx_g_dv_timings(struct v4l2_subdev *sd,  in adv76xx_g_dv_timings()  argument
1706 	struct adv76xx_state *state = to_state(sd);  in adv76xx_g_dv_timings()
1708 	*timings = state->timings;  in adv76xx_g_dv_timings()
1712 static void adv7604_set_termination(struct v4l2_subdev *sd, bool enable)  in adv7604_set_termination()  argument
1714 	hdmi_write(sd, 0x01, enable ? 0x00 : 0x78);  in adv7604_set_termination()
1717 static void adv7611_set_termination(struct v4l2_subdev *sd, bool enable)  in adv7611_set_termination()  argument
1719 	hdmi_write(sd, 0x83, enable ? 0xfe : 0xff);  in adv7611_set_termination()
1722 static void enable_input(struct v4l2_subdev *sd)  in enable_input()  argument
1724 	struct adv76xx_state *state = to_state(sd);  in enable_input()
1726 	if (is_analog_input(sd)) {  in enable_input()
1727 		io_write(sd, 0x15, 0xb0);   /* Disable Tristate of Pins (no audio) */  in enable_input()
1728 	} else if (is_digital_input(sd)) {  in enable_input()
1729 		hdmi_write_clr_set(sd, 0x00, 0x03, state->selected_input);  in enable_input()
1730 		state->info->set_termination(sd, true);  in enable_input()
1731 		io_write(sd, 0x15, 0xa0);   /* Disable Tristate of Pins */  in enable_input()
1732 		hdmi_write_clr_set(sd, 0x1a, 0x10, 0x00); /* Unmute audio */  in enable_input()
1734 		v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n",  in enable_input()
1735 				__func__, state->selected_input);  in enable_input()
1739 static void disable_input(struct v4l2_subdev *sd)  in disable_input()  argument
1741 	struct adv76xx_state *state = to_state(sd);  in disable_input()
1743 	hdmi_write_clr_set(sd, 0x1a, 0x10, 0x10); /* Mute audio */  in disable_input()
1745 	io_write(sd, 0x15, 0xbe);   /* Tristate all outputs from video core */  in disable_input()
1746 	state->info->set_termination(sd, false);  in disable_input()
1749 static void select_input(struct v4l2_subdev *sd)  in select_input()  argument
1751 	struct adv76xx_state *state = to_state(sd);  in select_input()
1752 	const struct adv76xx_chip_info *info = state->info;  in select_input()
1754 	if (is_analog_input(sd)) {  in select_input()
1755 		adv76xx_write_reg_seq(sd, info->recommended_settings[0]);  in select_input()
1757 		afe_write(sd, 0x00, 0x08); /* power up ADC */  in select_input()
1758 		afe_write(sd, 0x01, 0x06); /* power up Analog Front End */  in select_input()
1759 		afe_write(sd, 0xc8, 0x00); /* phase control */  in select_input()
1760 	} else if (is_digital_input(sd)) {  in select_input()
1761 		hdmi_write(sd, 0x00, state->selected_input & 0x03);  in select_input()
1763 		adv76xx_write_reg_seq(sd, info->recommended_settings[1]);  in select_input()
1766 			afe_write(sd, 0x00, 0xff); /* power down ADC */  in select_input()
1767 			afe_write(sd, 0x01, 0xfe); /* power down Analog Front End */  in select_input()
1768 			afe_write(sd, 0xc8, 0x40); /* phase control */  in select_input()
1771 		cp_write(sd, 0x3e, 0x00); /* CP core pre-gain control */  in select_input()
1772 		cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */  in select_input()
1773 		cp_write(sd, 0x40, 0x80); /* CP core pre-gain control. Graphics mode */  in select_input()
1775 		v4l2_dbg(2, debug, sd, "%s: Unknown port %d selected\n",  in select_input()
1776 				__func__, state->selected_input);  in select_input()
1780 static int adv76xx_s_routing(struct v4l2_subdev *sd,  in adv76xx_s_routing()  argument
1783 	struct adv76xx_state *state = to_state(sd);  in adv76xx_s_routing()
1785 	v4l2_dbg(2, debug, sd, "%s: input %d, selected input %d",  in adv76xx_s_routing()
1786 			__func__, input, state->selected_input);  in adv76xx_s_routing()
1788 	if (input == state->selected_input)  in adv76xx_s_routing()
1791 	if (input > state->info->max_port)  in adv76xx_s_routing()
1792 		return -EINVAL;  in adv76xx_s_routing()
1794 	state->selected_input = input;  in adv76xx_s_routing()
1796 	disable_input(sd);  in adv76xx_s_routing()
1797 	select_input(sd);  in adv76xx_s_routing()
1798 	enable_input(sd);  in adv76xx_s_routing()
1800 	v4l2_subdev_notify_event(sd, &adv76xx_ev_fmt);  in adv76xx_s_routing()
1805 static int adv76xx_enum_mbus_code(struct v4l2_subdev *sd,  in adv76xx_enum_mbus_code()  argument
1809 	struct adv76xx_state *state = to_state(sd);  in adv76xx_enum_mbus_code()
1811 	if (code->index >= state->info->nformats)  in adv76xx_enum_mbus_code()
1812 		return -EINVAL;  in adv76xx_enum_mbus_code()
1814 	code->code = state->info->formats[code->index].code;  in adv76xx_enum_mbus_code()
1824 	format->width = state->timings.bt.width;  in adv76xx_fill_format()
1825 	format->height = state->timings.bt.height;  in adv76xx_fill_format()
1826 	format->field = V4L2_FIELD_NONE;  in adv76xx_fill_format()
1827 	format->colorspace = V4L2_COLORSPACE_SRGB;  in adv76xx_fill_format()
1829 	if (state->timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO)  in adv76xx_fill_format()
1830 		format->colorspace = (state->timings.bt.height <= 576) ?  in adv76xx_fill_format()
1844  * ----------+-------------------------------------------------
1846  * GRB (1-2) |	BGR	RGB	GBR	GRB	RBG	BRG
1847  * RBG (2-3) |	GRB	GBR	BRG	RBG	BGR	RGB
1848  * BGR (1-3) |	RBG	BRG	RGB	BGR	GRB	GBR
1861 		_BUS(GRB) /* 1-2 */ = _SEL(BGR, RGB, GBR, GRB, RBG, BRG),  in adv76xx_op_ch_sel()
1862 		_BUS(RBG) /* 2-3 */ = _SEL(GRB, GBR, BRG, RBG, BGR, RGB),  in adv76xx_op_ch_sel()
1863 		_BUS(BGR) /* 1-3 */ = _SEL(RBG, BRG, RGB, BGR, GRB, GBR),  in adv76xx_op_ch_sel()
1868 	return op_ch_sel[state->pdata.bus_order][state->format->op_ch_sel >> 5];  in adv76xx_op_ch_sel()
1873 	struct v4l2_subdev *sd = &state->sd;  in adv76xx_setup_format()  local
1875 	io_write_clr_set(sd, 0x02, 0x02,  in adv76xx_setup_format()
1876 			state->format->rgb_out ? ADV76XX_RGB_OUT : 0);  in adv76xx_setup_format()
1877 	io_write(sd, 0x03, state->format->op_format_sel |  in adv76xx_setup_format()
1878 		 state->pdata.op_format_mode_sel);  in adv76xx_setup_format()
1879 	io_write_clr_set(sd, 0x04, 0xe0, adv76xx_op_ch_sel(state));  in adv76xx_setup_format()
1880 	io_write_clr_set(sd, 0x05, 0x01,  in adv76xx_setup_format()
1881 			state->format->swap_cb_cr ? ADV76XX_OP_SWAP_CB_CR : 0);  in adv76xx_setup_format()
1882 	set_rgb_quantization_range(sd);  in adv76xx_setup_format()
1885 static int adv76xx_get_format(struct v4l2_subdev *sd,  in adv76xx_get_format()  argument
1889 	struct adv76xx_state *state = to_state(sd);  in adv76xx_get_format()
1891 	if (format->pad != state->source_pad)  in adv76xx_get_format()
1892 		return -EINVAL;  in adv76xx_get_format()
1894 	adv76xx_fill_format(state, &format->format);  in adv76xx_get_format()
1896 	if (format->which == V4L2_SUBDEV_FORMAT_TRY) {  in adv76xx_get_format()
1899 		fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad);  in adv76xx_get_format()
1900 		format->format.code = fmt->code;  in adv76xx_get_format()
1902 		format->format.code = state->format->code;  in adv76xx_get_format()
1908 static int adv76xx_get_selection(struct v4l2_subdev *sd,  in adv76xx_get_selection()  argument
1912 	struct adv76xx_state *state = to_state(sd);  in adv76xx_get_selection()
1914 	if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)  in adv76xx_get_selection()
1915 		return -EINVAL;  in adv76xx_get_selection()
1917 	if (sel->target > V4L2_SEL_TGT_CROP_BOUNDS)  in adv76xx_get_selection()
1918 		return -EINVAL;  in adv76xx_get_selection()
1920 	sel->r.left	= 0;  in adv76xx_get_selection()
1921 	sel->r.top	= 0;  in adv76xx_get_selection()
1922 	sel->r.width	= state->timings.bt.width;  in adv76xx_get_selection()
1923 	sel->r.height	= state->timings.bt.height;  in adv76xx_get_selection()
1928 static int adv76xx_set_format(struct v4l2_subdev *sd,  in adv76xx_set_format()  argument
1932 	struct adv76xx_state *state = to_state(sd);  in adv76xx_set_format()
1935 	if (format->pad != state->source_pad)  in adv76xx_set_format()
1936 		return -EINVAL;  in adv76xx_set_format()
1938 	info = adv76xx_format_info(state, format->format.code);  in adv76xx_set_format()
1942 	adv76xx_fill_format(state, &format->format);  in adv76xx_set_format()
1943 	format->format.code = info->code;  in adv76xx_set_format()
1945 	if (format->which == V4L2_SUBDEV_FORMAT_TRY) {  in adv76xx_set_format()
1948 		fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad);  in adv76xx_set_format()
1949 		fmt->code = format->format.code;  in adv76xx_set_format()
1951 		state->format = info;  in adv76xx_set_format()
1959 static void adv76xx_cec_tx_raw_status(struct v4l2_subdev *sd, u8 tx_raw_status)  in adv76xx_cec_tx_raw_status()  argument
1961 	struct adv76xx_state *state = to_state(sd);  in adv76xx_cec_tx_raw_status()
1963 	if ((cec_read(sd, 0x11) & 0x01) == 0) {  in adv76xx_cec_tx_raw_status()
1964 		v4l2_dbg(1, debug, sd, "%s: tx raw: tx disabled\n", __func__);  in adv76xx_cec_tx_raw_status()
1969 		v4l2_dbg(1, debug, sd, "%s: tx raw: arbitration lost\n",  in adv76xx_cec_tx_raw_status()
1971 		cec_transmit_done(state->cec_adap, CEC_TX_STATUS_ARB_LOST,  in adv76xx_cec_tx_raw_status()
1980 		v4l2_dbg(1, debug, sd, "%s: tx raw: retry failed\n", __func__);  in adv76xx_cec_tx_raw_status()
1986 		nack_cnt = cec_read(sd, 0x14) & 0xf;  in adv76xx_cec_tx_raw_status()
1989 		low_drive_cnt = cec_read(sd, 0x14) >> 4;  in adv76xx_cec_tx_raw_status()
1992 		cec_transmit_done(state->cec_adap, status,  in adv76xx_cec_tx_raw_status()
1997 		v4l2_dbg(1, debug, sd, "%s: tx raw: ready ok\n", __func__);  in adv76xx_cec_tx_raw_status()
1998 		cec_transmit_done(state->cec_adap, CEC_TX_STATUS_OK, 0, 0, 0, 0);  in adv76xx_cec_tx_raw_status()
2003 static void adv76xx_cec_isr(struct v4l2_subdev *sd, bool *handled)  in adv76xx_cec_isr()  argument
2005 	struct adv76xx_state *state = to_state(sd);  in adv76xx_cec_isr()
2009 	cec_irq = io_read(sd, 0x4d) & 0x0f;  in adv76xx_cec_isr()
2013 	v4l2_dbg(1, debug, sd, "%s: cec: irq 0x%x\n", __func__, cec_irq);  in adv76xx_cec_isr()
2014 	adv76xx_cec_tx_raw_status(sd, cec_irq);  in adv76xx_cec_isr()
2018 		msg.len = cec_read(sd, 0x25) & 0x1f;  in adv76xx_cec_isr()
2026 				msg.msg[i] = cec_read(sd, i + 0x15);  in adv76xx_cec_isr()
2027 			cec_write(sd, 0x26, 0x01); /* re-enable rx */  in adv76xx_cec_isr()
2028 			cec_received_msg(state->cec_adap, &msg);  in adv76xx_cec_isr()
2035 	io_write(sd, 0x4e, cec_irq);  in adv76xx_cec_isr()
2044 	struct v4l2_subdev *sd = &state->sd;  in adv76xx_cec_adap_enable()  local
2046 	if (!state->cec_enabled_adap && enable) {  in adv76xx_cec_adap_enable()
2047 		cec_write_clr_set(sd, 0x2a, 0x01, 0x01); /* power up cec */  in adv76xx_cec_adap_enable()
2048 		cec_write(sd, 0x2c, 0x01);	/* cec soft reset */  in adv76xx_cec_adap_enable()
2049 		cec_write_clr_set(sd, 0x11, 0x01, 0); /* initially disable tx */  in adv76xx_cec_adap_enable()
2055 		io_write_clr_set(sd, 0x50, 0x0f, 0x0f);  in adv76xx_cec_adap_enable()
2056 		cec_write(sd, 0x26, 0x01);            /* enable rx */  in adv76xx_cec_adap_enable()
2057 	} else if (state->cec_enabled_adap && !enable) {  in adv76xx_cec_adap_enable()
2059 		io_write_clr_set(sd, 0x50, 0x0f, 0x00);  in adv76xx_cec_adap_enable()
2060 		/* disable address mask 1-3 */  in adv76xx_cec_adap_enable()
2061 		cec_write_clr_set(sd, 0x27, 0x70, 0x00);  in adv76xx_cec_adap_enable()
2063 		cec_write_clr_set(sd, 0x2a, 0x01, 0x00);  in adv76xx_cec_adap_enable()
2064 		state->cec_valid_addrs = 0;  in adv76xx_cec_adap_enable()
2066 	state->cec_enabled_adap = enable;  in adv76xx_cec_adap_enable()
2067 	adv76xx_s_detect_tx_5v_ctrl(sd);  in adv76xx_cec_adap_enable()
2074 	struct v4l2_subdev *sd = &state->sd;  in adv76xx_cec_adap_log_addr()  local
2077 	if (!state->cec_enabled_adap)  in adv76xx_cec_adap_log_addr()
2078 		return addr == CEC_LOG_ADDR_INVALID ? 0 : -EIO;  in adv76xx_cec_adap_log_addr()
2081 		cec_write_clr_set(sd, 0x27, 0x70, 0);  in adv76xx_cec_adap_log_addr()
2082 		state->cec_valid_addrs = 0;  in adv76xx_cec_adap_log_addr()
2087 		bool is_valid = state->cec_valid_addrs & (1 << i);  in adv76xx_cec_adap_log_addr()
2091 		if (is_valid && state->cec_addr[i] == addr)  in adv76xx_cec_adap_log_addr()
2097 			return -ENXIO;  in adv76xx_cec_adap_log_addr()
2099 	state->cec_addr[i] = addr;  in adv76xx_cec_adap_log_addr()
2100 	state->cec_valid_addrs |= 1 << i;  in adv76xx_cec_adap_log_addr()
2105 		cec_write_clr_set(sd, 0x27, 0x10, 0x10);  in adv76xx_cec_adap_log_addr()
2107 		cec_write_clr_set(sd, 0x28, 0x0f, addr);  in adv76xx_cec_adap_log_addr()
2111 		cec_write_clr_set(sd, 0x27, 0x20, 0x20);  in adv76xx_cec_adap_log_addr()
2113 		cec_write_clr_set(sd, 0x28, 0xf0, addr << 4);  in adv76xx_cec_adap_log_addr()
2117 		cec_write_clr_set(sd, 0x27, 0x40, 0x40);  in adv76xx_cec_adap_log_addr()
2119 		cec_write_clr_set(sd, 0x29, 0x0f, addr);  in adv76xx_cec_adap_log_addr()
2129 	struct v4l2_subdev *sd = &state->sd;  in adv76xx_cec_adap_transmit()  local
2130 	u8 len = msg->len;  in adv76xx_cec_adap_transmit()
2134 	 * The number of retries is the number of attempts - 1, but retry  in adv76xx_cec_adap_transmit()
2138 	cec_write_clr_set(sd, 0x12, 0x70, max(1, attempts - 1) << 4);  in adv76xx_cec_adap_transmit()
2141 		v4l2_err(sd, "%s: len exceeded 16 (%d)\n", __func__, len);  in adv76xx_cec_adap_transmit()
2142 		return -EINVAL;  in adv76xx_cec_adap_transmit()
2147 		cec_write(sd, i, msg->msg[i]);  in adv76xx_cec_adap_transmit()
2150 	cec_write(sd, 0x10, len);  in adv76xx_cec_adap_transmit()
2152 	cec_write(sd, 0x11, 0x01);  in adv76xx_cec_adap_transmit()
2163 static int adv76xx_isr(struct v4l2_subdev *sd, u32 status, bool *handled)  in adv76xx_isr()  argument
2165 	struct adv76xx_state *state = to_state(sd);  in adv76xx_isr()
2166 	const struct adv76xx_chip_info *info = state->info;  in adv76xx_isr()
2167 	const u8 irq_reg_0x43 = io_read(sd, 0x43);  in adv76xx_isr()
2168 	const u8 irq_reg_0x6b = io_read(sd, 0x6b);  in adv76xx_isr()
2169 	const u8 irq_reg_0x70 = io_read(sd, 0x70);  in adv76xx_isr()
2175 		io_write(sd, 0x44, irq_reg_0x43);  in adv76xx_isr()
2177 		io_write(sd, 0x71, irq_reg_0x70);  in adv76xx_isr()
2179 		io_write(sd, 0x6c, irq_reg_0x6b);  in adv76xx_isr()
2181 	v4l2_dbg(2, debug, sd, "%s: ", __func__);  in adv76xx_isr()
2185 	fmt_change_digital = is_digital_input(sd)  in adv76xx_isr()
2186 			   ? irq_reg_0x6b & info->fmt_change_digital_mask  in adv76xx_isr()
2190 		v4l2_dbg(1, debug, sd,  in adv76xx_isr()
2194 		v4l2_subdev_notify_event(sd, &adv76xx_ev_fmt);  in adv76xx_isr()
2201 		v4l2_dbg(1, debug, sd, "%s: irq %s mode\n", __func__,  in adv76xx_isr()
2202 			(io_read(sd, 0x6a) & 0x01) ? "HDMI" : "DVI");  in adv76xx_isr()
2203 		set_rgb_quantization_range(sd);  in adv76xx_isr()
2210 	adv76xx_cec_isr(sd, handled);  in adv76xx_isr()
2214 	tx_5v = irq_reg_0x70 & info->cable_det_mask;  in adv76xx_isr()
2216 		v4l2_dbg(1, debug, sd, "%s: tx_5v: 0x%x\n", __func__, tx_5v);  in adv76xx_isr()
2217 		adv76xx_s_detect_tx_5v_ctrl(sd);  in adv76xx_isr()
2224 static int adv76xx_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid)  in adv76xx_get_edid()  argument
2226 	struct adv76xx_state *state = to_state(sd);  in adv76xx_get_edid()
2229 	memset(edid->reserved, 0, sizeof(edid->reserved));  in adv76xx_get_edid()
2231 	switch (edid->pad) {  in adv76xx_get_edid()
2236 		if (state->edid.present & (1 << edid->pad))  in adv76xx_get_edid()
2237 			data = state->edid.edid;  in adv76xx_get_edid()
2240 		return -EINVAL;  in adv76xx_get_edid()
2243 	if (edid->start_block == 0 && edid->blocks == 0) {  in adv76xx_get_edid()
2244 		edid->blocks = data ? state->edid.blocks : 0;  in adv76xx_get_edid()
2249 		return -ENODATA;  in adv76xx_get_edid()
2251 	if (edid->start_block >= state->edid.blocks)  in adv76xx_get_edid()
2252 		return -EINVAL;  in adv76xx_get_edid()
2254 	if (edid->start_block + edid->blocks > state->edid.blocks)  in adv76xx_get_edid()
2255 		edid->blocks = state->edid.blocks - edid->start_block;  in adv76xx_get_edid()
2257 	memcpy(edid->edid, data + edid->start_block * 128, edid->blocks * 128);  in adv76xx_get_edid()
2262 static int adv76xx_set_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid)  in adv76xx_set_edid()  argument
2264 	struct adv76xx_state *state = to_state(sd);  in adv76xx_set_edid()
2265 	const struct adv76xx_chip_info *info = state->info;  in adv76xx_set_edid()
2271 	memset(edid->reserved, 0, sizeof(edid->reserved));  in adv76xx_set_edid()
2273 	if (edid->pad > ADV7604_PAD_HDMI_PORT_D)  in adv76xx_set_edid()
2274 		return -EINVAL;  in adv76xx_set_edid()
2275 	if (edid->start_block != 0)  in adv76xx_set_edid()
2276 		return -EINVAL;  in adv76xx_set_edid()
2277 	if (edid->blocks == 0) {  in adv76xx_set_edid()
2279 		state->edid.present &= ~(1 << edid->pad);  in adv76xx_set_edid()
2280 		adv76xx_set_hpd(state, state->edid.present);  in adv76xx_set_edid()
2281 		rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, state->edid.present);  in adv76xx_set_edid()
2284 		state->aspect_ratio.numerator = 16;  in adv76xx_set_edid()
2285 		state->aspect_ratio.denominator = 9;  in adv76xx_set_edid()
2287 		if (!state->edid.present) {  in adv76xx_set_edid()
2288 			state->edid.blocks = 0;  in adv76xx_set_edid()
2289 			cec_phys_addr_invalidate(state->cec_adap);  in adv76xx_set_edid()
2292 		v4l2_dbg(2, debug, sd, "%s: clear EDID pad %d, edid.present = 0x%x\n",  in adv76xx_set_edid()
2293 				__func__, edid->pad, state->edid.present);  in adv76xx_set_edid()
2296 	if (edid->blocks > 2) {  in adv76xx_set_edid()
2297 		edid->blocks = 2;  in adv76xx_set_edid()
2298 		return -E2BIG;  in adv76xx_set_edid()
2300 	pa = v4l2_get_edid_phys_addr(edid->edid, edid->blocks * 128, &spa_loc);  in adv76xx_set_edid()
2305 	v4l2_dbg(2, debug, sd, "%s: write EDID pad %d, edid.present = 0x%x\n",  in adv76xx_set_edid()
2306 			__func__, edid->pad, state->edid.present);  in adv76xx_set_edid()
2309 	cancel_delayed_work_sync(&state->delayed_work_enable_hotplug);  in adv76xx_set_edid()
2311 	rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, 0x00);  in adv76xx_set_edid()
2314 	 * Return an error if no location of the source physical address  in adv76xx_set_edid()
2318 		return -EINVAL;  in adv76xx_set_edid()
2320 	switch (edid->pad) {  in adv76xx_set_edid()
2322 		state->spa_port_a[0] = edid->edid[spa_loc];  in adv76xx_set_edid()
2323 		state->spa_port_a[1] = edid->edid[spa_loc + 1];  in adv76xx_set_edid()
2326 		rep_write(sd, 0x70, edid->edid[spa_loc]);  in adv76xx_set_edid()
2327 		rep_write(sd, 0x71, edid->edid[spa_loc + 1]);  in adv76xx_set_edid()
2330 		rep_write(sd, 0x72, edid->edid[spa_loc]);  in adv76xx_set_edid()
2331 		rep_write(sd, 0x73, edid->edid[spa_loc + 1]);  in adv76xx_set_edid()
2334 		rep_write(sd, 0x74, edid->edid[spa_loc]);  in adv76xx_set_edid()
2335 		rep_write(sd, 0x75, edid->edid[spa_loc + 1]);  in adv76xx_set_edid()
2338 		return -EINVAL;  in adv76xx_set_edid()
2341 	if (info->type == ADV7604) {  in adv76xx_set_edid()
2342 		rep_write(sd, 0x76, spa_loc & 0xff);  in adv76xx_set_edid()
2343 		rep_write_clr_set(sd, 0x77, 0x40, (spa_loc & 0x100) >> 2);  in adv76xx_set_edid()
2346 		rep_write(sd, 0x70, spa_loc & 0xff);  in adv76xx_set_edid()
2347 		rep_write_clr_set(sd, 0x71, 0x01, (spa_loc & 0x100) >> 8);  in adv76xx_set_edid()
2350 	edid->edid[spa_loc] = state->spa_port_a[0];  in adv76xx_set_edid()
2351 	edid->edid[spa_loc + 1] = state->spa_port_a[1];  in adv76xx_set_edid()
2353 	memcpy(state->edid.edid, edid->edid, 128 * edid->blocks);  in adv76xx_set_edid()
2354 	state->edid.blocks = edid->blocks;  in adv76xx_set_edid()
2355 	state->aspect_ratio = v4l2_calc_aspect_ratio(edid->edid[0x15],  in adv76xx_set_edid()
2356 			edid->edid[0x16]);  in adv76xx_set_edid()
2357 	state->edid.present |= 1 << edid->pad;  in adv76xx_set_edid()
2359 	err = edid_write_block(sd, 128 * edid->blocks, state->edid.edid);  in adv76xx_set_edid()
2361 		v4l2_err(sd, "error %d writing edid pad %d\n", err, edid->pad);  in adv76xx_set_edid()
2367 	rep_write_clr_set(sd, info->edid_enable_reg, 0x0f, state->edid.present);  in adv76xx_set_edid()
2370 		if (rep_read(sd, info->edid_status_reg) & state->edid.present)  in adv76xx_set_edid()
2375 		v4l2_err(sd, "error enabling edid (0x%x)\n", state->edid.present);  in adv76xx_set_edid()
2376 		return -EIO;  in adv76xx_set_edid()
2378 	cec_s_phys_addr(state->cec_adap, pa, false);  in adv76xx_set_edid()
2381 	schedule_delayed_work(&state->delayed_work_enable_hotplug, HZ / 10);  in adv76xx_set_edid()
2385 /*********** avi info frame CEA-861-E **************/
2394 static int adv76xx_read_infoframe(struct v4l2_subdev *sd, int index,  in adv76xx_read_infoframe()  argument
2401 	if (!(io_read(sd, 0x60) & adv76xx_cri[index].present_mask)) {  in adv76xx_read_infoframe()
2402 		v4l2_info(sd, "%s infoframe not received\n",  in adv76xx_read_infoframe()
2404 		return -ENOENT;  in adv76xx_read_infoframe()
2408 		buffer[i] = infoframe_read(sd,  in adv76xx_read_infoframe()
2414 		v4l2_err(sd, "%s: invalid %s infoframe length %d\n", __func__,  in adv76xx_read_infoframe()
2416 		return -ENOENT;  in adv76xx_read_infoframe()
2420 		buffer[i + 3] = infoframe_read(sd,  in adv76xx_read_infoframe()
2424 		v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__,  in adv76xx_read_infoframe()
2426 		return -ENOENT;  in adv76xx_read_infoframe()
2431 static void adv76xx_log_infoframes(struct v4l2_subdev *sd)  in adv76xx_log_infoframes()  argument
2435 	if (!is_hdmi(sd)) {  in adv76xx_log_infoframes()
2436 		v4l2_info(sd, "receive DVI-D signal, no infoframes\n");  in adv76xx_log_infoframes()
2442 		struct i2c_client *client = v4l2_get_subdevdata(sd);  in adv76xx_log_infoframes()
2444 		if (adv76xx_read_infoframe(sd, i, &frame))  in adv76xx_log_infoframes()
2446 		hdmi_infoframe_log(KERN_INFO, &client->dev, &frame);  in adv76xx_log_infoframes()
2450 static int adv76xx_log_status(struct v4l2_subdev *sd)  in adv76xx_log_status()  argument
2452 	struct adv76xx_state *state = to_state(sd);  in adv76xx_log_status()
2453 	const struct adv76xx_chip_info *info = state->info;  in adv76xx_log_status()
2456 	u8 reg_io_0x02 = io_read(sd, 0x02);  in adv76xx_log_status()
2461 		"bypassed", "YPbPr601 -> RGB", "reserved", "YPbPr709 -> RGB",  in adv76xx_log_status()
2462 		"reserved", "RGB -> YPbPr601", "reserved", "RGB -> YPbPr709",  in adv76xx_log_status()
2463 		"reserved", "YPbPr709 -> YPbPr601", "YPbPr601 -> YPbPr709",  in adv76xx_log_status()
2467 		"RGB limited range (16-235)", "RGB full range (0-255)",  in adv76xx_log_status()
2468 		"YCbCr Bt.601 (16-235)", "YCbCr Bt.709 (16-235)",  in adv76xx_log_status()
2470 		"YCbCr Bt.601 (0-255)", "YCbCr Bt.709 (0-255)",  in adv76xx_log_status()
2475 		"RGB limited range (16-235)", "RGB full range (0-255)",  in adv76xx_log_status()
2476 		"YCbCr Bt.601 (16-235)", "YCbCr Bt.709 (16-235)",  in adv76xx_log_status()
2478 		"YCbCr Bt.601 (0-255)", "YCbCr Bt.709 (0-255)",  in adv76xx_log_status()
2484 		"RGB limited range (16-235)",  in adv76xx_log_status()
2485 		"RGB full range (0-255)",  in adv76xx_log_status()
2488 		"8-bits per channel",  in adv76xx_log_status()
2489 		"10-bits per channel",  in adv76xx_log_status()
2490 		"12-bits per channel",  in adv76xx_log_status()
2491 		"16-bits per channel (not supported)"  in adv76xx_log_status()
2494 	v4l2_info(sd, "-----Chip status-----\n");  in adv76xx_log_status()
2495 	v4l2_info(sd, "Chip power: %s\n", no_power(sd) ? "off" : "on");  in adv76xx_log_status()
2496 	edid_enabled = rep_read(sd, info->edid_status_reg);  in adv76xx_log_status()
2497 	v4l2_info(sd, "EDID enabled port A: %s, B: %s, C: %s, D: %s\n",  in adv76xx_log_status()
2498 			((edid_enabled & 0x01) ? "Yes" : "No"),  in adv76xx_log_status()
2499 			((edid_enabled & 0x02) ? "Yes" : "No"),  in adv76xx_log_status()
2500 			((edid_enabled & 0x04) ? "Yes" : "No"),  in adv76xx_log_status()
2501 			((edid_enabled & 0x08) ? "Yes" : "No"));  in adv76xx_log_status()
2502 	v4l2_info(sd, "CEC: %s\n", state->cec_enabled_adap ?  in adv76xx_log_status()
2504 	if (state->cec_enabled_adap) {  in adv76xx_log_status()
2508 			bool is_valid = state->cec_valid_addrs & (1 << i);  in adv76xx_log_status()
2511 				v4l2_info(sd, "CEC Logical Address: 0x%x\n",  in adv76xx_log_status()
2512 					  state->cec_addr[i]);  in adv76xx_log_status()
2516 	v4l2_info(sd, "-----Signal status-----\n");  in adv76xx_log_status()
2517 	cable_det = info->read_cable_det(sd);  in adv76xx_log_status()
2518 	v4l2_info(sd, "Cable detected (+5V power) port A: %s, B: %s, C: %s, D: %s\n",  in adv76xx_log_status()
2519 			((cable_det & 0x01) ? "Yes" : "No"),  in adv76xx_log_status()
2520 			((cable_det & 0x02) ? "Yes" : "No"),  in adv76xx_log_status()
2521 			((cable_det & 0x04) ? "Yes" : "No"),  in adv76xx_log_status()
2522 			((cable_det & 0x08) ? "Yes" : "No"));  in adv76xx_log_status()
2523 	v4l2_info(sd, "TMDS signal detected: %s\n",  in adv76xx_log_status()
2524 			no_signal_tmds(sd) ? "false" : "true");  in adv76xx_log_status()
2525 	v4l2_info(sd, "TMDS signal locked: %s\n",  in adv76xx_log_status()
2526 			no_lock_tmds(sd) ? "false" : "true");  in adv76xx_log_status()
2527 	v4l2_info(sd, "SSPD locked: %s\n", no_lock_sspd(sd) ? "false" : "true");  in adv76xx_log_status()
2528 	v4l2_info(sd, "STDI locked: %s\n", no_lock_stdi(sd) ? "false" : "true");  in adv76xx_log_status()
2529 	v4l2_info(sd, "CP locked: %s\n", no_lock_cp(sd) ? "false" : "true");  in adv76xx_log_status()
2530 	v4l2_info(sd, "CP free run: %s\n",  in adv76xx_log_status()
2531 			(in_free_run(sd)) ? "on" : "off");  in adv76xx_log_status()
2532 	v4l2_info(sd, "Prim-mode = 0x%x, video std = 0x%x, v_freq = 0x%x\n",  in adv76xx_log_status()
2533 			io_read(sd, 0x01) & 0x0f, io_read(sd, 0x00) & 0x3f,  in adv76xx_log_status()
2534 			(io_read(sd, 0x01) & 0x70) >> 4);  in adv76xx_log_status()
2536 	v4l2_info(sd, "-----Video Timings-----\n");  in adv76xx_log_status()
2537 	if (read_stdi(sd, &stdi))  in adv76xx_log_status()
2538 		v4l2_info(sd, "STDI: not locked\n");  in adv76xx_log_status()
2540 …v4l2_info(sd, "STDI: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, %s, %chsync, %cvsync…  in adv76xx_log_status()
2544 	if (adv76xx_query_dv_timings(sd, &timings))  in adv76xx_log_status()
2545 		v4l2_info(sd, "No video detected\n");  in adv76xx_log_status()
2547 		v4l2_print_dv_timings(sd->name, "Detected format: ",  in adv76xx_log_status()
2549 	v4l2_print_dv_timings(sd->name, "Configured format: ",  in adv76xx_log_status()
2550 			      &state->timings, true);  in adv76xx_log_status()
2552 	if (no_signal(sd))  in adv76xx_log_status()
2555 	v4l2_info(sd, "-----Color space-----\n");  in adv76xx_log_status()
2556 	v4l2_info(sd, "RGB quantization range ctrl: %s\n",  in adv76xx_log_status()
2557 			rgb_quantization_range_txt[state->rgb_quantization_range]);  in adv76xx_log_status()
2558 	v4l2_info(sd, "Input color space: %s\n",  in adv76xx_log_status()
2560 	v4l2_info(sd, "Output color space: %s %s, alt-gamma %s\n",  in adv76xx_log_status()
2563 				"(16-235)" : "(0-255)",  in adv76xx_log_status()
2565 	v4l2_info(sd, "Color space conversion: %s\n",  in adv76xx_log_status()
2566 			csc_coeff_sel_rb[cp_read(sd, info->cp_csc) >> 4]);  in adv76xx_log_status()
2568 	if (!is_digital_input(sd))  in adv76xx_log_status()
2571 	v4l2_info(sd, "-----%s status-----\n", is_hdmi(sd) ? "HDMI" : "DVI-D");  in adv76xx_log_status()
2572 	v4l2_info(sd, "Digital video port selected: %c\n",  in adv76xx_log_status()
2573 			(hdmi_read(sd, 0x00) & 0x03) + 'A');  in adv76xx_log_status()
2574 	v4l2_info(sd, "HDCP encrypted content: %s\n",  in adv76xx_log_status()
2575 			(hdmi_read(sd, 0x05) & 0x40) ? "true" : "false");  in adv76xx_log_status()
2576 	v4l2_info(sd, "HDCP keys read: %s%s\n",  in adv76xx_log_status()
2577 			(hdmi_read(sd, 0x04) & 0x20) ? "yes" : "no",  in adv76xx_log_status()
2578 			(hdmi_read(sd, 0x04) & 0x10) ? "ERROR" : "");  in adv76xx_log_status()
2579 	if (is_hdmi(sd)) {  in adv76xx_log_status()
2580 		bool audio_pll_locked = hdmi_read(sd, 0x04) & 0x01;  in adv76xx_log_status()
2581 		bool audio_sample_packet_detect = hdmi_read(sd, 0x18) & 0x01;  in adv76xx_log_status()
2582 		bool audio_mute = io_read(sd, 0x65) & 0x40;  in adv76xx_log_status()
2584 		v4l2_info(sd, "Audio: pll %s, samples %s, %s\n",  in adv76xx_log_status()
2589 			v4l2_info(sd, "Audio format: %s\n",  in adv76xx_log_status()
2590 					(hdmi_read(sd, 0x07) & 0x20) ? "multi-channel" : "stereo");  in adv76xx_log_status()
2592 		v4l2_info(sd, "Audio CTS: %u\n", (hdmi_read(sd, 0x5b) << 12) +  in adv76xx_log_status()
2593 				(hdmi_read(sd, 0x5c) << 8) +  in adv76xx_log_status()
2594 				(hdmi_read(sd, 0x5d) & 0xf0));  in adv76xx_log_status()
2595 		v4l2_info(sd, "Audio N: %u\n", ((hdmi_read(sd, 0x5d) & 0x0f) << 16) +  in adv76xx_log_status()
2596 				(hdmi_read(sd, 0x5e) << 8) +  in adv76xx_log_status()
2597 				hdmi_read(sd, 0x5f));  in adv76xx_log_status()
2598 		v4l2_info(sd, "AV Mute: %s\n", (hdmi_read(sd, 0x04) & 0x40) ? "on" : "off");  in adv76xx_log_status()
2600 		v4l2_info(sd, "Deep color mode: %s\n", deep_color_mode_txt[(hdmi_read(sd, 0x0b) & 0x60) >> 5]);  in adv76xx_log_status()
2601 		v4l2_info(sd, "HDMI colorspace: %s\n", hdmi_color_space_txt[hdmi_read(sd, 0x53) & 0xf]);  in adv76xx_log_status()
2603 		adv76xx_log_infoframes(sd);  in adv76xx_log_status()
2609 static int adv76xx_subscribe_event(struct v4l2_subdev *sd,  in adv76xx_subscribe_event()  argument
2613 	switch (sub->type) {  in adv76xx_subscribe_event()
2615 		return v4l2_src_change_event_subdev_subscribe(sd, fh, sub);  in adv76xx_subscribe_event()
2617 		return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub);  in adv76xx_subscribe_event()
2619 		return -EINVAL;  in adv76xx_subscribe_event()
2623 static int adv76xx_registered(struct v4l2_subdev *sd)  in adv76xx_registered()  argument
2625 	struct adv76xx_state *state = to_state(sd);  in adv76xx_registered()
2626 	struct i2c_client *client = v4l2_get_subdevdata(sd);  in adv76xx_registered()
2629 	err = cec_register_adapter(state->cec_adap, &client->dev);  in adv76xx_registered()
2631 		cec_delete_adapter(state->cec_adap);  in adv76xx_registered()
2635 static void adv76xx_unregistered(struct v4l2_subdev *sd)  in adv76xx_unregistered()  argument
2637 	struct adv76xx_state *state = to_state(sd);  in adv76xx_unregistered()
2639 	cec_unregister_adapter(state->cec_adap);  in adv76xx_unregistered()
2642 /* ----------------------------------------------------------------------- */
2690 /* -------------------------- custom ctrls ---------------------------------- */
2725 /* ----------------------------------------------------------------------- */
2748 static int adv76xx_core_init(struct v4l2_subdev *sd)  in adv76xx_core_init()  argument
2750 	struct adv76xx_state *state = to_state(sd);  in adv76xx_core_init()
2751 	const struct adv76xx_chip_info *info = state->info;  in adv76xx_core_init()
2752 	struct adv76xx_platform_data *pdata = &state->pdata;  in adv76xx_core_init()
2754 	hdmi_write(sd, 0x48,  in adv76xx_core_init()
2755 		(pdata->disable_pwrdnb ? 0x80 : 0) |  in adv76xx_core_init()
2756 		(pdata->disable_cable_det_rst ? 0x40 : 0));  in adv76xx_core_init()
2758 	disable_input(sd);  in adv76xx_core_init()
2760 	if (pdata->default_input >= 0 &&  in adv76xx_core_init()
2761 	    pdata->default_input < state->source_pad) {  in adv76xx_core_init()
2762 		state->selected_input = pdata->default_input;  in adv76xx_core_init()
2763 		select_input(sd);  in adv76xx_core_init()
2764 		enable_input(sd);  in adv76xx_core_init()
2768 	io_write(sd, 0x0c, 0x42);   /* Power up part and power down VDP */  in adv76xx_core_init()
2769 	io_write(sd, 0x0b, 0x44);   /* Power down ESDP block */  in adv76xx_core_init()
2770 	cp_write(sd, 0xcf, 0x01);   /* Power down macrovision */  in adv76xx_core_init()
2773 	io_write_clr_set(sd, 0x02, 0x0f, pdata->alt_gamma << 3);  in adv76xx_core_init()
2774 	io_write_clr_set(sd, 0x05, 0x0e, pdata->blank_data << 3 |  in adv76xx_core_init()
2775 			pdata->insert_av_codes << 2 |  in adv76xx_core_init()
2776 			pdata->replicate_av_codes << 1);  in adv76xx_core_init()
2779 	cp_write(sd, 0x69, 0x30);   /* Enable CP CSC */  in adv76xx_core_init()
2782 	io_write(sd, 0x06, 0xa0 | pdata->inv_vs_pol << 2 |  in adv76xx_core_init()
2783 		 pdata->inv_hs_pol << 1 | pdata->inv_llc_pol);  in adv76xx_core_init()
2786 	io_write(sd, 0x14, 0x40 | pdata->dr_str_data << 4 |  in adv76xx_core_init()
2787 				pdata->dr_str_clk << 2 |  in adv76xx_core_init()
2788 				pdata->dr_str_sync);  in adv76xx_core_init()
2790 	cp_write(sd, 0xba, (pdata->hdmi_free_run_mode << 1) | 0x01); /* HDMI free run */  in adv76xx_core_init()
2791 	cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */  in adv76xx_core_init()
2792 	cp_write(sd, 0xf9, 0x23); /*  STDI ch. 1 - LCVS change threshold -  in adv76xx_core_init()
2794 	cp_write(sd, 0x45, 0x23); /*  STDI ch. 2 - LCVS change threshold -  in adv76xx_core_init()
2796 	cp_write(sd, 0xc9, 0x2d); /* use prim_mode and vid_std as free run resolution  in adv76xx_core_init()
2800 	hdmi_write_clr_set(sd, 0x15, 0x03, 0x03); /* Mute on FIFO over-/underflow [REF_01, c. 1.2.18] */  in adv76xx_core_init()
2801 	hdmi_write_clr_set(sd, 0x1a, 0x0e, 0x08); /* Wait 1 s before unmute */  in adv76xx_core_init()
2802 	hdmi_write_clr_set(sd, 0x68, 0x06, 0x06); /* FIFO reset on over-/underflow [REF_01, c. 1.2.19] */  in adv76xx_core_init()
2805 	afe_write(sd, 0xb5, 0x01);  /* Setting MCLK to 256Fs */  in adv76xx_core_init()
2808 		afe_write(sd, 0x02, pdata->ain_sel); /* Select analog input muxing mode */  in adv76xx_core_init()
2809 		io_write_clr_set(sd, 0x30, 1 << 4, pdata->output_bus_lsb_to_msb << 4);  in adv76xx_core_init()
2813 	io_write(sd, 0x40, 0xc0 | pdata->int1_config); /* Configure INT1 */  in adv76xx_core_init()
2814 	io_write(sd, 0x46, 0x98); /* Enable SSPD, STDI and CP unlocked interrupts */  in adv76xx_core_init()
2815 …io_write(sd, 0x6e, info->fmt_change_digital_mask); /* Enable V_LOCKED and DE_REGEN_LCK interrupts …  in adv76xx_core_init()
2816 	io_write(sd, 0x73, info->cable_det_mask); /* Enable cable detection (+5v) interrupts */  in adv76xx_core_init()
2817 	info->setup_irqs(sd);  in adv76xx_core_init()
2819 	return v4l2_ctrl_handler_setup(sd->ctrl_handler);  in adv76xx_core_init()
2822 static void adv7604_setup_irqs(struct v4l2_subdev *sd)  in adv7604_setup_irqs()  argument
2824 	io_write(sd, 0x41, 0xd7); /* STDI irq for any change, disable INT2 */  in adv7604_setup_irqs()
2827 static void adv7611_setup_irqs(struct v4l2_subdev *sd)  in adv7611_setup_irqs()  argument
2829 	io_write(sd, 0x41, 0xd0); /* STDI irq for any change, disable INT2 */  in adv7611_setup_irqs()
2832 static void adv7612_setup_irqs(struct v4l2_subdev *sd)  in adv7612_setup_irqs()  argument
2834 	io_write(sd, 0x41, 0xd0); /* disable INT2 */  in adv7612_setup_irqs()
2841 	for (i = 1; i < ARRAY_SIZE(state->i2c_clients); ++i) {  in adv76xx_unregister_clients()
2842 		if (state->i2c_clients[i])  in adv76xx_unregister_clients()
2843 			i2c_unregister_device(state->i2c_clients[i]);  in adv76xx_unregister_clients()
2847 static struct i2c_client *adv76xx_dummy_client(struct v4l2_subdev *sd,  in adv76xx_dummy_client()  argument
2850 	struct i2c_client *client = v4l2_get_subdevdata(sd);  in adv76xx_dummy_client()
2851 	struct adv76xx_state *state = to_state(sd);  in adv76xx_dummy_client()
2852 	struct adv76xx_platform_data *pdata = &state->pdata;  in adv76xx_dummy_client()
2856 	if (pdata && pdata->i2c_addresses[page])  in adv76xx_dummy_client()
2857 		new_client = i2c_new_dummy(client->adapter,  in adv76xx_dummy_client()
2858 					   pdata->i2c_addresses[page]);  in adv76xx_dummy_client()
2865 		io_write(sd, io_reg, new_client->addr << 1);  in adv76xx_dummy_client()
2875 	{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x00 }, /* DDC bus active pull-up control */
2890 	{ ADV76XX_REG(ADV76XX_PAGE_CP, 0x3e), 0x04 }, /* CP core pre-gain control */
2892 	{ ADV76XX_REG(ADV76XX_PAGE_CP, 0x40), 0x5c }, /* CP core pre-gain control. Graphics mode */
2901 	{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x10 }, /* DDC bus active pull-up control */
3105 	np = state->i2c_clients[ADV76XX_PAGE_IO]->dev.of_node;  in adv76xx_parse_dt()
3110 		return -EINVAL;  in adv76xx_parse_dt()
3117 	if (!of_property_read_u32(np, "default-input", &v))  in adv76xx_parse_dt()
3118 		state->pdata.default_input = v;  in adv76xx_parse_dt()
3120 		state->pdata.default_input = -1;  in adv76xx_parse_dt()
3125 		state->pdata.inv_hs_pol = 1;  in adv76xx_parse_dt()
3128 		state->pdata.inv_vs_pol = 1;  in adv76xx_parse_dt()
3131 		state->pdata.inv_llc_pol = 1;  in adv76xx_parse_dt()
3134 		state->pdata.insert_av_codes = 1;  in adv76xx_parse_dt()
3136 	/* Disable the interrupt for now as no DT-based board uses it. */  in adv76xx_parse_dt()
3137 	state->pdata.int1_config = ADV76XX_INT1_CONFIG_DISABLED;  in adv76xx_parse_dt()
3140 	state->pdata.disable_pwrdnb = 0;  in adv76xx_parse_dt()
3141 	state->pdata.disable_cable_det_rst = 0;  in adv76xx_parse_dt()
3142 	state->pdata.blank_data = 1;  in adv76xx_parse_dt()
3143 	state->pdata.op_format_mode_sel = ADV7604_OP_FORMAT_MODE0;  in adv76xx_parse_dt()
3144 	state->pdata.bus_order = ADV7604_BUS_ORDER_RGB;  in adv76xx_parse_dt()
3145 	state->pdata.dr_str_data = ADV76XX_DR_STR_MEDIUM_HIGH;  in adv76xx_parse_dt()
3146 	state->pdata.dr_str_clk = ADV76XX_DR_STR_MEDIUM_HIGH;  in adv76xx_parse_dt()
3147 	state->pdata.dr_str_sync = ADV76XX_DR_STR_MEDIUM_HIGH;  in adv76xx_parse_dt()
3264 	if (!state->i2c_clients[region])  in configure_regmap()
3265 		return -ENODEV;  in configure_regmap()
3267 	state->regmap[region] =  in configure_regmap()
3268 		devm_regmap_init_i2c(state->i2c_clients[region],  in configure_regmap()
3271 	if (IS_ERR(state->regmap[region])) {  in configure_regmap()
3272 		err = PTR_ERR(state->regmap[region]);  in configure_regmap()
3273 		v4l_err(state->i2c_clients[region],  in configure_regmap()
3276 		return -EINVAL;  in configure_regmap()
3288 		if (err && (err != -ENODEV))  in configure_regmaps()
3296 	if (state->reset_gpio) {  in adv76xx_reset()
3298 		gpiod_set_value_cansleep(state->reset_gpio, 0);  in adv76xx_reset()
3300 		gpiod_set_value_cansleep(state->reset_gpio, 1);  in adv76xx_reset()
3315 	struct v4l2_subdev *sd;  in adv76xx_probe()  local
3321 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))  in adv76xx_probe()
3322 		return -EIO;  in adv76xx_probe()
3324 			client->addr << 1);  in adv76xx_probe()
3326 	state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);  in adv76xx_probe()
3328 		return -ENOMEM;  in adv76xx_probe()
3330 	state->i2c_clients[ADV76XX_PAGE_IO] = client;  in adv76xx_probe()
3333 	state->restart_stdi_once = true;  in adv76xx_probe()
3334 	state->selected_input = ~0;  in adv76xx_probe()
3336 	if (IS_ENABLED(CONFIG_OF) && client->dev.of_node) {  in adv76xx_probe()
3339 		oid = of_match_node(adv76xx_of_id, client->dev.of_node);  in adv76xx_probe()
3340 		state->info = oid->data;  in adv76xx_probe()
3347 	} else if (client->dev.platform_data) {  in adv76xx_probe()
3348 		struct adv76xx_platform_data *pdata = client->dev.platform_data;  in adv76xx_probe()
3350 		state->info = (const struct adv76xx_chip_info *)id->driver_data;  in adv76xx_probe()
3351 		state->pdata = *pdata;  in adv76xx_probe()
3353 		v4l_err(client, "No platform data!\n");  in adv76xx_probe()
3354 		return -ENODEV;  in adv76xx_probe()
3358 	for (i = 0; i < state->info->num_dv_ports; ++i) {  in adv76xx_probe()
3359 		state->hpd_gpio[i] =  in adv76xx_probe()
3360 			devm_gpiod_get_index_optional(&client->dev, "hpd", i,  in adv76xx_probe()
3362 		if (IS_ERR(state->hpd_gpio[i]))  in adv76xx_probe()
3363 			return PTR_ERR(state->hpd_gpio[i]);  in adv76xx_probe()
3365 		if (state->hpd_gpio[i])  in adv76xx_probe()
3368 	state->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",  in adv76xx_probe()
3370 	if (IS_ERR(state->reset_gpio))  in adv76xx_probe()
3371 		return PTR_ERR(state->reset_gpio);  in adv76xx_probe()
3375 	state->timings = cea640x480;  in adv76xx_probe()
3376 	state->format = adv76xx_format_info(state, MEDIA_BUS_FMT_YUYV8_2X8);  in adv76xx_probe()
3378 	sd = &state->sd;  in adv76xx_probe()
3379 	v4l2_i2c_subdev_init(sd, client, &adv76xx_ops);  in adv76xx_probe()
3380 	snprintf(sd->name, sizeof(sd->name), "%s %d-%04x",  in adv76xx_probe()
3381 		id->name, i2c_adapter_id(client->adapter),  in adv76xx_probe()
3382 		client->addr);  in adv76xx_probe()
3383 	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;  in adv76xx_probe()
3384 	sd->internal_ops = &adv76xx_int_ops;  in adv76xx_probe()
3390 		v4l2_err(sd, "Error configuring IO regmap region\n");  in adv76xx_probe()
3391 		return -ENODEV;  in adv76xx_probe()
3399 	switch (state->info->type) {  in adv76xx_probe()
3401 		err = regmap_read(state->regmap[ADV76XX_PAGE_IO], 0xfb, &val);  in adv76xx_probe()
3403 			v4l2_err(sd, "Error %d reading IO Regmap\n", err);  in adv76xx_probe()
3404 			return -ENODEV;  in adv76xx_probe()
3407 			v4l2_err(sd, "not an adv7604 on address 0x%x\n",  in adv76xx_probe()
3408 					client->addr << 1);  in adv76xx_probe()
3409 			return -ENODEV;  in adv76xx_probe()
3414 		err = regmap_read(state->regmap[ADV76XX_PAGE_IO],  in adv76xx_probe()
3418 			v4l2_err(sd, "Error %d reading IO Regmap\n", err);  in adv76xx_probe()
3419 			return -ENODEV;  in adv76xx_probe()
3422 		err = regmap_read(state->regmap[ADV76XX_PAGE_IO],  in adv76xx_probe()
3426 			v4l2_err(sd, "Error %d reading IO Regmap\n", err);  in adv76xx_probe()
3427 			return -ENODEV;  in adv76xx_probe()
3430 		if ((state->info->type == ADV7611 && val != 0x2051) ||  in adv76xx_probe()
3431 			(state->info->type == ADV7612 && val != 0x2041)) {  in adv76xx_probe()
3432 			v4l2_err(sd, "not an adv761x on address 0x%x\n",  in adv76xx_probe()
3433 					client->addr << 1);  in adv76xx_probe()
3434 			return -ENODEV;  in adv76xx_probe()
3440 	hdl = &state->hdl;  in adv76xx_probe()
3444 			V4L2_CID_BRIGHTNESS, -128, 127, 1, 0);  in adv76xx_probe()
3455 		ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;  in adv76xx_probe()
3457 	state->detect_tx_5v_ctrl = v4l2_ctrl_new_std(hdl, NULL,  in adv76xx_probe()
3459 			(1 << state->info->num_dv_ports) - 1, 0, 0);  in adv76xx_probe()
3460 	state->rgb_quantization_range_ctrl =  in adv76xx_probe()
3467 		state->analog_sampling_phase_ctrl =  in adv76xx_probe()
3469 	state->free_run_color_manual_ctrl =  in adv76xx_probe()
3471 	state->free_run_color_ctrl =  in adv76xx_probe()
3474 	sd->ctrl_handler = hdl;  in adv76xx_probe()
3475 	if (hdl->error) {  in adv76xx_probe()
3476 		err = hdl->error;  in adv76xx_probe()
3479 	if (adv76xx_s_detect_tx_5v_ctrl(sd)) {  in adv76xx_probe()
3480 		err = -ENODEV;  in adv76xx_probe()
3485 		if (!(BIT(i) & state->info->page_mask))  in adv76xx_probe()
3488 		state->i2c_clients[i] = adv76xx_dummy_client(sd, i);  in adv76xx_probe()
3489 		if (!state->i2c_clients[i]) {  in adv76xx_probe()
3490 			err = -EINVAL;  in adv76xx_probe()
3491 			v4l2_err(sd, "failed to create i2c client %u\n", i);  in adv76xx_probe()
3496 	INIT_DELAYED_WORK(&state->delayed_work_enable_hotplug,  in adv76xx_probe()
3499 	state->source_pad = state->info->num_dv_ports  in adv76xx_probe()
3500 			  + (state->info->has_afe ? 2 : 0);  in adv76xx_probe()
3501 	for (i = 0; i < state->source_pad; ++i)  in adv76xx_probe()
3502 		state->pads[i].flags = MEDIA_PAD_FL_SINK;  in adv76xx_probe()
3503 	state->pads[state->source_pad].flags = MEDIA_PAD_FL_SOURCE;  in adv76xx_probe()
3504 	sd->entity.function = MEDIA_ENT_F_DV_DECODER;  in adv76xx_probe()
3506 	err = media_entity_pads_init(&sd->entity, state->source_pad + 1,  in adv76xx_probe()
3507 				state->pads);  in adv76xx_probe()
3516 	err = adv76xx_core_init(sd);  in adv76xx_probe()
3521 	state->cec_adap = cec_allocate_adapter(&adv76xx_cec_adap_ops,  in adv76xx_probe()
3522 		state, dev_name(&client->dev),  in adv76xx_probe()
3524 	err = PTR_ERR_OR_ZERO(state->cec_adap);  in adv76xx_probe()
3529 	v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,  in adv76xx_probe()
3530 			client->addr << 1, client->adapter->name);  in adv76xx_probe()
3532 	err = v4l2_async_register_subdev(sd);  in adv76xx_probe()
3539 	media_entity_cleanup(&sd->entity);  in adv76xx_probe()
3541 	cancel_delayed_work(&state->delayed_work_enable_hotplug);  in adv76xx_probe()
3549 /* ----------------------------------------------------------------------- */
3553 	struct v4l2_subdev *sd = i2c_get_clientdata(client);  in adv76xx_remove()  local
3554 	struct adv76xx_state *state = to_state(sd);  in adv76xx_remove()
3557 	io_write(sd, 0x40, 0);  in adv76xx_remove()
3558 	io_write(sd, 0x41, 0);  in adv76xx_remove()
3559 	io_write(sd, 0x46, 0);  in adv76xx_remove()
3560 	io_write(sd, 0x6e, 0);  in adv76xx_remove()
3561 	io_write(sd, 0x73, 0);  in adv76xx_remove()
3563 	cancel_delayed_work(&state->delayed_work_enable_hotplug);  in adv76xx_remove()
3564 	v4l2_async_unregister_subdev(sd);  in adv76xx_remove()
3565 	media_entity_cleanup(&sd->entity);  in adv76xx_remove()
3566 	adv76xx_unregister_clients(to_state(sd));  in adv76xx_remove()
3567 	v4l2_ctrl_handler_free(sd->ctrl_handler);  in adv76xx_remove()
3571 /* ----------------------------------------------------------------------- */