Lines Matching full:is
2 * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver
9 * This program is free software; you can redistribute it and/or modify
37 #include "fimc-is.h"
38 #include "fimc-is-command.h"
39 #include "fimc-is-errno.h"
40 #include "fimc-is-i2c.h"
41 #include "fimc-is-param.h"
42 #include "fimc-is-regs.h"
69 static void fimc_is_put_clocks(struct fimc_is *is) in fimc_is_put_clocks() argument
74 if (IS_ERR(is->clocks[i])) in fimc_is_put_clocks()
76 clk_put(is->clocks[i]); in fimc_is_put_clocks()
77 is->clocks[i] = ERR_PTR(-EINVAL); in fimc_is_put_clocks()
81 static int fimc_is_get_clocks(struct fimc_is *is) in fimc_is_get_clocks() argument
86 is->clocks[i] = ERR_PTR(-EINVAL); in fimc_is_get_clocks()
89 is->clocks[i] = clk_get(&is->pdev->dev, fimc_is_clocks[i]); in fimc_is_get_clocks()
90 if (IS_ERR(is->clocks[i])) { in fimc_is_get_clocks()
91 ret = PTR_ERR(is->clocks[i]); in fimc_is_get_clocks()
98 fimc_is_put_clocks(is); in fimc_is_get_clocks()
99 dev_err(&is->pdev->dev, "failed to get clock: %s\n", in fimc_is_get_clocks()
104 static int fimc_is_setup_clocks(struct fimc_is *is) in fimc_is_setup_clocks() argument
108 ret = clk_set_parent(is->clocks[ISS_CLK_ACLK200], in fimc_is_setup_clocks()
109 is->clocks[ISS_CLK_ACLK200_DIV]); in fimc_is_setup_clocks()
113 ret = clk_set_parent(is->clocks[ISS_CLK_ACLK400MCUISP], in fimc_is_setup_clocks()
114 is->clocks[ISS_CLK_ACLK400MCUISP_DIV]); in fimc_is_setup_clocks()
118 ret = clk_set_rate(is->clocks[ISS_CLK_ISP_DIV0], ACLK_AXI_FREQUENCY); in fimc_is_setup_clocks()
122 ret = clk_set_rate(is->clocks[ISS_CLK_ISP_DIV1], ACLK_AXI_FREQUENCY); in fimc_is_setup_clocks()
126 ret = clk_set_rate(is->clocks[ISS_CLK_MCUISP_DIV0], in fimc_is_setup_clocks()
131 return clk_set_rate(is->clocks[ISS_CLK_MCUISP_DIV1], in fimc_is_setup_clocks()
135 static int fimc_is_enable_clocks(struct fimc_is *is) in fimc_is_enable_clocks() argument
140 if (IS_ERR(is->clocks[i])) in fimc_is_enable_clocks()
142 ret = clk_prepare_enable(is->clocks[i]); in fimc_is_enable_clocks()
144 dev_err(&is->pdev->dev, "clock %s enable failed\n", in fimc_is_enable_clocks()
147 clk_disable(is->clocks[i]); in fimc_is_enable_clocks()
155 static void fimc_is_disable_clocks(struct fimc_is *is) in fimc_is_disable_clocks() argument
160 if (!IS_ERR(is->clocks[i])) { in fimc_is_disable_clocks()
161 clk_disable_unprepare(is->clocks[i]); in fimc_is_disable_clocks()
167 static int fimc_is_parse_sensor_config(struct fimc_is *is, unsigned int index, in fimc_is_parse_sensor_config() argument
170 struct fimc_is_sensor *sensor = &is->sensor[index]; in fimc_is_parse_sensor_config()
177 dev_err(&is->pdev->dev, "no driver data found for: %pOF\n", in fimc_is_parse_sensor_config()
194 dev_err(&is->pdev->dev, "reg property not found at: %pOF\n", in fimc_is_parse_sensor_config()
205 static int fimc_is_register_subdevs(struct fimc_is *is) in fimc_is_register_subdevs() argument
210 ret = fimc_isp_subdev_create(&is->isp); in fimc_is_register_subdevs()
216 ret = fimc_is_parse_sensor_config(is, index, child); in fimc_is_register_subdevs()
228 static int fimc_is_unregister_subdevs(struct fimc_is *is) in fimc_is_unregister_subdevs() argument
230 fimc_isp_subdev_destroy(&is->isp); in fimc_is_unregister_subdevs()
234 static int fimc_is_load_setfile(struct fimc_is *is, char *file_name) in fimc_is_load_setfile() argument
240 ret = request_firmware(&fw, file_name, &is->pdev->dev); in fimc_is_load_setfile()
242 dev_err(&is->pdev->dev, "firmware request failed (%d)\n", ret); in fimc_is_load_setfile()
245 buf = is->memory.vaddr + is->setfile.base; in fimc_is_load_setfile()
248 is->setfile.size = fw->size; in fimc_is_load_setfile()
250 pr_debug("mem vaddr: %p, setfile buf: %p\n", is->memory.vaddr, buf); in fimc_is_load_setfile()
252 memcpy(is->fw.setfile_info, in fimc_is_load_setfile()
256 is->fw.setfile_info[FIMC_IS_SETFILE_INFO_LEN - 1] = '\0'; in fimc_is_load_setfile()
257 is->setfile.state = 1; in fimc_is_load_setfile()
259 pr_debug("FIMC-IS setfile loaded: base: %#x, size: %zu B\n", in fimc_is_load_setfile()
260 is->setfile.base, fw->size); in fimc_is_load_setfile()
266 int fimc_is_cpu_set_power(struct fimc_is *is, int on) in fimc_is_cpu_set_power() argument
272 mcuctl_write(0, is, REG_WDT_ISP); in fimc_is_cpu_set_power()
275 mcuctl_write(is->memory.paddr, is, MCUCTL_REG_BBOAR); in fimc_is_cpu_set_power()
278 pmuisp_write(0x18000, is, REG_PMU_ISP_ARM_OPTION); in fimc_is_cpu_set_power()
279 pmuisp_write(0x1, is, REG_PMU_ISP_ARM_CONFIGURATION); in fimc_is_cpu_set_power()
282 pmuisp_write(0x10000, is, REG_PMU_ISP_ARM_OPTION); in fimc_is_cpu_set_power()
283 pmuisp_write(0x0, is, REG_PMU_ISP_ARM_CONFIGURATION); in fimc_is_cpu_set_power()
285 while (pmuisp_read(is, REG_PMU_ISP_ARM_STATUS) & 1) { in fimc_is_cpu_set_power()
296 /* Wait until @bit of @is->state is set to @state in the interrupt handler. */
297 int fimc_is_wait_event(struct fimc_is *is, unsigned long bit, in fimc_is_wait_event() argument
301 int ret = wait_event_timeout(is->irq_queue, in fimc_is_wait_event()
302 !state ^ test_bit(bit, &is->state), in fimc_is_wait_event()
305 dev_WARN(&is->pdev->dev, "%s() timed out\n", __func__); in fimc_is_wait_event()
311 int fimc_is_start_firmware(struct fimc_is *is) in fimc_is_start_firmware() argument
313 struct device *dev = &is->pdev->dev; in fimc_is_start_firmware()
316 if (is->fw.f_w == NULL) { in fimc_is_start_firmware()
317 dev_err(dev, "firmware is not loaded\n"); in fimc_is_start_firmware()
321 memcpy(is->memory.vaddr, is->fw.f_w->data, is->fw.f_w->size); in fimc_is_start_firmware()
324 ret = fimc_is_cpu_set_power(is, 1); in fimc_is_start_firmware()
328 ret = fimc_is_wait_event(is, IS_ST_A5_PWR_ON, 1, in fimc_is_start_firmware()
331 dev_err(dev, "FIMC-IS CPU power on failed\n"); in fimc_is_start_firmware()
336 /* Allocate working memory for the FIMC-IS CPU. */
337 static int fimc_is_alloc_cpu_memory(struct fimc_is *is) in fimc_is_alloc_cpu_memory() argument
339 struct device *dev = &is->pdev->dev; in fimc_is_alloc_cpu_memory()
341 is->memory.vaddr = dma_alloc_coherent(dev, FIMC_IS_CPU_MEM_SIZE, in fimc_is_alloc_cpu_memory()
342 &is->memory.paddr, GFP_KERNEL); in fimc_is_alloc_cpu_memory()
343 if (is->memory.vaddr == NULL) in fimc_is_alloc_cpu_memory()
346 is->memory.size = FIMC_IS_CPU_MEM_SIZE; in fimc_is_alloc_cpu_memory()
347 memset(is->memory.vaddr, 0, is->memory.size); in fimc_is_alloc_cpu_memory()
349 dev_info(dev, "FIMC-IS CPU memory base: %#x\n", (u32)is->memory.paddr); in fimc_is_alloc_cpu_memory()
351 if (((u32)is->memory.paddr) & FIMC_IS_FW_ADDR_MASK) { in fimc_is_alloc_cpu_memory()
353 (u32)is->memory.paddr); in fimc_is_alloc_cpu_memory()
354 dma_free_coherent(dev, is->memory.size, is->memory.vaddr, in fimc_is_alloc_cpu_memory()
355 is->memory.paddr); in fimc_is_alloc_cpu_memory()
359 is->is_p_region = (struct is_region *)(is->memory.vaddr + in fimc_is_alloc_cpu_memory()
362 is->is_dma_p_region = is->memory.paddr + in fimc_is_alloc_cpu_memory()
365 is->is_shared_region = (struct is_share_region *)(is->memory.vaddr + in fimc_is_alloc_cpu_memory()
370 static void fimc_is_free_cpu_memory(struct fimc_is *is) in fimc_is_free_cpu_memory() argument
372 struct device *dev = &is->pdev->dev; in fimc_is_free_cpu_memory()
374 if (is->memory.vaddr == NULL) in fimc_is_free_cpu_memory()
377 dma_free_coherent(dev, is->memory.size, is->memory.vaddr, in fimc_is_free_cpu_memory()
378 is->memory.paddr); in fimc_is_free_cpu_memory()
383 struct fimc_is *is = context; in fimc_is_load_firmware() local
384 struct device *dev = &is->pdev->dev; in fimc_is_load_firmware()
392 mutex_lock(&is->lock); in fimc_is_load_firmware()
399 is->fw.size = fw->size; in fimc_is_load_firmware()
401 ret = fimc_is_alloc_cpu_memory(is); in fimc_is_load_firmware()
403 dev_err(dev, "failed to allocate FIMC-IS CPU memory\n"); in fimc_is_load_firmware()
407 memcpy(is->memory.vaddr, fw->data, fw->size); in fimc_is_load_firmware()
411 buf = (void *)(is->memory.vaddr + fw->size - FIMC_IS_FW_DESC_LEN); in fimc_is_load_firmware()
412 memcpy(&is->fw.info, buf, FIMC_IS_FW_INFO_LEN); in fimc_is_load_firmware()
413 is->fw.info[FIMC_IS_FW_INFO_LEN] = 0; in fimc_is_load_firmware()
415 buf = (void *)(is->memory.vaddr + fw->size - FIMC_IS_FW_VER_LEN); in fimc_is_load_firmware()
416 memcpy(&is->fw.version, buf, FIMC_IS_FW_VER_LEN); in fimc_is_load_firmware()
417 is->fw.version[FIMC_IS_FW_VER_LEN - 1] = 0; in fimc_is_load_firmware()
419 is->fw.state = 1; in fimc_is_load_firmware()
422 is->fw.info, is->fw.version); in fimc_is_load_firmware()
423 dev_dbg(dev, "FW size: %zu, paddr: %pad\n", fw->size, &is->memory.paddr); in fimc_is_load_firmware()
425 is->is_shared_region->chip_id = 0xe4412; in fimc_is_load_firmware()
426 is->is_shared_region->chip_rev_no = 1; in fimc_is_load_firmware()
431 * FIXME: The firmware is not being released for now, as it is in fimc_is_load_firmware()
432 * needed around for copying to the IS working memory every in fimc_is_load_firmware()
433 * time before the Cortex-A5 is restarted. in fimc_is_load_firmware()
435 release_firmware(is->fw.f_w); in fimc_is_load_firmware()
436 is->fw.f_w = fw; in fimc_is_load_firmware()
438 mutex_unlock(&is->lock); in fimc_is_load_firmware()
441 static int fimc_is_request_firmware(struct fimc_is *is, const char *fw_name) in fimc_is_request_firmware() argument
444 FW_ACTION_HOTPLUG, fw_name, &is->pdev->dev, in fimc_is_request_firmware()
445 GFP_KERNEL, is, fimc_is_load_firmware); in fimc_is_request_firmware()
448 /* General IS interrupt handler */
449 static void fimc_is_general_irq_handler(struct fimc_is *is) in fimc_is_general_irq_handler() argument
451 is->i2h_cmd.cmd = mcuctl_read(is, MCUCTL_REG_ISSR(10)); in fimc_is_general_irq_handler()
453 switch (is->i2h_cmd.cmd) { in fimc_is_general_irq_handler()
455 fimc_is_hw_get_params(is, 1); in fimc_is_general_irq_handler()
456 fimc_is_hw_wait_intmsr0_intmsd0(is); in fimc_is_general_irq_handler()
457 fimc_is_hw_set_sensor_num(is); in fimc_is_general_irq_handler()
458 pr_debug("ISP FW version: %#x\n", is->i2h_cmd.args[0]); in fimc_is_general_irq_handler()
462 fimc_is_hw_get_params(is, 2); in fimc_is_general_irq_handler()
467 fimc_is_hw_get_params(is, 3); in fimc_is_general_irq_handler()
470 fimc_is_hw_get_params(is, 4); in fimc_is_general_irq_handler()
475 pr_info("unknown command: %#x\n", is->i2h_cmd.cmd); in fimc_is_general_irq_handler()
478 fimc_is_fw_clear_irq1(is, FIMC_IS_INT_GENERAL); in fimc_is_general_irq_handler()
480 switch (is->i2h_cmd.cmd) { in fimc_is_general_irq_handler()
482 fimc_is_hw_set_intgr0_gd0(is); in fimc_is_general_irq_handler()
483 set_bit(IS_ST_A5_PWR_ON, &is->state); in fimc_is_general_irq_handler()
490 is->fd_header.count = is->i2h_cmd.args[0]; in fimc_is_general_irq_handler()
491 is->fd_header.index = is->i2h_cmd.args[1]; in fimc_is_general_irq_handler()
492 is->fd_header.offset = 0; in fimc_is_general_irq_handler()
499 pr_debug("AA_DONE - %d, %d, %d\n", is->i2h_cmd.args[0], in fimc_is_general_irq_handler()
500 is->i2h_cmd.args[1], is->i2h_cmd.args[2]); in fimc_is_general_irq_handler()
504 pr_debug("ISR_DONE: args[0]: %#x\n", is->i2h_cmd.args[0]); in fimc_is_general_irq_handler()
506 switch (is->i2h_cmd.args[0]) { in fimc_is_general_irq_handler()
509 set_bit(IS_ST_CHANGE_MODE, &is->state); in fimc_is_general_irq_handler()
510 is->isp.cac_margin_x = is->i2h_cmd.args[1]; in fimc_is_general_irq_handler()
511 is->isp.cac_margin_y = is->i2h_cmd.args[2]; in fimc_is_general_irq_handler()
513 is->isp.cac_margin_x, is->isp.cac_margin_y); in fimc_is_general_irq_handler()
517 clear_bit(IS_ST_STREAM_OFF, &is->state); in fimc_is_general_irq_handler()
518 set_bit(IS_ST_STREAM_ON, &is->state); in fimc_is_general_irq_handler()
522 clear_bit(IS_ST_STREAM_ON, &is->state); in fimc_is_general_irq_handler()
523 set_bit(IS_ST_STREAM_OFF, &is->state); in fimc_is_general_irq_handler()
527 is->config[is->config_index].p_region_index[0] = 0; in fimc_is_general_irq_handler()
528 is->config[is->config_index].p_region_index[1] = 0; in fimc_is_general_irq_handler()
529 set_bit(IS_ST_BLOCK_CMD_CLEARED, &is->state); in fimc_is_general_irq_handler()
543 set_bit(IS_ST_OPEN_SENSOR, &is->state); in fimc_is_general_irq_handler()
545 is->i2h_cmd.args[2], is->i2h_cmd.args[1]); in fimc_is_general_irq_handler()
549 clear_bit(IS_ST_OPEN_SENSOR, &is->state); in fimc_is_general_irq_handler()
550 is->sensor_index = 0; in fimc_is_general_irq_handler()
558 clear_bit(IS_ST_PWR_SUBIP_ON, &is->state); in fimc_is_general_irq_handler()
562 is->setfile.base = is->i2h_cmd.args[1]; in fimc_is_general_irq_handler()
563 set_bit(IS_ST_SETFILE_LOADED, &is->state); in fimc_is_general_irq_handler()
567 set_bit(IS_ST_SETFILE_LOADED, &is->state); in fimc_is_general_irq_handler()
573 pr_err("ISR_NDONE: %d: %#x, %s\n", is->i2h_cmd.args[0], in fimc_is_general_irq_handler()
574 is->i2h_cmd.args[1], in fimc_is_general_irq_handler()
575 fimc_is_strerr(is->i2h_cmd.args[1])); in fimc_is_general_irq_handler()
577 if (is->i2h_cmd.args[1] & IS_ERROR_TIME_OUT_FLAG) in fimc_is_general_irq_handler()
580 switch (is->i2h_cmd.args[1]) { in fimc_is_general_irq_handler()
585 switch (is->i2h_cmd.args[0]) { in fimc_is_general_irq_handler()
587 is->config[is->config_index].p_region_index[0] = 0; in fimc_is_general_irq_handler()
588 is->config[is->config_index].p_region_index[1] = 0; in fimc_is_general_irq_handler()
589 set_bit(IS_ST_BLOCK_CMD_CLEARED, &is->state); in fimc_is_general_irq_handler()
595 pr_err("IS control sequence error: Not Ready\n"); in fimc_is_general_irq_handler()
599 wake_up(&is->irq_queue); in fimc_is_general_irq_handler()
604 struct fimc_is *is = priv; in fimc_is_irq_handler() local
608 spin_lock_irqsave(&is->slock, flags); in fimc_is_irq_handler()
609 status = mcuctl_read(is, MCUCTL_REG_INTSR1); in fimc_is_irq_handler()
612 fimc_is_general_irq_handler(is); in fimc_is_irq_handler()
615 fimc_isp_irq_handler(is); in fimc_is_irq_handler()
617 spin_unlock_irqrestore(&is->slock, flags); in fimc_is_irq_handler()
621 static int fimc_is_hw_open_sensor(struct fimc_is *is, in fimc_is_hw_open_sensor() argument
624 struct sensor_open_extended *soe = (void *)&is->is_p_region->shared; in fimc_is_hw_open_sensor()
626 fimc_is_hw_wait_intmsr0_intmsd0(is); in fimc_is_hw_open_sensor()
644 mcuctl_write(HIC_OPEN_SENSOR, is, MCUCTL_REG_ISSR(0)); in fimc_is_hw_open_sensor()
645 mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(1)); in fimc_is_hw_open_sensor()
646 mcuctl_write(sensor->drvdata->id, is, MCUCTL_REG_ISSR(2)); in fimc_is_hw_open_sensor()
647 mcuctl_write(sensor->i2c_bus, is, MCUCTL_REG_ISSR(3)); in fimc_is_hw_open_sensor()
648 mcuctl_write(is->is_dma_p_region, is, MCUCTL_REG_ISSR(4)); in fimc_is_hw_open_sensor()
650 fimc_is_hw_set_intgr0_gd0(is); in fimc_is_hw_open_sensor()
652 return fimc_is_wait_event(is, IS_ST_OPEN_SENSOR, 1, in fimc_is_hw_open_sensor()
657 int fimc_is_hw_initialize(struct fimc_is *is) in fimc_is_hw_initialize() argument
663 struct device *dev = &is->pdev->dev; in fimc_is_hw_initialize()
667 /* Sensor initialization. Only one sensor is currently supported. */ in fimc_is_hw_initialize()
668 ret = fimc_is_hw_open_sensor(is, &is->sensor[0]); in fimc_is_hw_initialize()
673 fimc_is_hw_get_setfile_addr(is); in fimc_is_hw_initialize()
675 ret = fimc_is_wait_event(is, IS_ST_SETFILE_LOADED, 1, in fimc_is_hw_initialize()
681 pr_debug("setfile.base: %#x\n", is->setfile.base); in fimc_is_hw_initialize()
684 fimc_is_load_setfile(is, FIMC_IS_SETFILE_6A3); in fimc_is_hw_initialize()
685 clear_bit(IS_ST_SETFILE_LOADED, &is->state); in fimc_is_hw_initialize()
686 fimc_is_hw_load_setfile(is); in fimc_is_hw_initialize()
687 ret = fimc_is_wait_event(is, IS_ST_SETFILE_LOADED, 1, in fimc_is_hw_initialize()
695 is->setfile.base, is->setfile.size); in fimc_is_hw_initialize()
696 pr_info("FIMC-IS Setfile info: %s\n", is->fw.setfile_info); in fimc_is_hw_initialize()
699 if (is->is_p_region->shared[MAX_SHARED_COUNT - 1] != in fimc_is_hw_initialize()
706 &is->memory.paddr + FIMC_IS_SHARED_REGION_OFFSET, in fimc_is_hw_initialize()
707 &is->is_dma_p_region); in fimc_is_hw_initialize()
709 is->setfile.sub_index = 0; in fimc_is_hw_initialize()
712 fimc_is_hw_stream_off(is); in fimc_is_hw_initialize()
713 ret = fimc_is_wait_event(is, IS_ST_STREAM_OFF, 1, in fimc_is_hw_initialize()
721 prev_id = is->config_index; in fimc_is_hw_initialize()
725 is->config_index = config_ids[i]; in fimc_is_hw_initialize()
726 fimc_is_set_initial_params(is); in fimc_is_hw_initialize()
727 ret = fimc_is_itf_s_param(is, true); in fimc_is_hw_initialize()
729 is->config_index = prev_id; in fimc_is_hw_initialize()
733 is->config_index = prev_id; in fimc_is_hw_initialize()
735 set_bit(IS_ST_INIT_DONE, &is->state); in fimc_is_hw_initialize()
737 is->config_index); in fimc_is_hw_initialize()
743 struct fimc_is *is = s->private; in fimc_is_log_show() local
744 const u8 *buf = is->memory.vaddr + FIMC_IS_DEBUG_REGION_OFFSET; in fimc_is_log_show()
746 if (is->memory.vaddr == NULL) { in fimc_is_log_show()
747 dev_err(&is->pdev->dev, "firmware memory is not initialized\n"); in fimc_is_log_show()
767 static void fimc_is_debugfs_remove(struct fimc_is *is) in fimc_is_debugfs_remove() argument
769 debugfs_remove_recursive(is->debugfs_entry); in fimc_is_debugfs_remove()
770 is->debugfs_entry = NULL; in fimc_is_debugfs_remove()
773 static int fimc_is_debugfs_create(struct fimc_is *is) in fimc_is_debugfs_create() argument
777 is->debugfs_entry = debugfs_create_dir("fimc_is", NULL); in fimc_is_debugfs_create()
779 dentry = debugfs_create_file("fw_log", S_IRUGO, is->debugfs_entry, in fimc_is_debugfs_create()
780 is, &fimc_is_debugfs_fops); in fimc_is_debugfs_create()
782 fimc_is_debugfs_remove(is); in fimc_is_debugfs_create()
784 return is->debugfs_entry == NULL ? -EIO : 0; in fimc_is_debugfs_create()
793 struct fimc_is *is; in fimc_is_probe() local
798 is = devm_kzalloc(&pdev->dev, sizeof(*is), GFP_KERNEL); in fimc_is_probe()
799 if (!is) in fimc_is_probe()
802 is->pdev = pdev; in fimc_is_probe()
803 is->isp.pdev = pdev; in fimc_is_probe()
805 init_waitqueue_head(&is->irq_queue); in fimc_is_probe()
806 spin_lock_init(&is->slock); in fimc_is_probe()
807 mutex_init(&is->lock); in fimc_is_probe()
813 is->regs = devm_ioremap_resource(dev, &res); in fimc_is_probe()
814 if (IS_ERR(is->regs)) in fimc_is_probe()
815 return PTR_ERR(is->regs); in fimc_is_probe()
821 is->pmu_regs = of_iomap(node, 0); in fimc_is_probe()
823 if (!is->pmu_regs) in fimc_is_probe()
826 is->irq = irq_of_parse_and_map(dev->of_node, 0); in fimc_is_probe()
827 if (!is->irq) { in fimc_is_probe()
833 ret = fimc_is_get_clocks(is); in fimc_is_probe()
837 platform_set_drvdata(pdev, is); in fimc_is_probe()
839 ret = request_irq(is->irq, fimc_is_irq_handler, 0, dev_name(dev), is); in fimc_is_probe()
863 * Register FIMC-IS V4L2 subdevs to this driver. The video nodes in fimc_is_probe()
866 ret = fimc_is_register_subdevs(is); in fimc_is_probe()
870 ret = fimc_is_debugfs_create(is); in fimc_is_probe()
874 ret = fimc_is_request_firmware(is, FIMC_IS_FW_FILENAME); in fimc_is_probe()
880 dev_dbg(dev, "FIMC-IS registered successfully\n"); in fimc_is_probe()
884 fimc_is_debugfs_remove(is); in fimc_is_probe()
886 fimc_is_unregister_subdevs(is); in fimc_is_probe()
891 free_irq(is->irq, is); in fimc_is_probe()
893 fimc_is_put_clocks(is); in fimc_is_probe()
895 iounmap(is->pmu_regs); in fimc_is_probe()
901 struct fimc_is *is = dev_get_drvdata(dev); in fimc_is_runtime_resume() local
904 ret = fimc_is_setup_clocks(is); in fimc_is_runtime_resume()
908 return fimc_is_enable_clocks(is); in fimc_is_runtime_resume()
913 struct fimc_is *is = dev_get_drvdata(dev); in fimc_is_runtime_suspend() local
915 fimc_is_disable_clocks(is); in fimc_is_runtime_suspend()
928 struct fimc_is *is = dev_get_drvdata(dev); in fimc_is_suspend() local
931 if (test_bit(IS_ST_A5_PWR_ON, &is->state)) in fimc_is_suspend()
941 struct fimc_is *is = dev_get_drvdata(dev); in fimc_is_remove() local
947 free_irq(is->irq, is); in fimc_is_remove()
948 fimc_is_unregister_subdevs(is); in fimc_is_remove()
950 fimc_is_put_clocks(is); in fimc_is_remove()
951 iounmap(is->pmu_regs); in fimc_is_remove()
952 fimc_is_debugfs_remove(is); in fimc_is_remove()
953 release_firmware(is->fw.f_w); in fimc_is_remove()
954 fimc_is_free_cpu_memory(is); in fimc_is_remove()
960 { .compatible = "samsung,exynos4212-fimc-is" },