Lines Matching +full:0 +full:x2c
20 * id = 0 - codec (FIMC C), 1 - preview (FIMC P).
24 #define S3C_CAMIF_REG_CISRCFMT 0x00
26 #define CISRCFMT_ITU656_8BIT (0 << 31)
27 #define CISRCFMT_ORDER422_YCBYCR (0 << 14)
32 #define CISRCFMT_SIZE_CAM_MASK (0x1fff << 16 | 0x1fff)
35 #define S3C_CAMIF_REG_CIWDOFST 0x04
44 #define CIWDOFST_OFST_MASK (0x7ff << 16 | 0x7ff)
47 #define S3C_CAMIF_REG_CIWDOFST2 0x14
48 #define CIWDOFST2_OFST2_MASK (0xfff << 16 | 0xfff)
51 #define S3C_CAMIF_REG_CIGCTRL 0x08
54 #define CIGCTRL_TESTPATTERN_NORMAL (0 << 27)
69 #define CIGCTRL_CAM_INTERLACE (1 << 0)
71 /* Y DMA output frame start address. n = 0..3. */
72 #define S3C_CAMIF_REG_CIYSA(id, n) (0x18 + (id) * 0x54 + (n) * 4)
73 /* Cb plane output DMA start address. n = 0..3. Only codec path. */
74 #define S3C_CAMIF_REG_CICBSA(id, n) (0x28 + (id) * 0x54 + (n) * 4)
75 /* Cr plane output DMA start address. n = 0..3. Only codec path. */
76 #define S3C_CAMIF_REG_CICRSA(id, n) (0x38 + (id) * 0x54 + (n) * 4)
79 #define S3C_CAMIF_REG_CITRGFMT(id, _offs) (0x48 + (id) * (0x34 + (_offs)))
82 #define CITRGFMT_OUTFORMAT_YCBCR420 (0 << 29) /* only for s3c6410 */
88 #define CITRGFMT_FLIP_NORMAL (0 << 14)
95 #define CITRGFMT_TARGETVSIZE(x) ((x) << 0)
96 #define CITRGFMT_TARGETSIZE_MASK ((0x1fff << 16) | 0x1fff)
99 #define S3C_CAMIF_REG_CICTRL(id, _offs) (0x4c + (id) * (0x34 + (_offs)))
100 #define CICTRL_BURST_MASK (0xfffff << 4)
109 #define CICTRL_ORDER422_MASK (3 << 0)
112 #define S3C_CAMIF_REG_CISCPRERATIO(id, _offs) (0x50 + (id) * (0x34 + (_offs)))
115 #define S3C_CAMIF_REG_CISCPREDST(id, _offs) (0x54 + (id) * (0x34 + (_offs)))
118 #define S3C_CAMIF_REG_CISCCTRL(id, _offs) (0x58 + (id) * (0x34 + (_offs)))
122 /* 0 - 16-bit RGB, 1 - 24-bit RGB */
129 #define CISCCTRL_SCALEUP_MASK (0x3 << 29)
135 #define CISCCTRL_INRGB_FMT_RGB565 (0 << 13)
139 #define CISCCTRL_OUTRGB_FMT_RGB565 (0 << 11)
145 #define CISCCTRL_MAIN_RATIO_MASK (0x1ff << 16 | 0x1ff)
148 #define S3C_CAMIF_REG_CITAREA(id, _offs) (0x5c + (id) * (0x34 + (_offs)))
149 #define CITAREA_MASK 0xfffffff
151 /* Codec (id = 0) or preview (id = 1) path status. */
152 #define S3C_CAMIF_REG_CISTATUS(id, _offs) (0x64 + (id) * (0x34 + (_offs)))
156 #define CISTATUS_OVF_MASK (0x7 << 29)
157 #define CIPRSTATUS_OVF_MASK (0x3 << 30)
160 #define CISTATUS_FRAMECNT(__reg) (((__reg) >> 26) & 0x3)
168 #define S3C_CAMIF_REG_CIIMGCPT(_offs) (0xa0 + (_offs))
171 /* Frame control: 1 - one-shot, 0 - free run */
173 #define CIIMGCPT_CPT_FRMOD_ENABLE (0 << 18)
177 #define S3C_CAMIF_REG_CICPTSEQ 0xc4
180 #define S3C_CAMIF_REG_CIIMGEFF(_offs) (0xb0 + (_offs))
183 /* Image effect: 1 - after scaler, 0 - before scaler */
186 #define CIIMGEFF_FIN_BYPASS (0 << 26)
192 #define CIIMGEFF_PAT_CBCR_MASK ((0xff << 13) | 0xff)
197 #define S3C_CAMIF_REG_MSY0SA(id) (0xd4 + ((id) * 0x2c))
198 #define S3C_CAMIF_REG_MSCB0SA(id) (0xd8 + ((id) * 0x2c))
199 #define S3C_CAMIF_REG_MSCR0SA(id) (0xdc + ((id) * 0x2c))
202 #define S3C_CAMIF_REG_MSY0END(id) (0xe0 + ((id) * 0x2c))
203 #define S3C_CAMIF_REG_MSCB0END(id) (0xe4 + ((id) * 0x2c))
204 #define S3C_CAMIF_REG_MSCR0END(id) (0xe8 + ((id) * 0x2c))
206 /* MSPRYOFF, MSPRYOFF. Y/Cb/Cr offset. n: 0 - codec, 1 - preview. */
207 #define S3C_CAMIF_REG_MSYOFF(id) (0x118 + ((id) * 0x2c))
208 #define S3C_CAMIF_REG_MSCBOFF(id) (0x11c + ((id) * 0x2c))
209 #define S3C_CAMIF_REG_MSCROFF(id) (0x120 + ((id) * 0x2c))
211 /* Real input DMA data size. n = 0 - codec, 1 - preview. */
212 #define S3C_CAMIF_REG_MSWIDTH(id) (0xf8 + (id) * 0x2c)
215 #define MSHEIGHT(x) (((x) & 0x3ff) << 16)
216 #define MSWIDTH(x) ((x) & 0x3ff)
218 /* Input DMA control. n = 0 - codec, 1 - preview */
219 #define S3C_CAMIF_REG_MSCTRL(id) (0xfc + (id) * 0x2c)
220 #define MSCTRL_ORDER422_M_YCBYCR (0 << 4)
224 /* 0 - camera, 1 - DMA */
226 #define MSCTRL_INFORMAT_M_YCBCR420 (0 << 1)
230 #define MSCTRL_ENVID_M (1 << 0)
233 #define S3C_CAMIF_REG_CISSY(id) (0x12c + (id) * 0x0c)
234 #define S3C_CAMIF_REG_CISSCB(id) (0x130 + (id) * 0x0c)
235 #define S3C_CAMIF_REG_CISSCR(id) (0x134 + (id) * 0x0c)
237 #define S3C_CISS_OFFS_LINE(x) ((x) << 0)