Lines Matching +full:tx +full:- +full:enable

20 #define ENE_STATUS		0	/* hardware status - unused */
33 #define	ENE_FW1_ENABLE		0x01	/* enable fw processing */
34 #define ENE_FW1_TXIRQ		0x02	/* TX interrupt pending */
39 #define ENE_FW1_WPATTERN	0x20	/* enable wake pattern */
40 #define ENE_FW1_WAKE		0x40	/* enable wake from S3 */
41 #define ENE_FW1_IRQ		0x80	/* enable interrupt */
48 #define ENE_FW2_EMMITER1_CONN	0x10	/* TX emmiter 1 connected */
49 #define ENE_FW2_EMMITER2_CONN	0x20	/* TX emmiter 2 connected */
52 #define ENE_FW2_LEARNING	0x80	/* hardware supports learning and TX */
65 #define ENE_GPIOFS1_GPIO0D	0x20	/* enable tx output on GPIO0D */
67 #define ENE_GPIOFS8_GPIO41	0x02	/* enable tx output on GPIO40 */
89 #define ENE_CIRCFG_RX_EN	0x01	/* RX enable */
90 #define ENE_CIRCFG_RX_IRQ	0x02	/* Enable hardware interrupt */
92 #define ENE_CIRCFG_CARR_DEMOD	0x08	/* Enable carrier demodulator */
94 #define ENE_CIRCFG_TX_EN	0x10	/* TX enable */
95 #define ENE_CIRCFG_TX_IRQ	0x20	/* Send interrupt on TX done */
96 #define ENE_CIRCFG_TX_POL_REV	0x40	/* TX polarity reversed */
97 #define ENE_CIRCFG_TX_CARR	0x80	/* send TX carrier or not */
105 #define ENE_CIRCFG2_CARR_DETECT	0x10	/* Enable carrier detection */
110 /* Knobs for protocol decoding - will document when/if will use them */
117 /* Actual register which contains RLC RX data - read by firmware */
121 /* RLC configuration - sample period (1us resulution) + idle mode */
126 /* Two byte RLC TX buffer */
134  * Low nibble  - number of carrier pulses to average
135  * High nibble - number of initial carrier pulses to discard
146 /* TX period (resolution: 500 ns, minimum 2)*/
148 #define ENE_CIRMOD_PRD_POL	0x80	/* TX carrier polarity*/
153 /* TX pulse width (resolution: 500 ns)*/
204 	bool hw_learning_and_tx_capable;	/* learning & tx capable */
218 	int tx_reg;				/* current reg used for TX */
220 	unsigned int tx_sample;			/* current sample for TX */
223 	/* TX buffer */
226 	int tx_len;				/* current len of tx buffer */
229 	struct completion tx_complete;		/* TX completion */
232 	/* TX settings */