Lines Matching +full:hix5hd2 +full:- +full:clock
17 #include <media/rc-core.h>
62 #define IR_HIX5HD2_NAME "hix5hd2-ir"
70 struct clk *clock; member
79 if (dev->regmap) { in hix5hd2_ir_enable()
80 regmap_read(dev->regmap, IR_CLK, &val); in hix5hd2_ir_enable()
88 regmap_write(dev->regmap, IR_CLK, val); in hix5hd2_ir_enable()
91 ret = clk_prepare_enable(dev->clock); in hix5hd2_ir_enable()
93 clk_disable_unprepare(dev->clock); in hix5hd2_ir_enable()
103 writel_relaxed(0x01, priv->base + IR_ENABLE); in hix5hd2_ir_config()
104 while (readl_relaxed(priv->base + IR_BUSY)) { in hix5hd2_ir_config()
105 if (timeout--) { in hix5hd2_ir_config()
108 dev_err(priv->dev, "IR_BUSY timeout\n"); in hix5hd2_ir_config()
109 return -ETIMEDOUT; in hix5hd2_ir_config()
114 rate = DIV_ROUND_CLOSEST(priv->rate, 1000000); in hix5hd2_ir_config()
117 val |= (IR_CFG_INT_THRESHOLD - 1) & IR_CFG_INT_LEVEL_MASK in hix5hd2_ir_config()
120 val |= (rate - 1) & IR_CFG_FREQ_MASK << IR_CFG_FREQ_SHIFT; in hix5hd2_ir_config()
121 writel_relaxed(val, priv->base + IR_CONFIG); in hix5hd2_ir_config()
123 writel_relaxed(0x00, priv->base + IR_INTM); in hix5hd2_ir_config()
125 writel_relaxed(0x01, priv->base + IR_START); in hix5hd2_ir_config()
131 struct hix5hd2_ir_priv *priv = rdev->priv; in hix5hd2_ir_open()
148 struct hix5hd2_ir_priv *priv = rdev->priv; in hix5hd2_ir_close()
160 irq_sr = readl_relaxed(priv->base + IR_INTS); in hix5hd2_ir_rx_interrupt()
167 ir_raw_event_reset(priv->rdev); in hix5hd2_ir_rx_interrupt()
168 symb_num = readl_relaxed(priv->base + IR_DATAH); in hix5hd2_ir_rx_interrupt()
170 readl_relaxed(priv->base + IR_DATAL); in hix5hd2_ir_rx_interrupt()
172 writel_relaxed(INT_CLR_OVERFLOW, priv->base + IR_INTC); in hix5hd2_ir_rx_interrupt()
173 dev_info(priv->dev, "overflow, level=%d\n", in hix5hd2_ir_rx_interrupt()
180 symb_num = readl_relaxed(priv->base + IR_DATAH); in hix5hd2_ir_rx_interrupt()
182 symb_val = readl_relaxed(priv->base + IR_DATAL); in hix5hd2_ir_rx_interrupt()
189 ir_raw_event_store(priv->rdev, &ev); in hix5hd2_ir_rx_interrupt()
194 ir_raw_event_store(priv->rdev, &ev); in hix5hd2_ir_rx_interrupt()
196 ir_raw_event_set_idle(priv->rdev, true); in hix5hd2_ir_rx_interrupt()
201 writel_relaxed(INT_CLR_RCV, priv->base + IR_INTC); in hix5hd2_ir_rx_interrupt()
203 writel_relaxed(INT_CLR_TIMEOUT, priv->base + IR_INTC); in hix5hd2_ir_rx_interrupt()
207 ir_raw_event_handle(priv->rdev); in hix5hd2_ir_rx_interrupt()
214 struct device *dev = &pdev->dev; in hix5hd2_ir_probe()
217 struct device_node *node = pdev->dev.of_node; in hix5hd2_ir_probe()
223 return -ENOMEM; in hix5hd2_ir_probe()
225 priv->regmap = syscon_regmap_lookup_by_phandle(node, in hix5hd2_ir_probe()
226 "hisilicon,power-syscon"); in hix5hd2_ir_probe()
227 if (IS_ERR(priv->regmap)) { in hix5hd2_ir_probe()
228 dev_info(dev, "no power-reg\n"); in hix5hd2_ir_probe()
229 priv->regmap = NULL; in hix5hd2_ir_probe()
233 priv->base = devm_ioremap_resource(dev, res); in hix5hd2_ir_probe()
234 if (IS_ERR(priv->base)) in hix5hd2_ir_probe()
235 return PTR_ERR(priv->base); in hix5hd2_ir_probe()
237 priv->irq = platform_get_irq(pdev, 0); in hix5hd2_ir_probe()
238 if (priv->irq < 0) { in hix5hd2_ir_probe()
240 return priv->irq; in hix5hd2_ir_probe()
245 return -ENOMEM; in hix5hd2_ir_probe()
247 priv->clock = devm_clk_get(dev, NULL); in hix5hd2_ir_probe()
248 if (IS_ERR(priv->clock)) { in hix5hd2_ir_probe()
249 dev_err(dev, "clock not found\n"); in hix5hd2_ir_probe()
250 ret = PTR_ERR(priv->clock); in hix5hd2_ir_probe()
253 ret = clk_prepare_enable(priv->clock); in hix5hd2_ir_probe()
256 priv->rate = clk_get_rate(priv->clock); in hix5hd2_ir_probe()
258 rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; in hix5hd2_ir_probe()
259 rdev->priv = priv; in hix5hd2_ir_probe()
260 rdev->open = hix5hd2_ir_open; in hix5hd2_ir_probe()
261 rdev->close = hix5hd2_ir_close; in hix5hd2_ir_probe()
262 rdev->driver_name = IR_HIX5HD2_NAME; in hix5hd2_ir_probe()
263 map_name = of_get_property(node, "linux,rc-map-name", NULL); in hix5hd2_ir_probe()
264 rdev->map_name = map_name ?: RC_MAP_EMPTY; in hix5hd2_ir_probe()
265 rdev->device_name = IR_HIX5HD2_NAME; in hix5hd2_ir_probe()
266 rdev->input_phys = IR_HIX5HD2_NAME "/input0"; in hix5hd2_ir_probe()
267 rdev->input_id.bustype = BUS_HOST; in hix5hd2_ir_probe()
268 rdev->input_id.vendor = 0x0001; in hix5hd2_ir_probe()
269 rdev->input_id.product = 0x0001; in hix5hd2_ir_probe()
270 rdev->input_id.version = 0x0100; in hix5hd2_ir_probe()
271 rdev->rx_resolution = US_TO_NS(10); in hix5hd2_ir_probe()
272 rdev->timeout = US_TO_NS(IR_CFG_SYMBOL_MAXWIDTH * 10); in hix5hd2_ir_probe()
278 if (devm_request_irq(dev, priv->irq, hix5hd2_ir_rx_interrupt, in hix5hd2_ir_probe()
279 0, pdev->name, priv) < 0) { in hix5hd2_ir_probe()
280 dev_err(dev, "IRQ %d register failed\n", priv->irq); in hix5hd2_ir_probe()
281 ret = -EINVAL; in hix5hd2_ir_probe()
285 priv->rdev = rdev; in hix5hd2_ir_probe()
286 priv->dev = dev; in hix5hd2_ir_probe()
295 clk_disable_unprepare(priv->clock); in hix5hd2_ir_probe()
306 clk_disable_unprepare(priv->clock); in hix5hd2_ir_remove()
307 rc_unregister_device(priv->rdev); in hix5hd2_ir_remove()
316 clk_disable_unprepare(priv->clock); in hix5hd2_ir_suspend()
331 ret = clk_prepare_enable(priv->clock); in hix5hd2_ir_resume()
337 writel_relaxed(0x01, priv->base + IR_ENABLE); in hix5hd2_ir_resume()
338 writel_relaxed(0x00, priv->base + IR_INTM); in hix5hd2_ir_resume()
339 writel_relaxed(0xff, priv->base + IR_INTC); in hix5hd2_ir_resume()
340 writel_relaxed(0x01, priv->base + IR_START); in hix5hd2_ir_resume()
350 { .compatible = "hisilicon,hix5hd2-ir", },
367 MODULE_DESCRIPTION("IR controller driver for hix5hd2 platforms");
370 MODULE_ALIAS("platform:hix5hd2-ir");