Lines Matching +full:over +full:- +full:sampling
22 #include <media/rc-core.h>
33 * Register to setting ok count whose unit based on hardware sampling period
68 /* Register to setting software sampling period */
70 /* Register to setting hardware sampling period */
106 * struct mtk_ir_data - This is the structure holding all differences among
113 * @hw_period: The value indicating the hardware sampling period
134 * struct mtk_ir - This is the main datasructure for holding the state
156 return ir->data->regs[MTK_CHKDATA_REG] + 4 * i; in mtk_chkdata_reg()
163 /* Period of raw software sampling in ns */ in mtk_chk_period()
165 clk_get_rate(ir->bus) / ir->data->div); in mtk_chk_period()
169 * unit of raw software sampling in mtk_chk_period()
173 dev_dbg(ir->dev, "@pwm clk = \t%lu\n", in mtk_chk_period()
174 clk_get_rate(ir->bus) / ir->data->div); in mtk_chk_period()
175 dev_dbg(ir->dev, "@chkperiod = %08x\n", val); in mtk_chk_period()
184 tmp = __raw_readl(ir->base + reg); in mtk_w32_mask()
186 __raw_writel(tmp, ir->base + reg); in mtk_w32_mask()
191 __raw_writel(val, ir->base + reg); in mtk_w32()
196 return __raw_readl(ir->base + reg); in mtk_r32()
203 val = mtk_r32(ir, ir->data->regs[MTK_IRINT_EN_REG]); in mtk_irq_disable()
204 mtk_w32(ir, val & ~mask, ir->data->regs[MTK_IRINT_EN_REG]); in mtk_irq_disable()
211 val = mtk_r32(ir, ir->data->regs[MTK_IRINT_EN_REG]); in mtk_irq_enable()
212 mtk_w32(ir, val | mask, ir->data->regs[MTK_IRINT_EN_REG]); in mtk_irq_enable()
232 ir_raw_event_reset(ir->rc); in mtk_ir_irq()
240 dev_dbg(ir->dev, "@reg%d=0x%08x\n", i, val); in mtk_ir_irq()
246 ir_raw_event_store_with_filter(ir->rc, &rawir); in mtk_ir_irq()
253 * is over the limit, the last incomplete IR message would in mtk_ir_irq()
255 * ir-rc-raw to decode. That helps it is possible that it in mtk_ir_irq()
262 ir_raw_event_store_with_filter(ir->rc, &rawir); in mtk_ir_irq()
265 ir_raw_event_handle(ir->rc); in mtk_ir_irq()
271 mtk_w32_mask(ir, 0x1, MTK_IRCLR, ir->data->regs[MTK_IRCLR_REG]); in mtk_ir_irq()
275 ir->data->regs[MTK_IRINT_CLR_REG]); in mtk_ir_irq()
297 { .compatible = "mediatek,mt7623-cir", .data = &mt7623_data},
298 { .compatible = "mediatek,mt7622-cir", .data = &mt7622_data},
305 struct device *dev = &pdev->dev; in mtk_ir_probe()
306 struct device_node *dn = dev->of_node; in mtk_ir_probe()
315 return -ENOMEM; in mtk_ir_probe()
317 ir->dev = dev; in mtk_ir_probe()
318 ir->data = of_device_get_match_data(dev); in mtk_ir_probe()
320 ir->clk = devm_clk_get(dev, "clk"); in mtk_ir_probe()
321 if (IS_ERR(ir->clk)) { in mtk_ir_probe()
323 return PTR_ERR(ir->clk); in mtk_ir_probe()
326 ir->bus = devm_clk_get(dev, "bus"); in mtk_ir_probe()
327 if (IS_ERR(ir->bus)) { in mtk_ir_probe()
330 * ir->bus uses the same clock as ir->clock. in mtk_ir_probe()
332 ir->bus = ir->clk; in mtk_ir_probe()
336 ir->base = devm_ioremap_resource(dev, res); in mtk_ir_probe()
337 if (IS_ERR(ir->base)) { in mtk_ir_probe()
339 return PTR_ERR(ir->base); in mtk_ir_probe()
342 ir->rc = devm_rc_allocate_device(dev, RC_DRIVER_IR_RAW); in mtk_ir_probe()
343 if (!ir->rc) { in mtk_ir_probe()
345 return -ENOMEM; in mtk_ir_probe()
348 ir->rc->priv = ir; in mtk_ir_probe()
349 ir->rc->device_name = MTK_IR_DEV; in mtk_ir_probe()
350 ir->rc->input_phys = MTK_IR_DEV "/input0"; in mtk_ir_probe()
351 ir->rc->input_id.bustype = BUS_HOST; in mtk_ir_probe()
352 ir->rc->input_id.vendor = 0x0001; in mtk_ir_probe()
353 ir->rc->input_id.product = 0x0001; in mtk_ir_probe()
354 ir->rc->input_id.version = 0x0001; in mtk_ir_probe()
355 map_name = of_get_property(dn, "linux,rc-map-name", NULL); in mtk_ir_probe()
356 ir->rc->map_name = map_name ?: RC_MAP_EMPTY; in mtk_ir_probe()
357 ir->rc->dev.parent = dev; in mtk_ir_probe()
358 ir->rc->driver_name = MTK_IR_DEV; in mtk_ir_probe()
359 ir->rc->allowed_protocols = RC_PROTO_BIT_ALL; in mtk_ir_probe()
360 ir->rc->rx_resolution = MTK_IR_SAMPLE; in mtk_ir_probe()
361 ir->rc->timeout = MTK_MAX_SAMPLES * (MTK_IR_SAMPLE + 1); in mtk_ir_probe()
363 ret = devm_rc_register_device(dev, ir->rc); in mtk_ir_probe()
371 ir->irq = platform_get_irq(pdev, 0); in mtk_ir_probe()
372 if (ir->irq < 0) { in mtk_ir_probe()
374 return -ENODEV; in mtk_ir_probe()
377 if (clk_prepare_enable(ir->clk)) { in mtk_ir_probe()
379 return -EINVAL; in mtk_ir_probe()
382 if (clk_prepare_enable(ir->bus)) { in mtk_ir_probe()
384 ret = -EINVAL; in mtk_ir_probe()
394 ret = devm_request_irq(dev, ir->irq, mtk_ir_irq, 0, MTK_IR_DEV, ir); in mtk_ir_probe()
403 val = (mtk_chk_period(ir) << ir->data->fields[MTK_CHK_PERIOD].offset) & in mtk_ir_probe()
404 ir->data->fields[MTK_CHK_PERIOD].mask; in mtk_ir_probe()
405 mtk_w32_mask(ir, val, ir->data->fields[MTK_CHK_PERIOD].mask, in mtk_ir_probe()
406 ir->data->fields[MTK_CHK_PERIOD].reg); in mtk_ir_probe()
409 * Setup hardware sampling period used to setup the proper timeout for in mtk_ir_probe()
412 val = (ir->data->hw_period << ir->data->fields[MTK_HW_PERIOD].offset) & in mtk_ir_probe()
413 ir->data->fields[MTK_HW_PERIOD].mask; in mtk_ir_probe()
414 mtk_w32_mask(ir, val, ir->data->fields[MTK_HW_PERIOD].mask, in mtk_ir_probe()
415 ir->data->fields[MTK_HW_PERIOD].reg); in mtk_ir_probe()
417 /* Set de-glitch counter */ in mtk_ir_probe()
422 val |= MTK_OK_COUNT(ir->data->ok_count) | MTK_PWM_EN | MTK_IR_EN; in mtk_ir_probe()
433 clk_disable_unprepare(ir->bus); in mtk_ir_probe()
435 clk_disable_unprepare(ir->clk); in mtk_ir_probe()
450 synchronize_irq(ir->irq); in mtk_ir_remove()
452 clk_disable_unprepare(ir->bus); in mtk_ir_remove()
453 clk_disable_unprepare(ir->clk); in mtk_ir_remove()