Lines Matching +full:nemc +full:- +full:bus +full:- +full:width
2 * JZ4780 NAND/external memory controller (NEMC)
5 * Author: Alex Smith <alex@alex-smith.me.uk>
23 #include <linux/jz4780-nemc.h>
25 #define NEMC_SMCRn(n) (0x14 + (((n) - 1) * 4))
43 #define NEMC_NFCSR_NFEn(n) BIT(((n) - 1) << 1)
44 #define NEMC_NFCSR_NFCEn(n) BIT((((n) - 1) << 1) + 1)
45 #define NEMC_NFCSR_TNFEn(n) BIT(16 + (n) - 1)
57 * jz4780_nemc_num_banks() - count the number of banks referenced by a device
58 * @dev: device to count banks for, must be a child of the NEMC.
60 * Return: The number of unique NEMC banks referred to by the specified NEMC
71 while ((prop = of_get_address(dev->of_node, i++, NULL, NULL))) { in jz4780_nemc_num_banks()
84 * jz4780_nemc_set_type() - set the type of device connected to a bank
85 * @dev: child device of the NEMC.
92 struct jz4780_nemc *nemc = dev_get_drvdata(dev->parent); in jz4780_nemc_set_type() local
95 nfcsr = readl(nemc->base + NEMC_NFCSR); in jz4780_nemc_set_type()
108 writel(nfcsr, nemc->base + NEMC_NFCSR); in jz4780_nemc_set_type()
113 * jz4780_nemc_assert() - (de-)assert a NAND device's chip enable pin
114 * @dev: child device of the NEMC.
118 * (De-)asserts the chip enable pin for the NAND device connected to the
123 struct jz4780_nemc *nemc = dev_get_drvdata(dev->parent); in jz4780_nemc_assert() local
126 nfcsr = readl(nemc->base + NEMC_NFCSR); in jz4780_nemc_assert()
133 writel(nfcsr, nemc->base + NEMC_NFCSR); in jz4780_nemc_assert()
137 static uint32_t jz4780_nemc_clk_period(struct jz4780_nemc *nemc) in jz4780_nemc_clk_period() argument
141 rate = clk_get_rate(nemc->clk); in jz4780_nemc_clk_period()
149 static uint32_t jz4780_nemc_ns_to_cycles(struct jz4780_nemc *nemc, uint32_t ns) in jz4780_nemc_ns_to_cycles() argument
151 return ((ns * 1000) + nemc->clk_period - 1) / nemc->clk_period; in jz4780_nemc_ns_to_cycles()
154 static bool jz4780_nemc_configure_bank(struct jz4780_nemc *nemc, in jz4780_nemc_configure_bank() argument
167 /* 11 - 12 -> 12 cycles */ in jz4780_nemc_configure_bank()
170 /* 13 - 15 -> 15 cycles */ in jz4780_nemc_configure_bank()
173 /* 16 - 20 -> 20 cycles */ in jz4780_nemc_configure_bank()
176 /* 21 - 25 -> 25 cycles */ in jz4780_nemc_configure_bank()
179 /* 26 - 31 -> 31 cycles */ in jz4780_nemc_configure_bank()
183 smcr = readl(nemc->base + NEMC_SMCRn(bank)); in jz4780_nemc_configure_bank()
186 if (!of_property_read_u32(node, "ingenic,nemc-bus-width", &val)) { in jz4780_nemc_configure_bank()
194 * Earlier SoCs support a 16 bit bus width (the 4780 in jz4780_nemc_configure_bank()
197 dev_err(nemc->dev, "unsupported bus width: %u\n", val); in jz4780_nemc_configure_bank()
202 if (of_property_read_u32(node, "ingenic,nemc-tAS", &val) == 0) { in jz4780_nemc_configure_bank()
204 cycles = jz4780_nemc_ns_to_cycles(nemc, val); in jz4780_nemc_configure_bank()
206 dev_err(nemc->dev, "tAS %u is too high (%u cycles)\n", in jz4780_nemc_configure_bank()
214 if (of_property_read_u32(node, "ingenic,nemc-tAH", &val) == 0) { in jz4780_nemc_configure_bank()
216 cycles = jz4780_nemc_ns_to_cycles(nemc, val); in jz4780_nemc_configure_bank()
218 dev_err(nemc->dev, "tAH %u is too high (%u cycles)\n", in jz4780_nemc_configure_bank()
226 if (of_property_read_u32(node, "ingenic,nemc-tBP", &val) == 0) { in jz4780_nemc_configure_bank()
228 cycles = jz4780_nemc_ns_to_cycles(nemc, val); in jz4780_nemc_configure_bank()
230 dev_err(nemc->dev, "tBP %u is too high (%u cycles)\n", in jz4780_nemc_configure_bank()
238 if (of_property_read_u32(node, "ingenic,nemc-tAW", &val) == 0) { in jz4780_nemc_configure_bank()
240 cycles = jz4780_nemc_ns_to_cycles(nemc, val); in jz4780_nemc_configure_bank()
242 dev_err(nemc->dev, "tAW %u is too high (%u cycles)\n", in jz4780_nemc_configure_bank()
250 if (of_property_read_u32(node, "ingenic,nemc-tSTRV", &val) == 0) { in jz4780_nemc_configure_bank()
252 cycles = jz4780_nemc_ns_to_cycles(nemc, val); in jz4780_nemc_configure_bank()
254 dev_err(nemc->dev, "tSTRV %u is too high (%u cycles)\n", in jz4780_nemc_configure_bank()
262 writel(smcr, nemc->base + NEMC_SMCRn(bank)); in jz4780_nemc_configure_bank()
268 struct device *dev = &pdev->dev; in jz4780_nemc_probe()
269 struct jz4780_nemc *nemc; in jz4780_nemc_probe() local
277 nemc = devm_kzalloc(dev, sizeof(*nemc), GFP_KERNEL); in jz4780_nemc_probe()
278 if (!nemc) in jz4780_nemc_probe()
279 return -ENOMEM; in jz4780_nemc_probe()
281 spin_lock_init(&nemc->lock); in jz4780_nemc_probe()
282 nemc->dev = dev; in jz4780_nemc_probe()
285 nemc->base = devm_ioremap_resource(dev, res); in jz4780_nemc_probe()
286 if (IS_ERR(nemc->base)) { in jz4780_nemc_probe()
288 return PTR_ERR(nemc->base); in jz4780_nemc_probe()
291 writel(0, nemc->base + NEMC_NFCSR); in jz4780_nemc_probe()
293 nemc->clk = devm_clk_get(dev, NULL); in jz4780_nemc_probe()
294 if (IS_ERR(nemc->clk)) { in jz4780_nemc_probe()
296 return PTR_ERR(nemc->clk); in jz4780_nemc_probe()
299 ret = clk_prepare_enable(nemc->clk); in jz4780_nemc_probe()
305 nemc->clk_period = jz4780_nemc_clk_period(nemc); in jz4780_nemc_probe()
306 if (!nemc->clk_period) { in jz4780_nemc_probe()
308 clk_disable_unprepare(nemc->clk); in jz4780_nemc_probe()
309 return -EINVAL; in jz4780_nemc_probe()
318 for_each_child_of_node(nemc->dev->of_node, child) { in jz4780_nemc_probe()
324 dev_err(nemc->dev, in jz4780_nemc_probe()
337 dev_err(nemc->dev, "%pOF has no addresses\n", in jz4780_nemc_probe()
340 } else if (nemc->banks_present & referenced) { in jz4780_nemc_probe()
341 dev_err(nemc->dev, "%pOF conflicts with another node\n", in jz4780_nemc_probe()
348 if (!jz4780_nemc_configure_bank(nemc, bank, child)) { in jz4780_nemc_probe()
355 if (of_platform_device_create(child, NULL, nemc->dev)) in jz4780_nemc_probe()
356 nemc->banks_present |= referenced; in jz4780_nemc_probe()
360 platform_set_drvdata(pdev, nemc); in jz4780_nemc_probe()
361 dev_info(dev, "JZ4780 NEMC initialised\n"); in jz4780_nemc_probe()
367 struct jz4780_nemc *nemc = platform_get_drvdata(pdev); in jz4780_nemc_remove() local
369 clk_disable_unprepare(nemc->clk); in jz4780_nemc_remove()
374 { .compatible = "ingenic,jz4780-nemc" },
382 .name = "jz4780-nemc",