Lines Matching +full:reg +full:- +full:shift
12 #include <dt-bindings/memory/tegra30-mc.h>
26 .reg = 0x228,
30 .reg = 0x2e8,
31 .shift = 0,
40 .reg = 0x228,
44 .reg = 0x2f4,
45 .shift = 0,
54 .reg = 0x228,
58 .reg = 0x2e8,
59 .shift = 16,
68 .reg = 0x228,
72 .reg = 0x2f4,
73 .shift = 16,
82 .reg = 0x228,
86 .reg = 0x2ec,
87 .shift = 0,
96 .reg = 0x228,
100 .reg = 0x2f8,
101 .shift = 0,
110 .reg = 0x228,
114 .reg = 0x2ec,
115 .shift = 16,
124 .reg = 0x228,
128 .reg = 0x2f8,
129 .shift = 16,
138 .reg = 0x228,
142 .reg = 0x300,
143 .shift = 0,
152 .reg = 0x228,
156 .reg = 0x308,
157 .shift = 0,
166 .reg = 0x228,
170 .reg = 0x308,
171 .shift = 16,
180 .reg = 0x228,
184 .reg = 0x328,
185 .shift = 0,
194 .reg = 0x228,
198 .reg = 0x364,
199 .shift = 0,
208 .reg = 0x228,
212 .reg = 0x2e0,
213 .shift = 0,
222 .reg = 0x228,
226 .reg = 0x2e4,
227 .shift = 0,
236 .reg = 0x228,
240 .reg = 0x2f0,
241 .shift = 0,
250 .reg = 0x228,
254 .reg = 0x2fc,
255 .shift = 0,
264 .reg = 0x228,
268 .reg = 0x334,
269 .shift = 0,
278 .reg = 0x228,
282 .reg = 0x33c,
283 .shift = 0,
292 .reg = 0x228,
296 .reg = 0x30c,
297 .shift = 0,
306 .reg = 0x228,
310 .reg = 0x318,
311 .shift = 0,
320 .reg = 0x228,
324 .reg = 0x310,
325 .shift = 0,
334 .reg = 0x228,
338 .reg = 0x310,
339 .shift = 16,
348 .reg = 0x228,
352 .reg = 0x334,
353 .shift = 16,
362 .reg = 0x228,
366 .reg = 0x33c,
367 .shift = 16,
376 .reg = 0x228,
380 .reg = 0x328,
381 .shift = 16,
390 .reg = 0x228,
394 .reg = 0x32c,
395 .shift = 0,
404 .reg = 0x228,
408 .reg = 0x32c,
409 .shift = 16,
418 .reg = 0x228,
422 .reg = 0x344,
423 .shift = 0,
432 .reg = 0x228,
436 .reg = 0x344,
437 .shift = 16,
446 .reg = 0x228,
450 .reg = 0x350,
451 .shift = 0,
460 .reg = 0x22c,
464 .reg = 0x338,
465 .shift = 0,
474 .reg = 0x22c,
478 .reg = 0x340,
479 .shift = 0,
488 .reg = 0x22c,
492 .reg = 0x354,
493 .shift = 0,
502 .reg = 0x22c,
506 .reg = 0x354,
507 .shift = 16,
516 .reg = 0x22c,
520 .reg = 0x358,
521 .shift = 0,
530 .reg = 0x22c,
534 .reg = 0x358,
535 .shift = 16,
544 .reg = 0x324,
545 .shift = 0,
554 .reg = 0x320,
555 .shift = 0,
564 .reg = 0x22c,
568 .reg = 0x300,
569 .shift = 16,
578 .reg = 0x22c,
582 .reg = 0x304,
583 .shift = 0,
592 .reg = 0x22c,
596 .reg = 0x304,
597 .shift = 16,
606 .reg = 0x22c,
610 .reg = 0x330,
611 .shift = 0,
620 .reg = 0x22c,
624 .reg = 0x364,
625 .shift = 16,
634 .reg = 0x22c,
638 .reg = 0x368,
639 .shift = 0,
648 .reg = 0x22c,
652 .reg = 0x368,
653 .shift = 16,
662 .reg = 0x22c,
666 .reg = 0x36c,
667 .shift = 0,
676 .reg = 0x22c,
680 .reg = 0x30c,
681 .shift = 16,
690 .reg = 0x22c,
694 .reg = 0x2e0,
695 .shift = 16,
704 .reg = 0x22c,
708 .reg = 0x2e4,
709 .shift = 16,
718 .reg = 0x22c,
722 .reg = 0x338,
723 .shift = 16,
732 .reg = 0x22c,
736 .reg = 0x340,
737 .shift = 16,
746 .reg = 0x22c,
750 .reg = 0x318,
751 .shift = 16,
760 .reg = 0x22c,
764 .reg = 0x314,
765 .shift = 0,
774 .reg = 0x22c,
778 .reg = 0x31c,
779 .shift = 0,
788 .reg = 0x324,
789 .shift = 16,
798 .reg = 0x320,
799 .shift = 16,
808 .reg = 0x22c,
812 .reg = 0x330,
813 .shift = 16,
822 .reg = 0x22c,
826 .reg = 0x348,
827 .shift = 0,
836 .reg = 0x22c,
840 .reg = 0x348,
841 .shift = 16,
850 .reg = 0x22c,
854 .reg = 0x350,
855 .shift = 16,
864 .reg = 0x22c,
868 .reg = 0x35c,
869 .shift = 0,
878 .reg = 0x22c,
882 .reg = 0x35c,
883 .shift = 16,
892 .reg = 0x230,
896 .reg = 0x360,
897 .shift = 0,
906 .reg = 0x230,
910 .reg = 0x360,
911 .shift = 16,
919 { .name = "dc", .swgroup = TEGRA_SWGROUP_DC, .reg = 0x240 },
920 { .name = "dcb", .swgroup = TEGRA_SWGROUP_DCB, .reg = 0x244 },
921 { .name = "epp", .swgroup = TEGRA_SWGROUP_EPP, .reg = 0x248 },
922 { .name = "g2", .swgroup = TEGRA_SWGROUP_G2, .reg = 0x24c },
923 { .name = "mpe", .swgroup = TEGRA_SWGROUP_MPE, .reg = 0x264 },
924 { .name = "vi", .swgroup = TEGRA_SWGROUP_VI, .reg = 0x280 },
925 { .name = "afi", .swgroup = TEGRA_SWGROUP_AFI, .reg = 0x238 },
926 { .name = "avpc", .swgroup = TEGRA_SWGROUP_AVPC, .reg = 0x23c },
927 { .name = "nv", .swgroup = TEGRA_SWGROUP_NV, .reg = 0x268 },
928 { .name = "nv2", .swgroup = TEGRA_SWGROUP_NV2, .reg = 0x26c },
929 { .name = "hda", .swgroup = TEGRA_SWGROUP_HDA, .reg = 0x254 },
930 { .name = "hc", .swgroup = TEGRA_SWGROUP_HC, .reg = 0x250 },
931 { .name = "ppcs", .swgroup = TEGRA_SWGROUP_PPCS, .reg = 0x270 },
932 { .name = "sata", .swgroup = TEGRA_SWGROUP_SATA, .reg = 0x278 },
933 { .name = "vde", .swgroup = TEGRA_SWGROUP_VDE, .reg = 0x27c },
934 { .name = "isp", .swgroup = TEGRA_SWGROUP_ISP, .reg = 0x258 },