Lines Matching +full:adc +full:- +full:dev
2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
3 * JZ4740 SoC ADC driver
14 * This driver synchronizes access to the JZ4740 ADC core between the
31 #include <linux/jz4740-adc.h>
74 status = readb(gc->reg_base + JZ_REG_ADC_STATUS); in jz4740_adc_irq_demux()
78 generic_handle_irq(gc->irq_base + i); in jz4740_adc_irq_demux()
83 /* Refcounting for the ADC clock is done in here instead of in the clock
86 static inline void jz4740_adc_clk_enable(struct jz4740_adc *adc) in jz4740_adc_clk_enable() argument
88 if (atomic_inc_return(&adc->clk_ref) == 1) in jz4740_adc_clk_enable()
89 clk_prepare_enable(adc->clk); in jz4740_adc_clk_enable()
92 static inline void jz4740_adc_clk_disable(struct jz4740_adc *adc) in jz4740_adc_clk_disable() argument
94 if (atomic_dec_return(&adc->clk_ref) == 0) in jz4740_adc_clk_disable()
95 clk_disable_unprepare(adc->clk); in jz4740_adc_clk_disable()
98 static inline void jz4740_adc_set_enabled(struct jz4740_adc *adc, int engine, in jz4740_adc_set_enabled() argument
104 spin_lock_irqsave(&adc->lock, flags); in jz4740_adc_set_enabled()
106 val = readb(adc->base + JZ_REG_ADC_ENABLE); in jz4740_adc_set_enabled()
111 writeb(val, adc->base + JZ_REG_ADC_ENABLE); in jz4740_adc_set_enabled()
113 spin_unlock_irqrestore(&adc->lock, flags); in jz4740_adc_set_enabled()
118 struct jz4740_adc *adc = dev_get_drvdata(pdev->dev.parent); in jz4740_adc_cell_enable() local
120 jz4740_adc_clk_enable(adc); in jz4740_adc_cell_enable()
121 jz4740_adc_set_enabled(adc, pdev->id, true); in jz4740_adc_cell_enable()
128 struct jz4740_adc *adc = dev_get_drvdata(pdev->dev.parent); in jz4740_adc_cell_disable() local
130 jz4740_adc_set_enabled(adc, pdev->id, false); in jz4740_adc_cell_disable()
131 jz4740_adc_clk_disable(adc); in jz4740_adc_cell_disable()
136 int jz4740_adc_set_config(struct device *dev, uint32_t mask, uint32_t val) in jz4740_adc_set_config() argument
138 struct jz4740_adc *adc = dev_get_drvdata(dev); in jz4740_adc_set_config() local
142 if (!adc) in jz4740_adc_set_config()
143 return -ENODEV; in jz4740_adc_set_config()
145 spin_lock_irqsave(&adc->lock, flags); in jz4740_adc_set_config()
147 cfg = readl(adc->base + JZ_REG_ADC_CFG); in jz4740_adc_set_config()
152 writel(cfg, adc->base + JZ_REG_ADC_CFG); in jz4740_adc_set_config()
154 spin_unlock_irqrestore(&adc->lock, flags); in jz4740_adc_set_config()
187 .name = "jz4740-hwmon",
196 .name = "jz4740-battery",
209 struct jz4740_adc *adc; in jz4740_adc_probe() local
214 adc = devm_kzalloc(&pdev->dev, sizeof(*adc), GFP_KERNEL); in jz4740_adc_probe()
215 if (!adc) in jz4740_adc_probe()
216 return -ENOMEM; in jz4740_adc_probe()
218 adc->irq = platform_get_irq(pdev, 0); in jz4740_adc_probe()
219 if (adc->irq < 0) { in jz4740_adc_probe()
220 ret = adc->irq; in jz4740_adc_probe()
221 dev_err(&pdev->dev, "Failed to get platform irq: %d\n", ret); in jz4740_adc_probe()
227 dev_err(&pdev->dev, "Failed to get irq base: %d\n", irq_base); in jz4740_adc_probe()
233 dev_err(&pdev->dev, "Failed to get platform mmio resource\n"); in jz4740_adc_probe()
234 return -ENOENT; in jz4740_adc_probe()
238 adc->mem = request_mem_region(mem_base->start, JZ_REG_ADC_STATUS, in jz4740_adc_probe()
239 pdev->name); in jz4740_adc_probe()
240 if (!adc->mem) { in jz4740_adc_probe()
241 dev_err(&pdev->dev, "Failed to request mmio memory region\n"); in jz4740_adc_probe()
242 return -EBUSY; in jz4740_adc_probe()
245 adc->base = ioremap_nocache(adc->mem->start, resource_size(adc->mem)); in jz4740_adc_probe()
246 if (!adc->base) { in jz4740_adc_probe()
247 ret = -EBUSY; in jz4740_adc_probe()
248 dev_err(&pdev->dev, "Failed to ioremap mmio memory\n"); in jz4740_adc_probe()
252 adc->clk = clk_get(&pdev->dev, "adc"); in jz4740_adc_probe()
253 if (IS_ERR(adc->clk)) { in jz4740_adc_probe()
254 ret = PTR_ERR(adc->clk); in jz4740_adc_probe()
255 dev_err(&pdev->dev, "Failed to get clock: %d\n", ret); in jz4740_adc_probe()
259 spin_lock_init(&adc->lock); in jz4740_adc_probe()
260 atomic_set(&adc->clk_ref, 0); in jz4740_adc_probe()
262 platform_set_drvdata(pdev, adc); in jz4740_adc_probe()
264 gc = irq_alloc_generic_chip("INTC", 1, irq_base, adc->base, in jz4740_adc_probe()
267 ct = gc->chip_types; in jz4740_adc_probe()
268 ct->regs.mask = JZ_REG_ADC_CTRL; in jz4740_adc_probe()
269 ct->regs.ack = JZ_REG_ADC_STATUS; in jz4740_adc_probe()
270 ct->chip.irq_mask = irq_gc_mask_set_bit; in jz4740_adc_probe()
271 ct->chip.irq_unmask = irq_gc_mask_clr_bit; in jz4740_adc_probe()
272 ct->chip.irq_ack = irq_gc_ack_set_bit; in jz4740_adc_probe()
277 adc->gc = gc; in jz4740_adc_probe()
279 irq_set_chained_handler_and_data(adc->irq, jz4740_adc_irq_demux, gc); in jz4740_adc_probe()
281 writeb(0x00, adc->base + JZ_REG_ADC_ENABLE); in jz4740_adc_probe()
282 writeb(0xff, adc->base + JZ_REG_ADC_CTRL); in jz4740_adc_probe()
284 ret = mfd_add_devices(&pdev->dev, 0, jz4740_adc_cells, in jz4740_adc_probe()
293 clk_put(adc->clk); in jz4740_adc_probe()
295 iounmap(adc->base); in jz4740_adc_probe()
297 release_mem_region(adc->mem->start, resource_size(adc->mem)); in jz4740_adc_probe()
303 struct jz4740_adc *adc = platform_get_drvdata(pdev); in jz4740_adc_remove() local
305 mfd_remove_devices(&pdev->dev); in jz4740_adc_remove()
307 irq_remove_generic_chip(adc->gc, IRQ_MSK(5), IRQ_NOPROBE | IRQ_LEVEL, 0); in jz4740_adc_remove()
308 kfree(adc->gc); in jz4740_adc_remove()
309 irq_set_chained_handler_and_data(adc->irq, NULL, NULL); in jz4740_adc_remove()
311 iounmap(adc->base); in jz4740_adc_remove()
312 release_mem_region(adc->mem->start, resource_size(adc->mem)); in jz4740_adc_remove()
314 clk_put(adc->clk); in jz4740_adc_remove()
323 .name = "jz4740-adc",
329 MODULE_DESCRIPTION("JZ4740 SoC ADC driver");
330 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
332 MODULE_ALIAS("platform:jz4740-adc");