Lines Matching +full:no +full:- +full:mmc
2 * davinci_mmc.c - TI DaVinci MMC/SD/SDIO driver
29 #include <linux/mmc/host.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/mmc/mmc.h>
38 #include <linux/mmc/slot-gpio.h>
41 #include <linux/platform_data/mmc-davinci.h>
51 #define DAVINCI_MMCTOR 0x14 /* Response Time-Out Register */
52 #define DAVINCI_MMCTOD 0x18 /* Data Read Time-Out Register */
158 #define MAX_CCNT ((1 << 16) - 1)
184 struct mmc_host *mmc; member
216 /* Version of the MMC/SD controller */
232 host->buffer_bytes_left = sg_dma_len(host->sg); in mmc_davinci_sg_to_buf()
233 host->buffer = sg_virt(host->sg); in mmc_davinci_sg_to_buf()
234 if (host->buffer_bytes_left > host->bytes_left) in mmc_davinci_sg_to_buf()
235 host->buffer_bytes_left = host->bytes_left; in mmc_davinci_sg_to_buf()
244 if (host->buffer_bytes_left == 0) { in davinci_fifo_data_trans()
245 host->sg = sg_next(host->data->sg); in davinci_fifo_data_trans()
249 p = host->buffer; in davinci_fifo_data_trans()
250 if (n > host->buffer_bytes_left) in davinci_fifo_data_trans()
251 n = host->buffer_bytes_left; in davinci_fifo_data_trans()
252 host->buffer_bytes_left -= n; in davinci_fifo_data_trans()
253 host->bytes_left -= n; in davinci_fifo_data_trans()
256 * to/from the fifo here; there's no I/O overlap. in davinci_fifo_data_trans()
259 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) { in davinci_fifo_data_trans()
261 writel(*((u32 *)p), host->base + DAVINCI_MMCDXR); in davinci_fifo_data_trans()
265 iowrite8_rep(host->base + DAVINCI_MMCDXR, p, (n & 3)); in davinci_fifo_data_trans()
270 *((u32 *)p) = readl(host->base + DAVINCI_MMCDRR); in davinci_fifo_data_trans()
274 ioread8_rep(host->base + DAVINCI_MMCDRR, p, (n & 3)); in davinci_fifo_data_trans()
278 host->buffer = p; in davinci_fifo_data_trans()
287 dev_dbg(mmc_dev(host->mmc), "CMD%d, arg 0x%08x%s\n", in mmc_davinci_start_command()
288 cmd->opcode, cmd->arg, in mmc_davinci_start_command()
307 host->cmd = cmd; in mmc_davinci_start_command()
323 case MMC_RSP_R3: /* 48 bits, no CRC */ in mmc_davinci_start_command()
328 dev_dbg(mmc_dev(host->mmc), "unknown resp_type %04x\n", in mmc_davinci_start_command()
334 cmd_reg |= cmd->opcode; in mmc_davinci_start_command()
337 if (host->do_dma) in mmc_davinci_start_command()
340 if (host->version == MMC_CTLR_VERSION_2 && host->data != NULL && in mmc_davinci_start_command()
341 host->data_dir == DAVINCI_MMC_DATADIR_READ) in mmc_davinci_start_command()
345 if (cmd->data) in mmc_davinci_start_command()
349 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) in mmc_davinci_start_command()
352 if (host->bus_mode == MMC_BUSMODE_PUSHPULL) in mmc_davinci_start_command()
356 writel(0x1FFF, host->base + DAVINCI_MMCTOR); in mmc_davinci_start_command()
360 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) { in mmc_davinci_start_command()
363 if (!host->do_dma) in mmc_davinci_start_command()
365 } else if (host->data_dir == DAVINCI_MMC_DATADIR_READ) { in mmc_davinci_start_command()
368 if (!host->do_dma) in mmc_davinci_start_command()
373 * Before non-DMA WRITE commands the controller needs priming: in mmc_davinci_start_command()
376 if (!host->do_dma && (host->data_dir == DAVINCI_MMC_DATADIR_WRITE)) in mmc_davinci_start_command()
379 writel(cmd->arg, host->base + DAVINCI_MMCARGHL); in mmc_davinci_start_command()
380 writel(cmd_reg, host->base + DAVINCI_MMCCMD); in mmc_davinci_start_command()
382 host->active_request = true; in mmc_davinci_start_command()
384 if (!host->do_dma && host->bytes_left <= poll_threshold) { in mmc_davinci_start_command()
387 while (host->active_request && count--) { in mmc_davinci_start_command()
393 if (host->active_request) in mmc_davinci_start_command()
394 writel(im_val, host->base + DAVINCI_MMCIM); in mmc_davinci_start_command()
397 /*----------------------------------------------------------------------*/
405 if (host->data_dir == DAVINCI_MMC_DATADIR_READ) in davinci_abort_dma()
406 sync_dev = host->dma_rx; in davinci_abort_dma()
408 sync_dev = host->dma_tx; in davinci_abort_dma()
420 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) { in mmc_davinci_send_dma_request()
423 .dst_addr = host->mem_res->start + DAVINCI_MMCDXR, in mmc_davinci_send_dma_request()
428 chan = host->dma_tx; in mmc_davinci_send_dma_request()
429 dmaengine_slave_config(host->dma_tx, &dma_tx_conf); in mmc_davinci_send_dma_request()
431 desc = dmaengine_prep_slave_sg(host->dma_tx, in mmc_davinci_send_dma_request()
432 data->sg, in mmc_davinci_send_dma_request()
433 host->sg_len, in mmc_davinci_send_dma_request()
437 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_send_dma_request()
439 ret = -1; in mmc_davinci_send_dma_request()
445 .src_addr = host->mem_res->start + DAVINCI_MMCDRR, in mmc_davinci_send_dma_request()
450 chan = host->dma_rx; in mmc_davinci_send_dma_request()
451 dmaengine_slave_config(host->dma_rx, &dma_rx_conf); in mmc_davinci_send_dma_request()
453 desc = dmaengine_prep_slave_sg(host->dma_rx, in mmc_davinci_send_dma_request()
454 data->sg, in mmc_davinci_send_dma_request()
455 host->sg_len, in mmc_davinci_send_dma_request()
459 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_send_dma_request()
461 ret = -1; in mmc_davinci_send_dma_request()
477 int mask = rw_threshold - 1; in mmc_davinci_start_dma_transfer()
480 host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, in mmc_davinci_start_dma_transfer()
483 /* no individual DMA segment should need a partial FIFO */ in mmc_davinci_start_dma_transfer()
484 for (i = 0; i < host->sg_len; i++) { in mmc_davinci_start_dma_transfer()
485 if (sg_dma_len(data->sg + i) & mask) { in mmc_davinci_start_dma_transfer()
486 dma_unmap_sg(mmc_dev(host->mmc), in mmc_davinci_start_dma_transfer()
487 data->sg, data->sg_len, in mmc_davinci_start_dma_transfer()
489 return -1; in mmc_davinci_start_dma_transfer()
493 host->do_dma = 1; in mmc_davinci_start_dma_transfer()
501 if (!host->use_dma) in davinci_release_dma_channels()
504 dma_release_channel(host->dma_tx); in davinci_release_dma_channels()
505 dma_release_channel(host->dma_rx); in davinci_release_dma_channels()
510 host->dma_tx = dma_request_chan(mmc_dev(host->mmc), "tx"); in davinci_acquire_dma_channels()
511 if (IS_ERR(host->dma_tx)) { in davinci_acquire_dma_channels()
512 dev_err(mmc_dev(host->mmc), "Can't get dma_tx channel\n"); in davinci_acquire_dma_channels()
513 return PTR_ERR(host->dma_tx); in davinci_acquire_dma_channels()
516 host->dma_rx = dma_request_chan(mmc_dev(host->mmc), "rx"); in davinci_acquire_dma_channels()
517 if (IS_ERR(host->dma_rx)) { in davinci_acquire_dma_channels()
518 dev_err(mmc_dev(host->mmc), "Can't get dma_rx channel\n"); in davinci_acquire_dma_channels()
519 dma_release_channel(host->dma_tx); in davinci_acquire_dma_channels()
520 return PTR_ERR(host->dma_rx); in davinci_acquire_dma_channels()
526 /*----------------------------------------------------------------------*/
533 struct mmc_data *data = req->data; in mmc_davinci_prepare_data()
535 if (host->version == MMC_CTLR_VERSION_2) in mmc_davinci_prepare_data()
538 host->data = data; in mmc_davinci_prepare_data()
540 host->data_dir = DAVINCI_MMC_DATADIR_NONE; in mmc_davinci_prepare_data()
541 writel(0, host->base + DAVINCI_MMCBLEN); in mmc_davinci_prepare_data()
542 writel(0, host->base + DAVINCI_MMCNBLK); in mmc_davinci_prepare_data()
546 dev_dbg(mmc_dev(host->mmc), "%s, %d blocks of %d bytes\n", in mmc_davinci_prepare_data()
547 (data->flags & MMC_DATA_WRITE) ? "write" : "read", in mmc_davinci_prepare_data()
548 data->blocks, data->blksz); in mmc_davinci_prepare_data()
549 dev_dbg(mmc_dev(host->mmc), " DTO %d cycles + %d ns\n", in mmc_davinci_prepare_data()
550 data->timeout_clks, data->timeout_ns); in mmc_davinci_prepare_data()
551 timeout = data->timeout_clks + in mmc_davinci_prepare_data()
552 (data->timeout_ns / host->ns_in_one_cycle); in mmc_davinci_prepare_data()
556 writel(timeout, host->base + DAVINCI_MMCTOD); in mmc_davinci_prepare_data()
557 writel(data->blocks, host->base + DAVINCI_MMCNBLK); in mmc_davinci_prepare_data()
558 writel(data->blksz, host->base + DAVINCI_MMCBLEN); in mmc_davinci_prepare_data()
561 if (data->flags & MMC_DATA_WRITE) { in mmc_davinci_prepare_data()
562 host->data_dir = DAVINCI_MMC_DATADIR_WRITE; in mmc_davinci_prepare_data()
564 host->base + DAVINCI_MMCFIFOCTL); in mmc_davinci_prepare_data()
566 host->base + DAVINCI_MMCFIFOCTL); in mmc_davinci_prepare_data()
568 host->data_dir = DAVINCI_MMC_DATADIR_READ; in mmc_davinci_prepare_data()
570 host->base + DAVINCI_MMCFIFOCTL); in mmc_davinci_prepare_data()
572 host->base + DAVINCI_MMCFIFOCTL); in mmc_davinci_prepare_data()
575 host->buffer = NULL; in mmc_davinci_prepare_data()
576 host->bytes_left = data->blocks * data->blksz; in mmc_davinci_prepare_data()
586 if (host->use_dma && (host->bytes_left & (rw_threshold - 1)) == 0 in mmc_davinci_prepare_data()
588 /* zero this to ensure we take no PIO paths */ in mmc_davinci_prepare_data()
589 host->bytes_left = 0; in mmc_davinci_prepare_data()
592 host->sg_len = data->sg_len; in mmc_davinci_prepare_data()
593 host->sg = host->data->sg; in mmc_davinci_prepare_data()
598 static void mmc_davinci_request(struct mmc_host *mmc, struct mmc_request *req) in mmc_davinci_request() argument
600 struct mmc_davinci_host *host = mmc_priv(mmc); in mmc_davinci_request()
608 mmcst1 = readl(host->base + DAVINCI_MMCST1); in mmc_davinci_request()
614 dev_err(mmc_dev(host->mmc), "still BUSY? bad ... \n"); in mmc_davinci_request()
615 req->cmd->error = -ETIMEDOUT; in mmc_davinci_request()
616 mmc_request_done(mmc, req); in mmc_davinci_request()
620 host->do_dma = 0; in mmc_davinci_request()
622 mmc_davinci_start_command(host, req->cmd); in mmc_davinci_request()
630 mmc_pclk = host->mmc_input_clk; in calculate_freq_for_card()
633 / (2 * mmc_req_freq)) - 1; in calculate_freq_for_card()
644 host->ns_in_one_cycle = (1000000) / (((mmc_pclk in calculate_freq_for_card()
647 host->ns_in_one_cycle = (1000000) / (((mmc_pclk in calculate_freq_for_card()
653 static void calculate_clk_divider(struct mmc_host *mmc, struct mmc_ios *ios) in calculate_clk_divider() argument
657 struct mmc_davinci_host *host = mmc_priv(mmc); in calculate_clk_divider()
659 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) { in calculate_clk_divider()
666 / (2 * MMCSD_INIT_CLOCK)) - 1; in calculate_clk_divider()
671 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()
673 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
676 host->ns_in_one_cycle = (1000000) / (MMCSD_INIT_CLOCK/1000); in calculate_clk_divider()
679 mmc_push_pull_freq = calculate_freq_for_card(host, ios->clock); in calculate_clk_divider()
684 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKEN; in calculate_clk_divider()
685 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
689 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()
691 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
693 writel(temp | MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
699 static void mmc_davinci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in mmc_davinci_set_ios() argument
701 struct mmc_davinci_host *host = mmc_priv(mmc); in mmc_davinci_set_ios()
702 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_set_ios()
703 struct davinci_mmc_config *config = pdev->dev.platform_data; in mmc_davinci_set_ios()
705 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_set_ios()
707 ios->clock, ios->bus_mode, ios->power_mode, in mmc_davinci_set_ios()
708 ios->vdd); in mmc_davinci_set_ios()
710 switch (ios->power_mode) { in mmc_davinci_set_ios()
712 if (config && config->set_power) in mmc_davinci_set_ios()
713 config->set_power(pdev->id, false); in mmc_davinci_set_ios()
716 if (config && config->set_power) in mmc_davinci_set_ios()
717 config->set_power(pdev->id, true); in mmc_davinci_set_ios()
721 switch (ios->bus_width) { in mmc_davinci_set_ios()
723 dev_dbg(mmc_dev(host->mmc), "Enabling 8 bit mode\n"); in mmc_davinci_set_ios()
724 writel((readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
726 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
729 dev_dbg(mmc_dev(host->mmc), "Enabling 4 bit mode\n"); in mmc_davinci_set_ios()
730 if (host->version == MMC_CTLR_VERSION_2) in mmc_davinci_set_ios()
731 writel((readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
733 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
735 writel(readl(host->base + DAVINCI_MMCCTL) | in mmc_davinci_set_ios()
737 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
740 dev_dbg(mmc_dev(host->mmc), "Enabling 1 bit mode\n"); in mmc_davinci_set_ios()
741 if (host->version == MMC_CTLR_VERSION_2) in mmc_davinci_set_ios()
742 writel(readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
744 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
746 writel(readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
748 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
752 calculate_clk_divider(mmc, ios); in mmc_davinci_set_ios()
754 host->bus_mode = ios->bus_mode; in mmc_davinci_set_ios()
755 if (ios->power_mode == MMC_POWER_UP) { in mmc_davinci_set_ios()
760 writel(0, host->base + DAVINCI_MMCARGHL); in mmc_davinci_set_ios()
761 writel(MMCCMD_INITCK, host->base + DAVINCI_MMCCMD); in mmc_davinci_set_ios()
763 u32 tmp = readl(host->base + DAVINCI_MMCST0); in mmc_davinci_set_ios()
772 dev_warn(mmc_dev(host->mmc), "powerup timeout\n"); in mmc_davinci_set_ios()
781 host->data = NULL; in mmc_davinci_xfer_done()
783 if (host->mmc->caps & MMC_CAP_SDIO_IRQ) { in mmc_davinci_xfer_done()
785 * SDIO Interrupt Detection work-around as suggested by in mmc_davinci_xfer_done()
789 if (host->sdio_int && !(readl(host->base + DAVINCI_SDIOST0) & in mmc_davinci_xfer_done()
791 writel(SDIOIST_IOINT, host->base + DAVINCI_SDIOIST); in mmc_davinci_xfer_done()
792 mmc_signal_sdio_irq(host->mmc); in mmc_davinci_xfer_done()
796 if (host->do_dma) { in mmc_davinci_xfer_done()
799 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, in mmc_davinci_xfer_done()
801 host->do_dma = false; in mmc_davinci_xfer_done()
803 host->data_dir = DAVINCI_MMC_DATADIR_NONE; in mmc_davinci_xfer_done()
805 if (!data->stop || (host->cmd && host->cmd->error)) { in mmc_davinci_xfer_done()
806 mmc_request_done(host->mmc, data->mrq); in mmc_davinci_xfer_done()
807 writel(0, host->base + DAVINCI_MMCIM); in mmc_davinci_xfer_done()
808 host->active_request = false; in mmc_davinci_xfer_done()
810 mmc_davinci_start_command(host, data->stop); in mmc_davinci_xfer_done()
816 host->cmd = NULL; in mmc_davinci_cmd_done()
818 if (cmd->flags & MMC_RSP_PRESENT) { in mmc_davinci_cmd_done()
819 if (cmd->flags & MMC_RSP_136) { in mmc_davinci_cmd_done()
821 cmd->resp[3] = readl(host->base + DAVINCI_MMCRSP01); in mmc_davinci_cmd_done()
822 cmd->resp[2] = readl(host->base + DAVINCI_MMCRSP23); in mmc_davinci_cmd_done()
823 cmd->resp[1] = readl(host->base + DAVINCI_MMCRSP45); in mmc_davinci_cmd_done()
824 cmd->resp[0] = readl(host->base + DAVINCI_MMCRSP67); in mmc_davinci_cmd_done()
827 cmd->resp[0] = readl(host->base + DAVINCI_MMCRSP67); in mmc_davinci_cmd_done()
831 if (host->data == NULL || cmd->error) { in mmc_davinci_cmd_done()
832 if (cmd->error == -ETIMEDOUT) in mmc_davinci_cmd_done()
833 cmd->mrq->cmd->retries = 0; in mmc_davinci_cmd_done()
834 mmc_request_done(host->mmc, cmd->mrq); in mmc_davinci_cmd_done()
835 writel(0, host->base + DAVINCI_MMCIM); in mmc_davinci_cmd_done()
836 host->active_request = false; in mmc_davinci_cmd_done()
845 temp = readl(host->base + DAVINCI_MMCCTL); in mmc_davinci_reset_ctrl()
851 writel(temp, host->base + DAVINCI_MMCCTL); in mmc_davinci_reset_ctrl()
867 status = readl(host->base + DAVINCI_SDIOIST); in mmc_davinci_sdio_irq()
869 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_sdio_irq()
871 writel(status | SDIOIST_IOINT, host->base + DAVINCI_SDIOIST); in mmc_davinci_sdio_irq()
872 mmc_signal_sdio_irq(host->mmc); in mmc_davinci_sdio_irq()
883 struct mmc_data *data = host->data; in mmc_davinci_irq()
885 if (host->cmd == NULL && host->data == NULL) { in mmc_davinci_irq()
886 status = readl(host->base + DAVINCI_MMCST0); in mmc_davinci_irq()
887 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_irq()
890 writel(0, host->base + DAVINCI_MMCIM); in mmc_davinci_irq()
894 status = readl(host->base + DAVINCI_MMCST0); in mmc_davinci_irq()
902 * non-dma. in mmc_davinci_irq()
904 if (host->bytes_left && (status & (MMCST0_DXRDY | MMCST0_DRRDY))) { in mmc_davinci_irq()
914 im_val = readl(host->base + DAVINCI_MMCIM); in mmc_davinci_irq()
915 writel(0, host->base + DAVINCI_MMCIM); in mmc_davinci_irq()
919 status = readl(host->base + DAVINCI_MMCST0); in mmc_davinci_irq()
921 } while (host->bytes_left && in mmc_davinci_irq()
928 * status is race-prone. in mmc_davinci_irq()
930 writel(im_val, host->base + DAVINCI_MMCIM); in mmc_davinci_irq()
936 if ((host->do_dma == 0) && (host->bytes_left > 0)) { in mmc_davinci_irq()
938 * no RX ints are generated in mmc_davinci_irq()
940 davinci_fifo_data_trans(host, host->bytes_left); in mmc_davinci_irq()
943 data->bytes_xfered = data->blocks * data->blksz; in mmc_davinci_irq()
945 dev_err(mmc_dev(host->mmc), in mmc_davinci_irq()
946 "DATDNE with no host->data\n"); in mmc_davinci_irq()
952 data->error = -ETIMEDOUT; in mmc_davinci_irq()
955 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_irq()
964 data->error = -EILSEQ; in mmc_davinci_irq()
970 * case and the two three-bit patterns in various SD specs in mmc_davinci_irq()
974 u32 temp = readb(host->base + DAVINCI_MMCDRSP); in mmc_davinci_irq()
977 data->error = -ETIMEDOUT; in mmc_davinci_irq()
979 dev_dbg(mmc_dev(host->mmc), "data %s %s error\n", in mmc_davinci_irq()
981 (data->error == -ETIMEDOUT) ? "timeout" : "CRC"); in mmc_davinci_irq()
988 if (host->cmd) { in mmc_davinci_irq()
989 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_irq()
991 host->cmd->opcode, qstatus); in mmc_davinci_irq()
992 host->cmd->error = -ETIMEDOUT; in mmc_davinci_irq()
1003 dev_dbg(mmc_dev(host->mmc), "Command CRC error\n"); in mmc_davinci_irq()
1004 if (host->cmd) { in mmc_davinci_irq()
1005 host->cmd->error = -EILSEQ; in mmc_davinci_irq()
1012 end_command = (int) host->cmd; in mmc_davinci_irq()
1016 mmc_davinci_cmd_done(host, host->cmd); in mmc_davinci_irq()
1022 static int mmc_davinci_get_cd(struct mmc_host *mmc) in mmc_davinci_get_cd() argument
1024 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_get_cd()
1025 struct davinci_mmc_config *config = pdev->dev.platform_data; in mmc_davinci_get_cd()
1027 if (config && config->get_cd) in mmc_davinci_get_cd()
1028 return config->get_cd(pdev->id); in mmc_davinci_get_cd()
1030 return mmc_gpio_get_cd(mmc); in mmc_davinci_get_cd()
1033 static int mmc_davinci_get_ro(struct mmc_host *mmc) in mmc_davinci_get_ro() argument
1035 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_get_ro()
1036 struct davinci_mmc_config *config = pdev->dev.platform_data; in mmc_davinci_get_ro()
1038 if (config && config->get_ro) in mmc_davinci_get_ro()
1039 return config->get_ro(pdev->id); in mmc_davinci_get_ro()
1041 return mmc_gpio_get_ro(mmc); in mmc_davinci_get_ro()
1044 static void mmc_davinci_enable_sdio_irq(struct mmc_host *mmc, int enable) in mmc_davinci_enable_sdio_irq() argument
1046 struct mmc_davinci_host *host = mmc_priv(mmc); in mmc_davinci_enable_sdio_irq()
1049 if (!(readl(host->base + DAVINCI_SDIOST0) & SDIOST0_DAT1_HI)) { in mmc_davinci_enable_sdio_irq()
1050 writel(SDIOIST_IOINT, host->base + DAVINCI_SDIOIST); in mmc_davinci_enable_sdio_irq()
1051 mmc_signal_sdio_irq(host->mmc); in mmc_davinci_enable_sdio_irq()
1053 host->sdio_int = true; in mmc_davinci_enable_sdio_irq()
1054 writel(readl(host->base + DAVINCI_SDIOIEN) | in mmc_davinci_enable_sdio_irq()
1055 SDIOIEN_IOINTEN, host->base + DAVINCI_SDIOIEN); in mmc_davinci_enable_sdio_irq()
1058 host->sdio_int = false; in mmc_davinci_enable_sdio_irq()
1059 writel(readl(host->base + DAVINCI_SDIOIEN) & ~SDIOIEN_IOINTEN, in mmc_davinci_enable_sdio_irq()
1060 host->base + DAVINCI_SDIOIEN); in mmc_davinci_enable_sdio_irq()
1072 /*----------------------------------------------------------------------*/
1080 struct mmc_host *mmc; in mmc_davinci_cpufreq_transition() local
1084 mmc = host->mmc; in mmc_davinci_cpufreq_transition()
1085 mmc_pclk = clk_get_rate(host->clk); in mmc_davinci_cpufreq_transition()
1088 spin_lock_irqsave(&mmc->lock, flags); in mmc_davinci_cpufreq_transition()
1089 host->mmc_input_clk = mmc_pclk; in mmc_davinci_cpufreq_transition()
1090 calculate_clk_divider(mmc, &mmc->ios); in mmc_davinci_cpufreq_transition()
1091 spin_unlock_irqrestore(&mmc->lock, flags); in mmc_davinci_cpufreq_transition()
1099 host->freq_transition.notifier_call = mmc_davinci_cpufreq_transition; in mmc_davinci_cpufreq_register()
1101 return cpufreq_register_notifier(&host->freq_transition, in mmc_davinci_cpufreq_register()
1107 cpufreq_unregister_notifier(&host->freq_transition, in mmc_davinci_cpufreq_deregister()
1125 writel(0, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()
1126 writel(MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()
1128 writel(0x1FFF, host->base + DAVINCI_MMCTOR); in init_mmcsd_host()
1129 writel(0xFFFF, host->base + DAVINCI_MMCTOD); in init_mmcsd_host()
1136 .name = "dm6441-mmc",
1139 .name = "da830-mmc",
1148 .compatible = "ti,dm6441-mmc",
1152 .compatible = "ti,da830-mmc",
1159 static int mmc_davinci_parse_pdata(struct mmc_host *mmc) in mmc_davinci_parse_pdata() argument
1161 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_parse_pdata()
1162 struct davinci_mmc_config *pdata = pdev->dev.platform_data; in mmc_davinci_parse_pdata()
1167 return -EINVAL; in mmc_davinci_parse_pdata()
1169 host = mmc_priv(mmc); in mmc_davinci_parse_pdata()
1171 return -EINVAL; in mmc_davinci_parse_pdata()
1173 if (pdata && pdata->nr_sg) in mmc_davinci_parse_pdata()
1174 host->nr_sg = pdata->nr_sg - 1; in mmc_davinci_parse_pdata()
1176 if (pdata && (pdata->wires == 4 || pdata->wires == 0)) in mmc_davinci_parse_pdata()
1177 mmc->caps |= MMC_CAP_4_BIT_DATA; in mmc_davinci_parse_pdata()
1179 if (pdata && (pdata->wires == 8)) in mmc_davinci_parse_pdata()
1180 mmc->caps |= (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA); in mmc_davinci_parse_pdata()
1182 mmc->f_min = 312500; in mmc_davinci_parse_pdata()
1183 mmc->f_max = 25000000; in mmc_davinci_parse_pdata()
1184 if (pdata && pdata->max_freq) in mmc_davinci_parse_pdata()
1185 mmc->f_max = pdata->max_freq; in mmc_davinci_parse_pdata()
1186 if (pdata && pdata->caps) in mmc_davinci_parse_pdata()
1187 mmc->caps |= pdata->caps; in mmc_davinci_parse_pdata()
1190 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0, NULL); in mmc_davinci_parse_pdata()
1191 if (ret == -EPROBE_DEFER) in mmc_davinci_parse_pdata()
1194 mmc->caps |= MMC_CAP_NEEDS_POLL; in mmc_davinci_parse_pdata()
1196 ret = mmc_gpiod_request_ro(mmc, "wp", 0, false, 0, NULL); in mmc_davinci_parse_pdata()
1197 if (ret == -EPROBE_DEFER) in mmc_davinci_parse_pdata()
1207 struct mmc_host *mmc = NULL; in davinci_mmcsd_probe() local
1215 return -ENODEV; in davinci_mmcsd_probe()
1221 mem = devm_request_mem_region(&pdev->dev, r->start, mem_size, in davinci_mmcsd_probe()
1222 pdev->name); in davinci_mmcsd_probe()
1224 return -EBUSY; in davinci_mmcsd_probe()
1226 mmc = mmc_alloc_host(sizeof(struct mmc_davinci_host), &pdev->dev); in davinci_mmcsd_probe()
1227 if (!mmc) in davinci_mmcsd_probe()
1228 return -ENOMEM; in davinci_mmcsd_probe()
1230 host = mmc_priv(mmc); in davinci_mmcsd_probe()
1231 host->mmc = mmc; /* Important */ in davinci_mmcsd_probe()
1233 host->mem_res = mem; in davinci_mmcsd_probe()
1234 host->base = devm_ioremap(&pdev->dev, mem->start, mem_size); in davinci_mmcsd_probe()
1235 if (!host->base) { in davinci_mmcsd_probe()
1236 ret = -ENOMEM; in davinci_mmcsd_probe()
1240 host->clk = devm_clk_get(&pdev->dev, NULL); in davinci_mmcsd_probe()
1241 if (IS_ERR(host->clk)) { in davinci_mmcsd_probe()
1242 ret = PTR_ERR(host->clk); in davinci_mmcsd_probe()
1245 ret = clk_prepare_enable(host->clk); in davinci_mmcsd_probe()
1249 host->mmc_input_clk = clk_get_rate(host->clk); in davinci_mmcsd_probe()
1251 match = of_match_device(davinci_mmc_dt_ids, &pdev->dev); in davinci_mmcsd_probe()
1253 pdev->id_entry = match->data; in davinci_mmcsd_probe()
1254 ret = mmc_of_parse(mmc); in davinci_mmcsd_probe()
1256 if (ret != -EPROBE_DEFER) in davinci_mmcsd_probe()
1257 dev_err(&pdev->dev, in davinci_mmcsd_probe()
1262 ret = mmc_davinci_parse_pdata(mmc); in davinci_mmcsd_probe()
1264 dev_err(&pdev->dev, in davinci_mmcsd_probe()
1269 if (host->nr_sg > MAX_NR_SG || !host->nr_sg) in davinci_mmcsd_probe()
1270 host->nr_sg = MAX_NR_SG; in davinci_mmcsd_probe()
1274 host->use_dma = use_dma; in davinci_mmcsd_probe()
1275 host->mmc_irq = irq; in davinci_mmcsd_probe()
1276 host->sdio_irq = platform_get_irq(pdev, 1); in davinci_mmcsd_probe()
1278 if (host->use_dma) { in davinci_mmcsd_probe()
1280 if (ret == -EPROBE_DEFER) in davinci_mmcsd_probe()
1283 host->use_dma = 0; in davinci_mmcsd_probe()
1286 mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; in davinci_mmcsd_probe()
1290 host->version = id_entry->driver_data; in davinci_mmcsd_probe()
1292 mmc->ops = &mmc_davinci_ops; in davinci_mmcsd_probe()
1293 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; in davinci_mmcsd_probe()
1295 /* With no iommu coalescing pages, each phys_seg is a hw_seg. in davinci_mmcsd_probe()
1299 mmc->max_segs = MAX_NR_SG; in davinci_mmcsd_probe()
1302 mmc->max_seg_size = MAX_CCNT * rw_threshold; in davinci_mmcsd_probe()
1304 /* MMC/SD controller limits for multiblock requests */ in davinci_mmcsd_probe()
1305 mmc->max_blk_size = 4095; /* BLEN is 12 bits */ in davinci_mmcsd_probe()
1306 mmc->max_blk_count = 65535; /* NBLK is 16 bits */ in davinci_mmcsd_probe()
1307 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; in davinci_mmcsd_probe()
1309 dev_dbg(mmc_dev(host->mmc), "max_segs=%d\n", mmc->max_segs); in davinci_mmcsd_probe()
1310 dev_dbg(mmc_dev(host->mmc), "max_blk_size=%d\n", mmc->max_blk_size); in davinci_mmcsd_probe()
1311 dev_dbg(mmc_dev(host->mmc), "max_req_size=%d\n", mmc->max_req_size); in davinci_mmcsd_probe()
1312 dev_dbg(mmc_dev(host->mmc), "max_seg_size=%d\n", mmc->max_seg_size); in davinci_mmcsd_probe()
1318 dev_err(&pdev->dev, "failed to register cpufreq\n"); in davinci_mmcsd_probe()
1322 ret = mmc_add_host(mmc); in davinci_mmcsd_probe()
1326 ret = devm_request_irq(&pdev->dev, irq, mmc_davinci_irq, 0, in davinci_mmcsd_probe()
1327 mmc_hostname(mmc), host); in davinci_mmcsd_probe()
1331 if (host->sdio_irq >= 0) { in davinci_mmcsd_probe()
1332 ret = devm_request_irq(&pdev->dev, host->sdio_irq, in davinci_mmcsd_probe()
1334 mmc_hostname(mmc), host); in davinci_mmcsd_probe()
1336 mmc->caps |= MMC_CAP_SDIO_IRQ; in davinci_mmcsd_probe()
1339 rename_region(mem, mmc_hostname(mmc)); in davinci_mmcsd_probe()
1341 dev_info(mmc_dev(host->mmc), "Using %s, %d-bit mode\n", in davinci_mmcsd_probe()
1342 host->use_dma ? "DMA" : "PIO", in davinci_mmcsd_probe()
1343 (mmc->caps & MMC_CAP_4_BIT_DATA) ? 4 : 1); in davinci_mmcsd_probe()
1348 mmc_remove_host(mmc); in davinci_mmcsd_probe()
1355 clk_disable_unprepare(host->clk); in davinci_mmcsd_probe()
1359 mmc_free_host(mmc); in davinci_mmcsd_probe()
1368 mmc_remove_host(host->mmc); in davinci_mmcsd_remove()
1371 clk_disable_unprepare(host->clk); in davinci_mmcsd_remove()
1372 mmc_free_host(host->mmc); in davinci_mmcsd_remove()
1382 writel(0, host->base + DAVINCI_MMCIM); in davinci_mmcsd_suspend()
1384 clk_disable(host->clk); in davinci_mmcsd_suspend()
1393 clk_enable(host->clk); in davinci_mmcsd_resume()
1424 MODULE_DESCRIPTION("MMC/SD driver for Davinci MMC controller");