Lines Matching +full:ciu +full:- +full:sample
23 #include "dw_mmc-pltfm.h"
24 #include "dw_mmc-exynos.h"
26 /* Variations in Exynos specific dw-mshc controller */
56 .compatible = "samsung,exynos4210-dw-mshc",
59 .compatible = "samsung,exynos4412-dw-mshc",
62 .compatible = "samsung,exynos5250-dw-mshc",
65 .compatible = "samsung,exynos5420-dw-mshc",
68 .compatible = "samsung,exynos5420-dw-mshc-smu",
71 .compatible = "samsung,exynos7-dw-mshc",
74 .compatible = "samsung,exynos7-dw-mshc-smu",
81 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_get_ciu_div()
83 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4412) in dw_mci_exynos_get_ciu_div()
85 else if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4210) in dw_mci_exynos_get_ciu_div()
87 else if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_get_ciu_div()
88 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_get_ciu_div()
96 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_config_smu()
100 * set for non-ecryption mode at this time. in dw_mci_exynos_config_smu()
102 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS5420_SMU || in dw_mci_exynos_config_smu()
103 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) { in dw_mci_exynos_config_smu()
115 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_priv_init()
119 if (priv->ctrl_type >= DW_MCI_TYPE_EXYNOS5420) { in dw_mci_exynos_priv_init()
120 priv->saved_strobe_ctrl = mci_readl(host, HS400_DLINE_CTRL); in dw_mci_exynos_priv_init()
121 priv->saved_dqs_en = mci_readl(host, HS400_DQS_EN); in dw_mci_exynos_priv_init()
122 priv->saved_dqs_en |= AXI_NON_BLOCKING_WR; in dw_mci_exynos_priv_init()
123 mci_writel(host, HS400_DQS_EN, priv->saved_dqs_en); in dw_mci_exynos_priv_init()
124 if (!priv->dqs_delay) in dw_mci_exynos_priv_init()
125 priv->dqs_delay = in dw_mci_exynos_priv_init()
126 DQS_CTRL_GET_RD_DELAY(priv->saved_strobe_ctrl); in dw_mci_exynos_priv_init()
129 host->bus_hz /= (priv->ciu_div + 1); in dw_mci_exynos_priv_init()
136 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_set_clksel_timing()
139 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_set_clksel_timing()
140 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_set_clksel_timing()
147 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_set_clksel_timing()
148 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_set_clksel_timing()
160 if (!SDMMC_CLKSEL_GET_DRV_WD3(clksel) && host->slot) in dw_mci_exynos_set_clksel_timing()
161 set_bit(DW_MMC_CARD_NO_USE_HOLD, &host->slot->flags); in dw_mci_exynos_set_clksel_timing()
182 * dw_mci_exynos_suspend_noirq - Exynos-specific suspend code
194 * dw_mci_exynos_resume_noirq - Exynos-specific resume code
206 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_resume_noirq()
214 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_resume_noirq()
215 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_resume_noirq()
221 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_resume_noirq()
222 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_resume_noirq()
236 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_config_hs400()
243 if (priv->ctrl_type < DW_MCI_TYPE_EXYNOS5420) { in dw_mci_exynos_config_hs400()
245 dev_warn(host->dev, in dw_mci_exynos_config_hs400()
250 dqs = priv->saved_dqs_en; in dw_mci_exynos_config_hs400()
251 strobe = priv->saved_strobe_ctrl; in dw_mci_exynos_config_hs400()
255 strobe = DQS_CTRL_RD_DELAY(strobe, priv->dqs_delay); in dw_mci_exynos_config_hs400()
266 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_adjust_clock()
272 * ciu clock is unavailable in dw_mci_exynos_adjust_clock()
274 if (!wanted || IS_ERR(host->ciu_clk)) in dw_mci_exynos_adjust_clock()
281 if (wanted == priv->cur_speed) in dw_mci_exynos_adjust_clock()
285 ret = clk_set_rate(host->ciu_clk, wanted * div); in dw_mci_exynos_adjust_clock()
287 dev_warn(host->dev, in dw_mci_exynos_adjust_clock()
288 "failed to set clk-rate %u error: %d\n", in dw_mci_exynos_adjust_clock()
290 actual = clk_get_rate(host->ciu_clk); in dw_mci_exynos_adjust_clock()
291 host->bus_hz = actual / div; in dw_mci_exynos_adjust_clock()
292 priv->cur_speed = wanted; in dw_mci_exynos_adjust_clock()
293 host->current_speed = 0; in dw_mci_exynos_adjust_clock()
298 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_set_ios()
299 unsigned int wanted = ios->clock; in dw_mci_exynos_set_ios()
300 u32 timing = ios->timing, clksel; in dw_mci_exynos_set_ios()
304 /* Update tuned sample timing */ in dw_mci_exynos_set_ios()
306 priv->hs400_timing, priv->tuned_sample); in dw_mci_exynos_set_ios()
310 clksel = priv->ddr_timing; in dw_mci_exynos_set_ios()
312 if (ios->bus_width == MMC_BUS_WIDTH_8) in dw_mci_exynos_set_ios()
316 clksel = priv->sdr_timing; in dw_mci_exynos_set_ios()
332 struct device_node *np = host->dev->of_node; in dw_mci_exynos_parse_dt()
338 priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL); in dw_mci_exynos_parse_dt()
340 return -ENOMEM; in dw_mci_exynos_parse_dt()
344 priv->ctrl_type = exynos_compat[idx].ctrl_type; in dw_mci_exynos_parse_dt()
347 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4412) in dw_mci_exynos_parse_dt()
348 priv->ciu_div = EXYNOS4412_FIXED_CIU_CLK_DIV - 1; in dw_mci_exynos_parse_dt()
349 else if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS4210) in dw_mci_exynos_parse_dt()
350 priv->ciu_div = EXYNOS4210_FIXED_CIU_CLK_DIV - 1; in dw_mci_exynos_parse_dt()
352 of_property_read_u32(np, "samsung,dw-mshc-ciu-div", &div); in dw_mci_exynos_parse_dt()
353 priv->ciu_div = div; in dw_mci_exynos_parse_dt()
357 "samsung,dw-mshc-sdr-timing", timing, 2); in dw_mci_exynos_parse_dt()
361 priv->sdr_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], div); in dw_mci_exynos_parse_dt()
364 "samsung,dw-mshc-ddr-timing", timing, 2); in dw_mci_exynos_parse_dt()
368 priv->ddr_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], div); in dw_mci_exynos_parse_dt()
371 "samsung,dw-mshc-hs400-timing", timing, 2); in dw_mci_exynos_parse_dt()
373 "samsung,read-strobe-delay", &priv->dqs_delay)) in dw_mci_exynos_parse_dt()
374 dev_dbg(host->dev, in dw_mci_exynos_parse_dt()
375 "read-strobe-delay is not found, assuming usage of default value\n"); in dw_mci_exynos_parse_dt()
377 priv->hs400_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], in dw_mci_exynos_parse_dt()
379 host->priv = priv; in dw_mci_exynos_parse_dt()
385 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_get_clksmpl()
387 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_get_clksmpl()
388 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_get_clksmpl()
394 static inline void dw_mci_exynos_set_clksmpl(struct dw_mci *host, u8 sample) in dw_mci_exynos_set_clksmpl() argument
397 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_set_clksmpl()
399 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_set_clksmpl()
400 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_set_clksmpl()
404 clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample); in dw_mci_exynos_set_clksmpl()
405 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_set_clksmpl()
406 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_set_clksmpl()
414 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_move_next_clksmpl()
416 u8 sample; in dw_mci_exynos_move_next_clksmpl() local
418 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_move_next_clksmpl()
419 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_move_next_clksmpl()
424 sample = (clksel + 1) & 0x7; in dw_mci_exynos_move_next_clksmpl()
425 clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample); in dw_mci_exynos_move_next_clksmpl()
427 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || in dw_mci_exynos_move_next_clksmpl()
428 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) in dw_mci_exynos_move_next_clksmpl()
433 return sample; in dw_mci_exynos_move_next_clksmpl()
440 s8 i, loc = -1; in dw_mci_exynos_get_best_clksmpl()
464 struct dw_mci *host = slot->host; in dw_mci_exynos_execute_tuning()
465 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_execute_tuning()
466 struct mmc_host *mmc = slot->mmc; in dw_mci_exynos_execute_tuning()
468 s8 found = -1; in dw_mci_exynos_execute_tuning()
485 priv->tuned_sample = found; in dw_mci_exynos_execute_tuning()
487 ret = -EIO; in dw_mci_exynos_execute_tuning()
496 struct dw_mci_exynos_priv_data *priv = host->priv; in dw_mci_exynos_prepare_hs400_tuning()
498 dw_mci_exynos_set_clksel_timing(host, priv->hs400_timing); in dw_mci_exynos_prepare_hs400_tuning()
499 dw_mci_exynos_adjust_clock(host, (ios->clock) << 1); in dw_mci_exynos_prepare_hs400_tuning()
523 { .compatible = "samsung,exynos4412-dw-mshc",
525 { .compatible = "samsung,exynos5250-dw-mshc",
527 { .compatible = "samsung,exynos5420-dw-mshc",
529 { .compatible = "samsung,exynos5420-dw-mshc-smu",
531 { .compatible = "samsung,exynos7-dw-mshc",
533 { .compatible = "samsung,exynos7-dw-mshc-smu",
545 match = of_match_node(dw_mci_exynos_match, pdev->dev.of_node); in dw_mci_exynos_probe()
546 drv_data = match->data; in dw_mci_exynos_probe()
548 pm_runtime_get_noresume(&pdev->dev); in dw_mci_exynos_probe()
549 pm_runtime_set_active(&pdev->dev); in dw_mci_exynos_probe()
550 pm_runtime_enable(&pdev->dev); in dw_mci_exynos_probe()
554 pm_runtime_disable(&pdev->dev); in dw_mci_exynos_probe()
555 pm_runtime_set_suspended(&pdev->dev); in dw_mci_exynos_probe()
556 pm_runtime_put_noidle(&pdev->dev); in dw_mci_exynos_probe()
566 pm_runtime_disable(&pdev->dev); in dw_mci_exynos_remove()
567 pm_runtime_set_suspended(&pdev->dev); in dw_mci_exynos_remove()
568 pm_runtime_put_noidle(&pdev->dev); in dw_mci_exynos_remove()
593 MODULE_DESCRIPTION("Samsung Specific DW-MSHC Driver Extension");