15 #include <linux/mmc/slot-gpio.h>
16 #include "sdhci-pltfm.h"
35 	 * 8bit-width enable bit of CSR SD hosts is 3,  in sdhci_sirf_set_bus_width()
48 	u32 val = readl(host->ioaddr + reg);  in sdhci_sirf_readl_le()
51 			(host->mmc->caps & MMC_CAP_UHS_SDR50))) {  in sdhci_sirf_readl_le()
70 	ret = readw(host->ioaddr + reg);  in sdhci_sirf_readw_le()
73 		ret = readw(host->ioaddr + SDHCI_HOST_VERSION);  in sdhci_sirf_readw_le()
83 	int phase;  in sdhci_sirf_execute_tuning()  local
86 	int start = -1, end = 0, tuning_value = -1, range = 0;  in sdhci_sirf_execute_tuning()
88 	struct mmc_host *mmc = host->mmc;  in sdhci_sirf_execute_tuning()
94 	phase = 0;  in sdhci_sirf_execute_tuning()
98 			clock_setting | phase,  in sdhci_sirf_execute_tuning()
104 			dev_dbg(mmc_dev(mmc), "%s: Found good phase = %d\n",  in sdhci_sirf_execute_tuning()
105 				 mmc_hostname(mmc), phase);  in sdhci_sirf_execute_tuning()
106 			if (start == -1)  in sdhci_sirf_execute_tuning()
107 				start = phase;  in sdhci_sirf_execute_tuning()
108 			end = phase;  in sdhci_sirf_execute_tuning()
110 			if (phase == (SIRF_TUNING_COUNT - 1)  in sdhci_sirf_execute_tuning()
114 			dev_dbg(mmc_dev(mmc), "%s: Found bad phase = %d\n",  in sdhci_sirf_execute_tuning()
115 				 mmc_hostname(mmc), phase);  in sdhci_sirf_execute_tuning()
120 			start = -1;  in sdhci_sirf_execute_tuning()
123 	} while (++phase < SIRF_TUNING_COUNT);  in sdhci_sirf_execute_tuning()
127 		 * Finally set the selected phase in delay  in sdhci_sirf_execute_tuning()
130 		phase = tuning_value;  in sdhci_sirf_execute_tuning()
132 			clock_setting | phase,  in sdhci_sirf_execute_tuning()
135 		dev_dbg(mmc_dev(mmc), "%s: Setting the tuning phase to %d\n",  in sdhci_sirf_execute_tuning()
136 			 mmc_hostname(mmc), phase);  in sdhci_sirf_execute_tuning()
138 		if (--tuning_seq_cnt)  in sdhci_sirf_execute_tuning()
143 		rc = -EIO;  in sdhci_sirf_execute_tuning()
174 	struct clk *clk;  in sdhci_sirf_probe()  local
178 	clk = devm_clk_get(&pdev->dev, NULL);  in sdhci_sirf_probe()
179 	if (IS_ERR(clk)) {  in sdhci_sirf_probe()
180 		dev_err(&pdev->dev, "unable to get clock");  in sdhci_sirf_probe()
181 		return PTR_ERR(clk);  in sdhci_sirf_probe()
184 	if (pdev->dev.of_node)  in sdhci_sirf_probe()
185 		gpio_cd = of_get_named_gpio(pdev->dev.of_node, "cd-gpios", 0);  in sdhci_sirf_probe()
187 		gpio_cd = -EINVAL;  in sdhci_sirf_probe()
194 	pltfm_host->clk = clk;  in sdhci_sirf_probe()
196 	priv->gpio_cd = gpio_cd;  in sdhci_sirf_probe()
200 	ret = clk_prepare_enable(pltfm_host->clk);  in sdhci_sirf_probe()
212 	if (gpio_is_valid(priv->gpio_cd)) {  in sdhci_sirf_probe()
213 		ret = mmc_gpio_request_cd(host->mmc, priv->gpio_cd, 0);  in sdhci_sirf_probe()
215 			dev_err(&pdev->dev, "card detect irq request failed: %d\n",  in sdhci_sirf_probe()
219 		mmc_gpiod_request_cd_irq(host->mmc);  in sdhci_sirf_probe()
227 	clk_disable_unprepare(pltfm_host->clk);  in sdhci_sirf_probe()
234 	{ .compatible = "sirf,prima2-sdhc" },
241 		.name	= "sdhci-sirf",