3  *  JZ4740 SoC NAND controller driver
83 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_select_chip()  local
88 	ctrl = readl(nand->base + JZ_REG_NAND_CTRL);  in jz_nand_select_chip()
94 		banknr = nand->banks[chipnr] - 1;  in jz_nand_select_chip()
95 		chip->IO_ADDR_R = nand->bank_base[banknr];  in jz_nand_select_chip()
96 		chip->IO_ADDR_W = nand->bank_base[banknr];  in jz_nand_select_chip()
98 	writel(ctrl, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_select_chip()
100 	nand->selected_bank = banknr;  in jz_nand_select_chip()
105 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_cmd_ctrl()  local
108 	void __iomem *bank_base = nand->bank_base[nand->selected_bank];  in jz_nand_cmd_ctrl()
110 	BUG_ON(nand->selected_bank < 0);  in jz_nand_cmd_ctrl()
120 		reg = readl(nand->base + JZ_REG_NAND_CTRL);  in jz_nand_cmd_ctrl()
122 			reg |= JZ_NAND_CTRL_ASSERT_CHIP(nand->selected_bank);  in jz_nand_cmd_ctrl()
124 			reg &= ~JZ_NAND_CTRL_ASSERT_CHIP(nand->selected_bank);  in jz_nand_cmd_ctrl()
125 		writel(reg, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_cmd_ctrl()
133 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_dev_ready()  local
134 	return gpiod_get_value_cansleep(nand->busy_gpio);  in jz_nand_dev_ready()
139 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_hwctl()  local
142 	writel(0, nand->base + JZ_REG_NAND_IRQ_STAT);  in jz_nand_hwctl()
143 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_hwctl()
152 		nand->is_reading = true;  in jz_nand_hwctl()
156 		nand->is_reading = false;  in jz_nand_hwctl()
162 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_hwctl()
168 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_calculate_ecc_rs()  local
175 	if (nand->is_reading)  in jz_nand_calculate_ecc_rs()
179 		status = readl(nand->base + JZ_REG_NAND_IRQ_STAT);  in jz_nand_calculate_ecc_rs()
185 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_calculate_ecc_rs()
187 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_calculate_ecc_rs()
190 		ecc_code[i] = readb(nand->base + JZ_REG_NAND_PAR0 + i);  in jz_nand_calculate_ecc_rs()
221 	struct jz_nand *nand = mtd_to_jz_nand(mtd);  in jz_nand_correct_ecc_rs()  local
227 		writeb(read_ecc[i], nand->base + JZ_REG_NAND_PAR0 + i);  in jz_nand_correct_ecc_rs()
229 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_correct_ecc_rs()
231 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_correct_ecc_rs()
234 		status = readl(nand->base + JZ_REG_NAND_IRQ_STAT);  in jz_nand_correct_ecc_rs()
240 	reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_correct_ecc_rs()
242 	writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);  in jz_nand_correct_ecc_rs()
251 			error = readl(nand->base + JZ_REG_NAND_ERR(i));  in jz_nand_correct_ecc_rs()
308 			       struct jz_nand *nand, unsigned char bank,  in jz_nand_detect_bank()  argument
315 	struct nand_chip *chip = &nand->chip;  in jz_nand_detect_bank()
322 					&nand->bank_mem[bank - 1],  in jz_nand_detect_bank()
323 					&nand->bank_base[bank - 1]);  in jz_nand_detect_bank()
328 	ctrl = readl(nand->base + JZ_REG_NAND_CTRL);  in jz_nand_detect_bank()
330 	writel(ctrl, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_detect_bank()
365 	writel(ctrl, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_detect_bank()
366 	jz_nand_iounmap_resource(nand->bank_mem[bank - 1],  in jz_nand_detect_bank()
367 				 nand->bank_base[bank - 1]);  in jz_nand_detect_bank()
392 	struct jz_nand *nand;  in jz_nand_probe()  local
399 	nand = kzalloc(sizeof(*nand), GFP_KERNEL);  in jz_nand_probe()
400 	if (!nand)  in jz_nand_probe()
403 	ret = jz_nand_ioremap_resource(pdev, "mmio", &nand->mem, &nand->base);  in jz_nand_probe()
407 	nand->busy_gpio = devm_gpiod_get_optional(&pdev->dev, "busy", GPIOD_IN);  in jz_nand_probe()
408 	if (IS_ERR(nand->busy_gpio)) {  in jz_nand_probe()
409 		ret = PTR_ERR(nand->busy_gpio);  in jz_nand_probe()
415 	chip		= &nand->chip;  in jz_nand_probe()
418 	mtd->name	= "jz4740-nand";  in jz_nand_probe()
434 	if (nand->busy_gpio)  in jz_nand_probe()
437 	platform_set_drvdata(pdev, nand);  in jz_nand_probe()
439 	/* We are going to autodetect NAND chips in the banks specified in the  in jz_nand_probe()
444 	 * produced at different times have NAND chips in different banks.  in jz_nand_probe()
450 		/* If there is no platform data, look for NAND in bank 1,  in jz_nand_probe()
463 		 * jz_nand_select_chip(), so nand->banks has to contain the  in jz_nand_probe()
466 		nand->banks[chipnr] = bank;  in jz_nand_probe()
467 		if (jz_nand_detect_bank(pdev, nand, bank, chipnr,  in jz_nand_probe()
471 			nand->banks[chipnr] = 0;  in jz_nand_probe()
474 		dev_err(&pdev->dev, "No NAND chips found\n");  in jz_nand_probe()
486 	dev_info(&pdev->dev, "Successfully registered JZ4740 NAND driver\n");  in jz_nand_probe()
493 		unsigned char bank = nand->banks[chipnr];  in jz_nand_probe()
494 		jz_nand_iounmap_resource(nand->bank_mem[bank - 1],  in jz_nand_probe()
495 					 nand->bank_base[bank - 1]);  in jz_nand_probe()
497 	writel(0, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_probe()
499 	jz_nand_iounmap_resource(nand->mem, nand->base);  in jz_nand_probe()
501 	kfree(nand);  in jz_nand_probe()
507 	struct jz_nand *nand = platform_get_drvdata(pdev);  in jz_nand_remove()  local
510 	nand_release(&nand->chip);  in jz_nand_remove()
513 	writel(0, nand->base + JZ_REG_NAND_CTRL);  in jz_nand_remove()
516 		unsigned char bank = nand->banks[i];  in jz_nand_remove()
518 			jz_nand_iounmap_resource(nand->bank_mem[bank - 1],  in jz_nand_remove()
519 						 nand->bank_base[bank - 1]);  in jz_nand_remove()
523 	jz_nand_iounmap_resource(nand->mem, nand->base);  in jz_nand_remove()
525 	kfree(nand);  in jz_nand_remove()
534 		.name = "jz4740-nand",
542 MODULE_DESCRIPTION("NAND controller driver for JZ4740 SoC");
543 MODULE_ALIAS("platform:jz4740-nand");