Lines Matching full:nfc
30 /* NFC does not support transfers of larger chunks at a time */
39 /* Latency in clock cycles between SoC pins and NFC logic */
429 static void marvell_nfc_disable_int(struct marvell_nfc *nfc, u32 int_mask) in marvell_nfc_disable_int() argument
434 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_disable_int()
435 writel_relaxed(reg | int_mask, nfc->regs + NDCR); in marvell_nfc_disable_int()
438 static void marvell_nfc_enable_int(struct marvell_nfc *nfc, u32 int_mask) in marvell_nfc_enable_int() argument
443 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_enable_int()
444 writel_relaxed(reg & ~int_mask, nfc->regs + NDCR); in marvell_nfc_enable_int()
447 static u32 marvell_nfc_clear_int(struct marvell_nfc *nfc, u32 int_mask) in marvell_nfc_clear_int() argument
451 reg = readl_relaxed(nfc->regs + NDSR); in marvell_nfc_clear_int()
452 writel_relaxed(int_mask, nfc->regs + NDSR); in marvell_nfc_clear_int()
460 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_force_byte_access() local
472 ndcr = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_force_byte_access()
479 writel_relaxed(ndcr, nfc->regs + NDCR); in marvell_nfc_force_byte_access()
484 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_wait_ndrun() local
490 * cleared by the NFC. If not, we must clear it by hand. in marvell_nfc_wait_ndrun()
492 ret = readl_relaxed_poll_timeout(nfc->regs + NDCR, val, in marvell_nfc_wait_ndrun()
496 dev_err(nfc->dev, "Timeout on NAND controller run mode\n"); in marvell_nfc_wait_ndrun()
497 writel_relaxed(readl(nfc->regs + NDCR) & ~NDCR_ND_RUN, in marvell_nfc_wait_ndrun()
498 nfc->regs + NDCR); in marvell_nfc_wait_ndrun()
510 * -> wait the signal indicating the NFC is waiting for a command
522 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_prepare_cmd() local
529 dev_err(nfc->dev, "Last operation did not succeed\n"); in marvell_nfc_prepare_cmd()
533 ndcr = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_prepare_cmd()
534 writel_relaxed(readl(nfc->regs + NDSR), nfc->regs + NDSR); in marvell_nfc_prepare_cmd()
536 /* Assert ND_RUN bit and wait the NFC to be ready */ in marvell_nfc_prepare_cmd()
537 writel_relaxed(ndcr | NDCR_ND_RUN, nfc->regs + NDCR); in marvell_nfc_prepare_cmd()
538 ret = readl_relaxed_poll_timeout(nfc->regs + NDSR, val, in marvell_nfc_prepare_cmd()
542 dev_err(nfc->dev, "Timeout on WRCMDRE\n"); in marvell_nfc_prepare_cmd()
547 writel_relaxed(NDSR_WRCMDREQ, nfc->regs + NDSR); in marvell_nfc_prepare_cmd()
556 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_send_cmd() local
558 dev_dbg(nfc->dev, "\nNDCR: 0x%08x\n" in marvell_nfc_send_cmd()
560 (u32)readl_relaxed(nfc->regs + NDCR), nfc_op->ndcb[0], in marvell_nfc_send_cmd()
564 nfc->regs + NDCB0); in marvell_nfc_send_cmd()
565 writel_relaxed(nfc_op->ndcb[1], nfc->regs + NDCB0); in marvell_nfc_send_cmd()
566 writel(nfc_op->ndcb[2], nfc->regs + NDCB0); in marvell_nfc_send_cmd()
574 if (!WARN_ON_ONCE(!nfc->caps->is_nfcv2)) in marvell_nfc_send_cmd()
575 writel(nfc_op->ndcb[3], nfc->regs + NDCB0); in marvell_nfc_send_cmd()
582 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_end_cmd() local
586 ret = readl_relaxed_poll_timeout(nfc->regs + NDSR, val, in marvell_nfc_end_cmd()
591 dev_err(nfc->dev, "Timeout on %s (NDSR: 0x%08x)\n", in marvell_nfc_end_cmd()
593 if (nfc->dma_chan) in marvell_nfc_end_cmd()
594 dmaengine_terminate_all(nfc->dma_chan); in marvell_nfc_end_cmd()
602 if (nfc->use_dma && (readl_relaxed(nfc->regs + NDCR) & NDCR_DMA_EN)) in marvell_nfc_end_cmd()
605 writel_relaxed(flag, nfc->regs + NDSR); in marvell_nfc_end_cmd()
620 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_wait_op() local
628 init_completion(&nfc->complete); in marvell_nfc_wait_op()
630 marvell_nfc_enable_int(nfc, NDCR_RDYM); in marvell_nfc_wait_op()
631 ret = wait_for_completion_timeout(&nfc->complete, in marvell_nfc_wait_op()
633 marvell_nfc_disable_int(nfc, NDCR_RDYM); in marvell_nfc_wait_op()
634 pending = marvell_nfc_clear_int(nfc, NDSR_RDY(0) | NDSR_RDY(1)); in marvell_nfc_wait_op()
641 dev_err(nfc->dev, "Timeout waiting for RB signal\n"); in marvell_nfc_wait_op()
652 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_select_chip() local
655 if (chip == nfc->selected_chip && die_nr == marvell_nand->selected_die) in marvell_nfc_select_chip()
659 nfc->selected_chip = NULL; in marvell_nfc_select_chip()
664 writel_relaxed(marvell_nand->ndtr0, nfc->regs + NDTR0); in marvell_nfc_select_chip()
665 writel_relaxed(marvell_nand->ndtr1, nfc->regs + NDTR1); in marvell_nfc_select_chip()
671 ndcr_generic = readl_relaxed(nfc->regs + NDCR) & in marvell_nfc_select_chip()
673 writel_relaxed(ndcr_generic | marvell_nand->ndcr, nfc->regs + NDCR); in marvell_nfc_select_chip()
676 marvell_nfc_clear_int(nfc, NDCR_ALL_INT); in marvell_nfc_select_chip()
678 nfc->selected_chip = chip; in marvell_nfc_select_chip()
684 struct marvell_nfc *nfc = dev_id; in marvell_nfc_isr() local
685 u32 st = readl_relaxed(nfc->regs + NDSR); in marvell_nfc_isr()
686 u32 ien = (~readl_relaxed(nfc->regs + NDCR)) & NDCR_ALL_INT; in marvell_nfc_isr()
698 marvell_nfc_disable_int(nfc, st & NDCR_ALL_INT); in marvell_nfc_isr()
701 complete(&nfc->complete); in marvell_nfc_isr()
709 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_enable_hw_ecc() local
710 u32 ndcr = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_enable_hw_ecc()
713 writel_relaxed(ndcr | NDCR_ECC_EN, nfc->regs + NDCR); in marvell_nfc_enable_hw_ecc()
720 writel_relaxed(NDECCCTRL_BCH_EN, nfc->regs + NDECCCTRL); in marvell_nfc_enable_hw_ecc()
726 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_disable_hw_ecc() local
727 u32 ndcr = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_disable_hw_ecc()
730 writel_relaxed(ndcr & ~NDCR_ECC_EN, nfc->regs + NDCR); in marvell_nfc_disable_hw_ecc()
732 writel_relaxed(0, nfc->regs + NDECCCTRL); in marvell_nfc_disable_hw_ecc()
737 static void marvell_nfc_enable_dma(struct marvell_nfc *nfc) in marvell_nfc_enable_dma() argument
741 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_enable_dma()
742 writel_relaxed(reg | NDCR_DMA_EN, nfc->regs + NDCR); in marvell_nfc_enable_dma()
745 static void marvell_nfc_disable_dma(struct marvell_nfc *nfc) in marvell_nfc_disable_dma() argument
749 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_disable_dma()
750 writel_relaxed(reg & ~NDCR_DMA_EN, nfc->regs + NDCR); in marvell_nfc_disable_dma()
754 static int marvell_nfc_xfer_data_dma(struct marvell_nfc *nfc, in marvell_nfc_xfer_data_dma() argument
764 marvell_nfc_enable_dma(nfc); in marvell_nfc_xfer_data_dma()
766 sg_init_one(&sg, nfc->dma_buf, dma_len); in marvell_nfc_xfer_data_dma()
767 dma_map_sg(nfc->dma_chan->device->dev, &sg, 1, direction); in marvell_nfc_xfer_data_dma()
768 tx = dmaengine_prep_slave_sg(nfc->dma_chan, &sg, 1, in marvell_nfc_xfer_data_dma()
773 dev_err(nfc->dev, "Could not prepare DMA S/G list\n"); in marvell_nfc_xfer_data_dma()
783 dma_async_issue_pending(nfc->dma_chan); in marvell_nfc_xfer_data_dma()
784 ret = marvell_nfc_wait_cmdd(nfc->selected_chip); in marvell_nfc_xfer_data_dma()
785 dma_unmap_sg(nfc->dma_chan->device->dev, &sg, 1, direction); in marvell_nfc_xfer_data_dma()
786 marvell_nfc_disable_dma(nfc); in marvell_nfc_xfer_data_dma()
788 dev_err(nfc->dev, "Timeout waiting for DMA (status: %d)\n", in marvell_nfc_xfer_data_dma()
789 dmaengine_tx_status(nfc->dma_chan, cookie, NULL)); in marvell_nfc_xfer_data_dma()
790 dmaengine_terminate_all(nfc->dma_chan); in marvell_nfc_xfer_data_dma()
797 static int marvell_nfc_xfer_data_in_pio(struct marvell_nfc *nfc, u8 *in, in marvell_nfc_xfer_data_in_pio() argument
805 ioread32_rep(nfc->regs + NDDB, in + i, FIFO_REP(FIFO_DEPTH)); in marvell_nfc_xfer_data_in_pio()
810 ioread32_rep(nfc->regs + NDDB, tmp_buf, FIFO_REP(FIFO_DEPTH)); in marvell_nfc_xfer_data_in_pio()
817 static int marvell_nfc_xfer_data_out_pio(struct marvell_nfc *nfc, const u8 *out, in marvell_nfc_xfer_data_out_pio() argument
825 iowrite32_rep(nfc->regs + NDDB, out + i, FIFO_REP(FIFO_DEPTH)); in marvell_nfc_xfer_data_out_pio()
831 iowrite32_rep(nfc->regs + NDDB, tmp_buf, FIFO_REP(FIFO_DEPTH)); in marvell_nfc_xfer_data_out_pio()
881 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_hw_ecc_correct() local
885 ndsr = readl_relaxed(nfc->regs + NDSR); in marvell_nfc_hw_ecc_correct()
889 writel_relaxed(ndsr, nfc->regs + NDSR); in marvell_nfc_hw_ecc_correct()
903 writel_relaxed(ndsr, nfc->regs + NDSR); in marvell_nfc_hw_ecc_correct()
924 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_hw_ecc_hmg_do_read_page() local
939 if (nfc->caps->is_nfcv2) in marvell_nfc_hw_ecc_hmg_do_read_page()
958 if (nfc->use_dma) { in marvell_nfc_hw_ecc_hmg_do_read_page()
959 marvell_nfc_xfer_data_dma(nfc, DMA_FROM_DEVICE, in marvell_nfc_hw_ecc_hmg_do_read_page()
961 memcpy(data_buf, nfc->dma_buf, lt->data_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page()
962 memcpy(oob_buf, nfc->dma_buf + lt->data_bytes, oob_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page()
964 marvell_nfc_xfer_data_in_pio(nfc, data_buf, lt->data_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page()
965 marvell_nfc_xfer_data_in_pio(nfc, oob_buf, oob_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page()
1039 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_hw_ecc_hmg_do_write_page() local
1054 if (nfc->caps->is_nfcv2) in marvell_nfc_hw_ecc_hmg_do_write_page()
1068 if (nfc->use_dma) { in marvell_nfc_hw_ecc_hmg_do_write_page()
1069 memcpy(nfc->dma_buf, data_buf, lt->data_bytes); in marvell_nfc_hw_ecc_hmg_do_write_page()
1070 memcpy(nfc->dma_buf + lt->data_bytes, oob_buf, oob_bytes); in marvell_nfc_hw_ecc_hmg_do_write_page()
1071 marvell_nfc_xfer_data_dma(nfc, DMA_TO_DEVICE, lt->data_bytes + in marvell_nfc_hw_ecc_hmg_do_write_page()
1074 marvell_nfc_xfer_data_out_pio(nfc, data_buf, lt->data_bytes); in marvell_nfc_hw_ecc_hmg_do_write_page()
1075 marvell_nfc_xfer_data_out_pio(nfc, oob_buf, oob_bytes); in marvell_nfc_hw_ecc_hmg_do_write_page()
1181 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_hw_ecc_bch_read_chunk() local
1228 marvell_nfc_xfer_data_in_pio(nfc, data, in marvell_nfc_hw_ecc_bch_read_chunk()
1236 marvell_nfc_xfer_data_in_pio(nfc, spare, in marvell_nfc_hw_ecc_bch_read_chunk()
1417 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_hw_ecc_bch_write_chunk() local
1466 iowrite32_rep(nfc->regs + NDDB, data, FIFO_REP(data_len)); in marvell_nfc_hw_ecc_bch_write_chunk()
1467 iowrite32_rep(nfc->regs + NDDB, spare, FIFO_REP(spare_len)); in marvell_nfc_hw_ecc_bch_write_chunk()
1550 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_parse_instructions() local
1603 if (nfc->caps->is_nfcv2) { in marvell_nfc_parse_instructions()
1617 if (nfc->caps->is_nfcv2) { in marvell_nfc_parse_instructions()
1639 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_xfer_data_pio() local
1653 ret = marvell_nfc_xfer_data_in_pio(nfc, in, len); in marvell_nfc_xfer_data_pio()
1657 ret = marvell_nfc_xfer_data_out_pio(nfc, out, len); in marvell_nfc_xfer_data_pio()
1721 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_monolithic_access_exec() local
1723 writel_relaxed(readl(nfc->regs + NDCR) & ~NDCR_ND_RUN, in marvell_nfc_monolithic_access_exec()
1724 nfc->regs + NDCR); in marvell_nfc_monolithic_access_exec()
1793 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_naked_access_exec() local
1795 writel_relaxed(readl(nfc->regs + NDCR) & ~NDCR_ND_RUN, in marvell_nfc_naked_access_exec()
1796 nfc->regs + NDCR); in marvell_nfc_naked_access_exec()
2018 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_exec_op() local
2020 if (nfc->caps->is_nfcv2) in marvell_nfc_exec_op()
2081 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nand_hw_ecc_ctrl_init() local
2085 if (!nfc->caps->is_nfcv2 && in marvell_nand_hw_ecc_ctrl_init()
2087 dev_err(nfc->dev, in marvell_nand_hw_ecc_ctrl_init()
2104 (!nfc->caps->is_nfcv2 && ecc->strength > 1)) { in marvell_nand_hw_ecc_ctrl_init()
2105 dev_err(nfc->dev, in marvell_nand_hw_ecc_ctrl_init()
2145 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nand_ecc_init() local
2153 dev_info(nfc->dev, in marvell_nand_ecc_init()
2169 if (!nfc->caps->is_nfcv2 && mtd->writesize != SZ_512 && in marvell_nand_ecc_init()
2171 dev_err(nfc->dev, "NFCv1 cannot write %d bytes pages\n", in marvell_nand_ecc_init()
2212 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_setup_data_interface() local
2213 unsigned int period_ns = 1000000000 / clk_get_rate(nfc->core_clk) * 2; in marvell_nfc_setup_data_interface()
2223 * SDR timings are given in pico-seconds while NFC timings must be in marvell_nfc_setup_data_interface()
2229 * NFC datasheet gives equations from which thoses calculations in marvell_nfc_setup_data_interface()
2241 * Read delay is the time of propagation from SoC pins to NFC internal in marvell_nfc_setup_data_interface()
2264 if (nfc->caps->is_nfcv2) { in marvell_nfc_setup_data_interface()
2292 if (nfc->caps->is_nfcv2) { in marvell_nfc_setup_data_interface()
2310 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nand_attach_chip() local
2311 struct pxa3xx_nand_platform_data *pdata = dev_get_platdata(nfc->dev); in marvell_nand_attach_chip()
2363 dev_err(nfc->dev, "ECC init failed: %d\n", ret); in marvell_nand_attach_chip()
2377 if (pdata || nfc->caps->legacy_of_bindings) { in marvell_nand_attach_chip()
2395 mtd->name = devm_kasprintf(nfc->dev, GFP_KERNEL, in marvell_nand_attach_chip()
2396 "%s:nand.%d", dev_name(nfc->dev), in marvell_nand_attach_chip()
2399 dev_err(nfc->dev, "Failed to allocate mtd->name\n"); in marvell_nand_attach_chip()
2411 static int marvell_nand_chip_init(struct device *dev, struct marvell_nfc *nfc, in marvell_nand_chip_init() argument
2430 if (pdata || nfc->caps->legacy_of_bindings) { in marvell_nand_chip_init()
2454 if (pdata || nfc->caps->legacy_of_bindings) { in marvell_nand_chip_init()
2470 if (cs >= nfc->caps->max_cs_nb) { in marvell_nand_chip_init()
2472 cs, nfc->caps->max_cs_nb); in marvell_nand_chip_init()
2476 if (test_and_set_bit(cs, &nfc->assigned_cs)) { in marvell_nand_chip_init()
2504 if (pdata || nfc->caps->legacy_of_bindings) { in marvell_nand_chip_init()
2518 if (rb >= nfc->caps->max_rb_nb) { in marvell_nand_chip_init()
2520 rb, nfc->caps->max_rb_nb); in marvell_nand_chip_init()
2528 chip->controller = &nfc->controller; in marvell_nand_chip_init()
2549 marvell_nand->ndtr0 = readl_relaxed(nfc->regs + NDTR0); in marvell_nand_chip_init()
2550 marvell_nand->ndtr1 = readl_relaxed(nfc->regs + NDTR1); in marvell_nand_chip_init()
2571 list_add_tail(&marvell_nand->node, &nfc->chips); in marvell_nand_chip_init()
2576 static void marvell_nand_chips_cleanup(struct marvell_nfc *nfc) in marvell_nand_chips_cleanup() argument
2580 list_for_each_entry_safe(entry, temp, &nfc->chips, node) { in marvell_nand_chips_cleanup()
2586 static int marvell_nand_chips_init(struct device *dev, struct marvell_nfc *nfc) in marvell_nand_chips_init() argument
2590 int max_cs = nfc->caps->max_cs_nb; in marvell_nand_chips_init()
2611 if (nfc->caps->legacy_of_bindings) { in marvell_nand_chips_init()
2612 ret = marvell_nand_chip_init(dev, nfc, np); in marvell_nand_chips_init()
2617 ret = marvell_nand_chip_init(dev, nfc, nand_np); in marvell_nand_chips_init()
2627 marvell_nand_chips_cleanup(nfc); in marvell_nand_chips_init()
2632 static int marvell_nfc_init_dma(struct marvell_nfc *nfc) in marvell_nfc_init_dma() argument
2634 struct platform_device *pdev = container_of(nfc->dev, in marvell_nfc_init_dma()
2642 dev_warn(nfc->dev, in marvell_nfc_init_dma()
2647 ret = dma_set_mask_and_coherent(nfc->dev, DMA_BIT_MASK(32)); in marvell_nfc_init_dma()
2651 nfc->dma_chan = dma_request_slave_channel(nfc->dev, "data"); in marvell_nfc_init_dma()
2652 if (!nfc->dma_chan) { in marvell_nfc_init_dma()
2653 dev_err(nfc->dev, in marvell_nfc_init_dma()
2668 ret = dmaengine_slave_config(nfc->dma_chan, &config); in marvell_nfc_init_dma()
2670 dev_err(nfc->dev, "Failed to configure DMA channel\n"); in marvell_nfc_init_dma()
2680 nfc->dma_buf = kmalloc(MAX_CHUNK_SIZE, GFP_KERNEL | GFP_DMA); in marvell_nfc_init_dma()
2681 if (!nfc->dma_buf) in marvell_nfc_init_dma()
2684 nfc->use_dma = true; in marvell_nfc_init_dma()
2689 static void marvell_nfc_reset(struct marvell_nfc *nfc) in marvell_nfc_reset() argument
2699 NDCR_RD_ID_CNT(NFCV1_READID_LEN), nfc->regs + NDCR); in marvell_nfc_reset()
2700 writel_relaxed(0xFFFFFFFF, nfc->regs + NDSR); in marvell_nfc_reset()
2701 writel_relaxed(0, nfc->regs + NDECCCTRL); in marvell_nfc_reset()
2704 static int marvell_nfc_init(struct marvell_nfc *nfc) in marvell_nfc_init() argument
2706 struct device_node *np = nfc->dev->of_node; in marvell_nfc_init()
2714 if (nfc->caps->need_system_controller) { in marvell_nfc_init()
2738 if (!nfc->caps->is_nfcv2) in marvell_nfc_init()
2739 marvell_nfc_init_dma(nfc); in marvell_nfc_init()
2741 marvell_nfc_reset(nfc); in marvell_nfc_init()
2750 struct marvell_nfc *nfc; in marvell_nfc_probe() local
2754 nfc = devm_kzalloc(&pdev->dev, sizeof(struct marvell_nfc), in marvell_nfc_probe()
2756 if (!nfc) in marvell_nfc_probe()
2759 nfc->dev = dev; in marvell_nfc_probe()
2760 nand_controller_init(&nfc->controller); in marvell_nfc_probe()
2761 nfc->controller.ops = &marvell_nand_controller_ops; in marvell_nfc_probe()
2762 INIT_LIST_HEAD(&nfc->chips); in marvell_nfc_probe()
2765 nfc->regs = devm_ioremap_resource(dev, r); in marvell_nfc_probe()
2766 if (IS_ERR(nfc->regs)) in marvell_nfc_probe()
2767 return PTR_ERR(nfc->regs); in marvell_nfc_probe()
2775 nfc->core_clk = devm_clk_get(&pdev->dev, "core"); in marvell_nfc_probe()
2778 if (nfc->core_clk == ERR_PTR(-ENOENT)) in marvell_nfc_probe()
2779 nfc->core_clk = devm_clk_get(&pdev->dev, NULL); in marvell_nfc_probe()
2781 if (IS_ERR(nfc->core_clk)) in marvell_nfc_probe()
2782 return PTR_ERR(nfc->core_clk); in marvell_nfc_probe()
2784 ret = clk_prepare_enable(nfc->core_clk); in marvell_nfc_probe()
2788 nfc->reg_clk = devm_clk_get(&pdev->dev, "reg"); in marvell_nfc_probe()
2789 if (IS_ERR(nfc->reg_clk)) { in marvell_nfc_probe()
2790 if (PTR_ERR(nfc->reg_clk) != -ENOENT) { in marvell_nfc_probe()
2791 ret = PTR_ERR(nfc->reg_clk); in marvell_nfc_probe()
2795 nfc->reg_clk = NULL; in marvell_nfc_probe()
2798 ret = clk_prepare_enable(nfc->reg_clk); in marvell_nfc_probe()
2802 marvell_nfc_disable_int(nfc, NDCR_ALL_INT); in marvell_nfc_probe()
2803 marvell_nfc_clear_int(nfc, NDCR_ALL_INT); in marvell_nfc_probe()
2805 0, "marvell-nfc", nfc); in marvell_nfc_probe()
2811 nfc->caps = (void *)pdev->id_entry->driver_data; in marvell_nfc_probe()
2813 nfc->caps = of_device_get_match_data(&pdev->dev); in marvell_nfc_probe()
2815 if (!nfc->caps) { in marvell_nfc_probe()
2816 dev_err(dev, "Could not retrieve NFC caps\n"); in marvell_nfc_probe()
2822 ret = marvell_nfc_init(nfc); in marvell_nfc_probe()
2826 platform_set_drvdata(pdev, nfc); in marvell_nfc_probe()
2828 ret = marvell_nand_chips_init(dev, nfc); in marvell_nfc_probe()
2835 clk_disable_unprepare(nfc->reg_clk); in marvell_nfc_probe()
2837 clk_disable_unprepare(nfc->core_clk); in marvell_nfc_probe()
2844 struct marvell_nfc *nfc = platform_get_drvdata(pdev); in marvell_nfc_remove() local
2846 marvell_nand_chips_cleanup(nfc); in marvell_nfc_remove()
2848 if (nfc->use_dma) { in marvell_nfc_remove()
2849 dmaengine_terminate_all(nfc->dma_chan); in marvell_nfc_remove()
2850 dma_release_channel(nfc->dma_chan); in marvell_nfc_remove()
2853 clk_disable_unprepare(nfc->reg_clk); in marvell_nfc_remove()
2854 clk_disable_unprepare(nfc->core_clk); in marvell_nfc_remove()
2861 struct marvell_nfc *nfc = dev_get_drvdata(dev); in marvell_nfc_suspend() local
2864 list_for_each_entry(chip, &nfc->chips, node) in marvell_nfc_suspend()
2867 clk_disable_unprepare(nfc->reg_clk); in marvell_nfc_suspend()
2868 clk_disable_unprepare(nfc->core_clk); in marvell_nfc_suspend()
2875 struct marvell_nfc *nfc = dev_get_drvdata(dev); in marvell_nfc_resume() local
2878 ret = clk_prepare_enable(nfc->core_clk); in marvell_nfc_resume()
2882 ret = clk_prepare_enable(nfc->reg_clk); in marvell_nfc_resume()
2887 * Reset nfc->selected_chip so the next command will cause the timing in marvell_nfc_resume()
2890 nfc->selected_chip = NULL; in marvell_nfc_resume()
2893 marvell_nfc_reset(nfc); in marvell_nfc_resume()
2984 .name = "marvell-nfc",