19 #include <linux/mtd/spi-nor.h>
104 	struct spi_nor nor;  member
123  * CE0 and CE1 can only be of type SPI. CE2 can be of type NOR but the
281 static void aspeed_smc_start_user(struct spi_nor *nor)  in aspeed_smc_start_user()  argument
283 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_start_user()
300 static void aspeed_smc_stop_user(struct spi_nor *nor)  in aspeed_smc_stop_user()  argument
302 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_stop_user()
312 static int aspeed_smc_prep(struct spi_nor *nor, enum spi_nor_ops ops)  in aspeed_smc_prep()  argument
314 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_prep()
320 static void aspeed_smc_unprep(struct spi_nor *nor, enum spi_nor_ops ops)  in aspeed_smc_unprep()  argument
322 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_unprep()
327 static int aspeed_smc_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)  in aspeed_smc_read_reg()  argument
329 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_read_reg()
331 	aspeed_smc_start_user(nor);  in aspeed_smc_read_reg()
334 	aspeed_smc_stop_user(nor);  in aspeed_smc_read_reg()
338 static int aspeed_smc_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf,  in aspeed_smc_write_reg()  argument
341 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_write_reg()
343 	aspeed_smc_start_user(nor);  in aspeed_smc_write_reg()
346 	aspeed_smc_stop_user(nor);  in aspeed_smc_write_reg()
350 static void aspeed_smc_send_cmd_addr(struct spi_nor *nor, u8 cmd, u32 addr)  in aspeed_smc_send_cmd_addr()  argument
352 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_send_cmd_addr()
356 	switch (nor->addr_width) {  in aspeed_smc_send_cmd_addr()
359 			  nor->addr_width);  in aspeed_smc_send_cmd_addr()
376 static ssize_t aspeed_smc_read_user(struct spi_nor *nor, loff_t from,  in aspeed_smc_read_user()  argument
379 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_read_user()
383 	aspeed_smc_start_user(nor);  in aspeed_smc_read_user()
384 	aspeed_smc_send_cmd_addr(nor, nor->read_opcode, from);  in aspeed_smc_read_user()
385 	for (i = 0; i < chip->nor.read_dummy / 8; i++)  in aspeed_smc_read_user()
389 	aspeed_smc_stop_user(nor);  in aspeed_smc_read_user()
393 static ssize_t aspeed_smc_write_user(struct spi_nor *nor, loff_t to,  in aspeed_smc_write_user()  argument
396 	struct aspeed_smc_chip *chip = nor->priv;  in aspeed_smc_write_user()
398 	aspeed_smc_start_user(nor);  in aspeed_smc_write_user()
399 	aspeed_smc_send_cmd_addr(nor, nor->program_opcode, to);  in aspeed_smc_write_user()
401 	aspeed_smc_stop_user(nor);  in aspeed_smc_write_user()
413 			mtd_device_unregister(&chip->nor.mtd);  in aspeed_smc_unregister()
492 		dev_warn(chip->nor.dev, "CE%d window resized to %dMB",  in chip_set_segment()
506 		dev_err(chip->nor.dev, "CE%d window invalid", cs);  in chip_set_segment()
513 	dev_info(chip->nor.dev, "CE%d window [ 0x%.8x - 0x%.8x ] %dMB",  in chip_set_segment()
531 	u32 size = chip->nor.mtd.size;  in aspeed_smc_chip_set_segment()
557 		dev_info(chip->nor.dev,  in aspeed_smc_chip_set_segment()
591 	if (size < chip->nor.mtd.size)  in aspeed_smc_chip_set_segment()
592 		dev_warn(chip->nor.dev,  in aspeed_smc_chip_set_segment()
594 			 chip->cs, (u32)chip->nor.mtd.size >> 20);  in aspeed_smc_chip_set_segment()
671 		dev_warn(chip->nor.dev, "CE%d window closed", chip->cs);  in aspeed_smc_chip_setup_init()
715 	if (chip->nor.addr_width == 4 && info->set_4b)  in aspeed_smc_chip_setup_finish()
725 		chip->nor.program_opcode << CONTROL_COMMAND_SHIFT |  in aspeed_smc_chip_setup_finish()
733 	 * SPI-NOR flags to adjust controller settings.  in aspeed_smc_chip_setup_finish()
735 	if (chip->nor.read_proto == SNOR_PROTO_1_1_1) {  in aspeed_smc_chip_setup_finish()
736 		if (chip->nor.read_dummy == 0)  in aspeed_smc_chip_setup_finish()
741 		dev_err(chip->nor.dev, "unsupported SPI read mode\n");  in aspeed_smc_chip_setup_finish()
746 		CONTROL_IO_DUMMY_SET(chip->nor.read_dummy / 8);  in aspeed_smc_chip_setup_finish()
769 		struct spi_nor *nor;  in aspeed_smc_setup_flash()  local
772 		/* This driver does not support NAND or NOR flash devices. */  in aspeed_smc_setup_flash()
773 		if (!of_device_is_compatible(child, "jedec,spi-nor"))  in aspeed_smc_setup_flash()
791 				cs, dev_name(controller->chips[cs]->nor.dev));  in aspeed_smc_setup_flash()
806 		nor = &chip->nor;  in aspeed_smc_setup_flash()
807 		mtd = &nor->mtd;  in aspeed_smc_setup_flash()
809 		nor->dev = dev;  in aspeed_smc_setup_flash()
810 		nor->priv = chip;  in aspeed_smc_setup_flash()
811 		spi_nor_set_flash_node(nor, child);  in aspeed_smc_setup_flash()
812 		nor->read = aspeed_smc_read_user;  in aspeed_smc_setup_flash()
813 		nor->write = aspeed_smc_write_user;  in aspeed_smc_setup_flash()
814 		nor->read_reg = aspeed_smc_read_reg;  in aspeed_smc_setup_flash()
815 		nor->write_reg = aspeed_smc_write_reg;  in aspeed_smc_setup_flash()
816 		nor->prepare = aspeed_smc_prep;  in aspeed_smc_setup_flash()
817 		nor->unprepare = aspeed_smc_unprep;  in aspeed_smc_setup_flash()
828 		ret = spi_nor_scan(nor, NULL, &hwcaps);  in aspeed_smc_setup_flash()