Lines Matching full:sequencer
35 /* HW sequencer opcodes */
131 * @sregs: Start of software sequencer registers
136 * @swseq_reg: Use SW sequencer in register reads/writes
137 * @swseq_erase: Use SW sequencer in erase operation
238 dev_dbg(ispi->dev, "Using %cW sequencer for register access\n", in intel_spi_dump_regs()
240 dev_dbg(ispi->dev, "Using %cW sequencer for erase operation\n", in intel_spi_dump_regs()
350 /* Disable #SMI generation from HW sequencer */ in intel_spi_init()
356 * Determine whether erase operation should use HW or SW sequencer. in intel_spi_init()
358 * The HW sequencer has a predefined list of opcodes, with only the in intel_spi_init()
361 * cannot be done using HW sequencer. in intel_spi_init()
375 * sequencer. All other operations are supposed to be carried out in intel_spi_init()
376 * using software sequencer. in intel_spi_init()
379 /* Disable #SMI generation from SW sequencer */ in intel_spi_init()
490 * Always clear it after each SW sequencer operation regardless in intel_spi_sw_cycle()
572 * When hardware sequencer is used there is no need to program in intel_spi_write_reg()
618 * Atomic sequence is not expected with HW sequencer reads. Make in intel_spi_read()
686 /* Not needed with HW sequencer write, make sure it is cleared */ in intel_spi_write()
773 /* Not needed with HW sequencer erase, make sure it is cleared */ in intel_spi_erase()