Lines Matching full:nor
25 #include <linux/mtd/spi-nor.h>
93 int (*quad_enable)(struct spi_nor *nor);
105 static int read_sr(struct spi_nor *nor) in read_sr() argument
110 ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val, 1); in read_sr()
124 static int read_fsr(struct spi_nor *nor) in read_fsr() argument
129 ret = nor->read_reg(nor, SPINOR_OP_RDFSR, &val, 1); in read_fsr()
143 static int read_cr(struct spi_nor *nor) in read_cr() argument
148 ret = nor->read_reg(nor, SPINOR_OP_RDCR, &val, 1); in read_cr()
150 dev_err(nor->dev, "error %d reading CR\n", ret); in read_cr()
161 static inline int write_sr(struct spi_nor *nor, u8 val) in write_sr() argument
163 nor->cmd_buf[0] = val; in write_sr()
164 return nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 1); in write_sr()
171 static inline int write_enable(struct spi_nor *nor) in write_enable() argument
173 return nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0); in write_enable()
179 static inline int write_disable(struct spi_nor *nor) in write_disable() argument
181 return nor->write_reg(nor, SPINOR_OP_WRDI, NULL, 0); in write_disable()
245 static void spi_nor_set_4byte_opcodes(struct spi_nor *nor, in spi_nor_set_4byte_opcodes() argument
252 nor->erase_opcode = SPINOR_OP_SE; in spi_nor_set_4byte_opcodes()
253 nor->mtd.erasesize = info->sector_size; in spi_nor_set_4byte_opcodes()
260 nor->read_opcode = spi_nor_convert_3to4_read(nor->read_opcode); in spi_nor_set_4byte_opcodes()
261 nor->program_opcode = spi_nor_convert_3to4_program(nor->program_opcode); in spi_nor_set_4byte_opcodes()
262 nor->erase_opcode = spi_nor_convert_3to4_erase(nor->erase_opcode); in spi_nor_set_4byte_opcodes()
266 static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info, in set_4byte() argument
280 write_enable(nor); in set_4byte()
283 status = nor->write_reg(nor, cmd, NULL, 0); in set_4byte()
285 write_disable(nor); in set_4byte()
295 write_enable(nor); in set_4byte()
296 nor->cmd_buf[0] = 0; in set_4byte()
297 nor->write_reg(nor, SPINOR_OP_WREAR, nor->cmd_buf, 1); in set_4byte()
298 write_disable(nor); in set_4byte()
304 nor->cmd_buf[0] = enable << 7; in set_4byte()
305 return nor->write_reg(nor, SPINOR_OP_BRWR, nor->cmd_buf, 1); in set_4byte()
309 static int s3an_sr_ready(struct spi_nor *nor) in s3an_sr_ready() argument
314 ret = nor->read_reg(nor, SPINOR_OP_XRDSR, &val, 1); in s3an_sr_ready()
316 dev_err(nor->dev, "error %d reading XRDSR\n", (int) ret); in s3an_sr_ready()
323 static inline int spi_nor_sr_ready(struct spi_nor *nor) in spi_nor_sr_ready() argument
325 int sr = read_sr(nor); in spi_nor_sr_ready()
329 if (nor->flags & SNOR_F_USE_CLSR && sr & (SR_E_ERR | SR_P_ERR)) { in spi_nor_sr_ready()
331 dev_err(nor->dev, "Erase Error occurred\n"); in spi_nor_sr_ready()
333 dev_err(nor->dev, "Programming Error occurred\n"); in spi_nor_sr_ready()
335 nor->write_reg(nor, SPINOR_OP_CLSR, NULL, 0); in spi_nor_sr_ready()
342 static inline int spi_nor_fsr_ready(struct spi_nor *nor) in spi_nor_fsr_ready() argument
344 int fsr = read_fsr(nor); in spi_nor_fsr_ready()
350 dev_err(nor->dev, "Erase operation failed.\n"); in spi_nor_fsr_ready()
352 dev_err(nor->dev, "Program operation failed.\n"); in spi_nor_fsr_ready()
355 dev_err(nor->dev, in spi_nor_fsr_ready()
358 nor->write_reg(nor, SPINOR_OP_CLFSR, NULL, 0); in spi_nor_fsr_ready()
365 static int spi_nor_ready(struct spi_nor *nor) in spi_nor_ready() argument
369 if (nor->flags & SNOR_F_READY_XSR_RDY) in spi_nor_ready()
370 sr = s3an_sr_ready(nor); in spi_nor_ready()
372 sr = spi_nor_sr_ready(nor); in spi_nor_ready()
375 fsr = nor->flags & SNOR_F_USE_FSR ? spi_nor_fsr_ready(nor) : 1; in spi_nor_ready()
385 static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor, in spi_nor_wait_till_ready_with_timeout() argument
397 ret = spi_nor_ready(nor); in spi_nor_wait_till_ready_with_timeout()
406 dev_err(nor->dev, "flash operation timed out\n"); in spi_nor_wait_till_ready_with_timeout()
411 static int spi_nor_wait_till_ready(struct spi_nor *nor) in spi_nor_wait_till_ready() argument
413 return spi_nor_wait_till_ready_with_timeout(nor, in spi_nor_wait_till_ready()
422 static int erase_chip(struct spi_nor *nor) in erase_chip() argument
424 dev_dbg(nor->dev, " %lldKiB\n", (long long)(nor->mtd.size >> 10)); in erase_chip()
426 return nor->write_reg(nor, SPINOR_OP_CHIP_ERASE, NULL, 0); in erase_chip()
429 static int spi_nor_lock_and_prep(struct spi_nor *nor, enum spi_nor_ops ops) in spi_nor_lock_and_prep() argument
433 mutex_lock(&nor->lock); in spi_nor_lock_and_prep()
435 if (nor->prepare) { in spi_nor_lock_and_prep()
436 ret = nor->prepare(nor, ops); in spi_nor_lock_and_prep()
438 dev_err(nor->dev, "failed in the preparation.\n"); in spi_nor_lock_and_prep()
439 mutex_unlock(&nor->lock); in spi_nor_lock_and_prep()
446 static void spi_nor_unlock_and_unprep(struct spi_nor *nor, enum spi_nor_ops ops) in spi_nor_unlock_and_unprep() argument
448 if (nor->unprepare) in spi_nor_unlock_and_unprep()
449 nor->unprepare(nor, ops); in spi_nor_unlock_and_unprep()
450 mutex_unlock(&nor->lock); in spi_nor_unlock_and_unprep()
462 static loff_t spi_nor_s3an_addr_convert(struct spi_nor *nor, unsigned int addr) in spi_nor_s3an_addr_convert() argument
467 offset = addr % nor->page_size; in spi_nor_s3an_addr_convert()
468 page = addr / nor->page_size; in spi_nor_s3an_addr_convert()
469 page <<= (nor->page_size > 512) ? 10 : 9; in spi_nor_s3an_addr_convert()
477 static int spi_nor_erase_sector(struct spi_nor *nor, u32 addr) in spi_nor_erase_sector() argument
482 if (nor->flags & SNOR_F_S3AN_ADDR_DEFAULT) in spi_nor_erase_sector()
483 addr = spi_nor_s3an_addr_convert(nor, addr); in spi_nor_erase_sector()
485 if (nor->erase) in spi_nor_erase_sector()
486 return nor->erase(nor, addr); in spi_nor_erase_sector()
492 for (i = nor->addr_width - 1; i >= 0; i--) { in spi_nor_erase_sector()
497 return nor->write_reg(nor, nor->erase_opcode, buf, nor->addr_width); in spi_nor_erase_sector()
501 * Erase an address range on the nor chip. The address range may extend
506 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_erase() local
511 dev_dbg(nor->dev, "at 0x%llx, len %lld\n", (long long)instr->addr, in spi_nor_erase()
521 ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_ERASE); in spi_nor_erase()
526 if (len == mtd->size && !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) { in spi_nor_erase()
529 write_enable(nor); in spi_nor_erase()
531 if (erase_chip(nor)) { in spi_nor_erase()
545 ret = spi_nor_wait_till_ready_with_timeout(nor, timeout); in spi_nor_erase()
557 write_enable(nor); in spi_nor_erase()
559 ret = spi_nor_erase_sector(nor, addr); in spi_nor_erase()
566 ret = spi_nor_wait_till_ready(nor); in spi_nor_erase()
572 write_disable(nor); in spi_nor_erase()
575 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_ERASE); in spi_nor_erase()
581 static int write_sr_and_check(struct spi_nor *nor, u8 status_new, u8 mask) in write_sr_and_check() argument
585 write_enable(nor); in write_sr_and_check()
586 ret = write_sr(nor, status_new); in write_sr_and_check()
590 ret = spi_nor_wait_till_ready(nor); in write_sr_and_check()
594 ret = read_sr(nor); in write_sr_and_check()
601 static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs, in stm_get_locked_range() argument
604 struct mtd_info *mtd = &nor->mtd; in stm_get_locked_range()
616 if (nor->flags & SNOR_F_HAS_SR_TB && sr & SR_TB) in stm_get_locked_range()
627 static int stm_check_lock_status_sr(struct spi_nor *nor, loff_t ofs, uint64_t len, in stm_check_lock_status_sr() argument
636 stm_get_locked_range(nor, sr, &lock_offs, &lock_len); in stm_check_lock_status_sr()
646 static int stm_is_locked_sr(struct spi_nor *nor, loff_t ofs, uint64_t len, in stm_is_locked_sr() argument
649 return stm_check_lock_status_sr(nor, ofs, len, sr, true); in stm_is_locked_sr()
652 static int stm_is_unlocked_sr(struct spi_nor *nor, loff_t ofs, uint64_t len, in stm_is_unlocked_sr() argument
655 return stm_check_lock_status_sr(nor, ofs, len, sr, false); in stm_is_unlocked_sr()
690 static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) in stm_lock() argument
692 struct mtd_info *mtd = &nor->mtd; in stm_lock()
697 bool can_be_top = true, can_be_bottom = nor->flags & SNOR_F_HAS_SR_TB; in stm_lock()
700 status_old = read_sr(nor); in stm_lock()
705 if (stm_is_locked_sr(nor, ofs, len, status_old)) in stm_lock()
709 if (!stm_is_locked_sr(nor, 0, ofs, status_old)) in stm_lock()
713 if (!stm_is_locked_sr(nor, ofs + len, mtd->size - (ofs + len), in stm_lock()
762 return write_sr_and_check(nor, status_new, mask); in stm_lock()
770 static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) in stm_unlock() argument
772 struct mtd_info *mtd = &nor->mtd; in stm_unlock()
777 bool can_be_top = true, can_be_bottom = nor->flags & SNOR_F_HAS_SR_TB; in stm_unlock()
780 status_old = read_sr(nor); in stm_unlock()
785 if (stm_is_unlocked_sr(nor, ofs, len, status_old)) in stm_unlock()
789 if (!stm_is_unlocked_sr(nor, 0, ofs, status_old)) in stm_unlock()
793 if (!stm_is_unlocked_sr(nor, ofs + len, mtd->size - (ofs + len), in stm_unlock()
845 return write_sr_and_check(nor, status_new, mask); in stm_unlock()
855 static int stm_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) in stm_is_locked() argument
859 status = read_sr(nor); in stm_is_locked()
863 return stm_is_locked_sr(nor, ofs, len, status); in stm_is_locked()
868 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_lock() local
871 ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_LOCK); in spi_nor_lock()
875 ret = nor->flash_lock(nor, ofs, len); in spi_nor_lock()
877 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_UNLOCK); in spi_nor_lock()
883 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_unlock() local
886 ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_UNLOCK); in spi_nor_unlock()
890 ret = nor->flash_unlock(nor, ofs, len); in spi_nor_unlock()
892 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK); in spi_nor_unlock()
898 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_is_locked() local
901 ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_UNLOCK); in spi_nor_is_locked()
905 ret = nor->flash_is_locked(nor, ofs, len); in spi_nor_is_locked()
907 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK); in spi_nor_is_locked()
911 static int macronix_quad_enable(struct spi_nor *nor);
964 * more nor chips. This current list focusses on newer chips, which
1269 static const struct flash_info *spi_nor_read_id(struct spi_nor *nor) in spi_nor_read_id() argument
1275 tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN); in spi_nor_read_id()
1277 dev_dbg(nor->dev, "error %d reading JEDEC ID\n", tmp); in spi_nor_read_id()
1288 dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n", in spi_nor_read_id()
1296 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_read() local
1299 dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len); in spi_nor_read()
1301 ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_READ); in spi_nor_read()
1308 if (nor->flags & SNOR_F_S3AN_ADDR_DEFAULT) in spi_nor_read()
1309 addr = spi_nor_s3an_addr_convert(nor, addr); in spi_nor_read()
1311 ret = nor->read(nor, addr, len, buf); in spi_nor_read()
1329 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ); in spi_nor_read()
1336 struct spi_nor *nor = mtd_to_spi_nor(mtd); in sst_write() local
1340 dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len); in sst_write()
1342 ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_WRITE); in sst_write()
1346 write_enable(nor); in sst_write()
1348 nor->sst_write_second = false; in sst_write()
1353 nor->program_opcode = SPINOR_OP_BP; in sst_write()
1356 ret = nor->write(nor, to, 1, buf); in sst_write()
1361 ret = spi_nor_wait_till_ready(nor); in sst_write()
1369 nor->program_opcode = SPINOR_OP_AAI_WP; in sst_write()
1372 ret = nor->write(nor, to, 2, buf + actual); in sst_write()
1377 ret = spi_nor_wait_till_ready(nor); in sst_write()
1381 nor->sst_write_second = true; in sst_write()
1383 nor->sst_write_second = false; in sst_write()
1385 write_disable(nor); in sst_write()
1386 ret = spi_nor_wait_till_ready(nor); in sst_write()
1392 write_enable(nor); in sst_write()
1394 nor->program_opcode = SPINOR_OP_BP; in sst_write()
1395 ret = nor->write(nor, to, 1, buf + actual); in sst_write()
1400 ret = spi_nor_wait_till_ready(nor); in sst_write()
1403 write_disable(nor); in sst_write()
1408 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE); in sst_write()
1413 * Write an address range to the nor chip. Data must be written in
1420 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_write() local
1424 dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len); in spi_nor_write()
1426 ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_WRITE); in spi_nor_write()
1442 if (hweight32(nor->page_size) == 1) { in spi_nor_write()
1443 page_offset = addr & (nor->page_size - 1); in spi_nor_write()
1447 page_offset = do_div(aux, nor->page_size); in spi_nor_write()
1451 nor->page_size - page_offset, len - i); in spi_nor_write()
1453 if (nor->flags & SNOR_F_S3AN_ADDR_DEFAULT) in spi_nor_write()
1454 addr = spi_nor_s3an_addr_convert(nor, addr); in spi_nor_write()
1456 write_enable(nor); in spi_nor_write()
1457 ret = nor->write(nor, addr, page_remain, buf + i); in spi_nor_write()
1462 ret = spi_nor_wait_till_ready(nor); in spi_nor_write()
1468 dev_err(nor->dev, in spi_nor_write()
1477 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE); in spi_nor_write()
1483 * @nor: pointer to a 'struct spi_nor'
1491 static int macronix_quad_enable(struct spi_nor *nor) in macronix_quad_enable() argument
1495 val = read_sr(nor); in macronix_quad_enable()
1501 write_enable(nor); in macronix_quad_enable()
1503 write_sr(nor, val | SR_QUAD_EN_MX); in macronix_quad_enable()
1505 ret = spi_nor_wait_till_ready(nor); in macronix_quad_enable()
1509 ret = read_sr(nor); in macronix_quad_enable()
1511 dev_err(nor->dev, "Macronix Quad bit not set\n"); in macronix_quad_enable()
1524 static int write_sr_cr(struct spi_nor *nor, u8 *sr_cr) in write_sr_cr() argument
1528 write_enable(nor); in write_sr_cr()
1530 ret = nor->write_reg(nor, SPINOR_OP_WRSR, sr_cr, 2); in write_sr_cr()
1532 dev_err(nor->dev, in write_sr_cr()
1537 ret = spi_nor_wait_till_ready(nor); in write_sr_cr()
1539 dev_err(nor->dev, in write_sr_cr()
1549 * @nor: pointer to a 'struct spi_nor'
1570 static int spansion_quad_enable(struct spi_nor *nor) in spansion_quad_enable() argument
1575 ret = write_sr_cr(nor, sr_cr); in spansion_quad_enable()
1580 ret = read_cr(nor); in spansion_quad_enable()
1582 dev_err(nor->dev, "Spansion Quad bit not set\n"); in spansion_quad_enable()
1591 * @nor: pointer to a 'struct spi_nor'
1602 static int spansion_no_read_cr_quad_enable(struct spi_nor *nor) in spansion_no_read_cr_quad_enable() argument
1608 ret = read_sr(nor); in spansion_no_read_cr_quad_enable()
1610 dev_err(nor->dev, "error while reading status register\n"); in spansion_no_read_cr_quad_enable()
1616 return write_sr_cr(nor, sr_cr); in spansion_no_read_cr_quad_enable()
1621 * @nor: pointer to a 'struct spi_nor'
1632 static int spansion_read_cr_quad_enable(struct spi_nor *nor) in spansion_read_cr_quad_enable() argument
1634 struct device *dev = nor->dev; in spansion_read_cr_quad_enable()
1639 ret = read_cr(nor); in spansion_read_cr_quad_enable()
1651 ret = read_sr(nor); in spansion_read_cr_quad_enable()
1658 ret = write_sr_cr(nor, sr_cr); in spansion_read_cr_quad_enable()
1663 ret = read_cr(nor); in spansion_read_cr_quad_enable()
1665 dev_err(nor->dev, "Spansion Quad bit not set\n"); in spansion_read_cr_quad_enable()
1674 * @nor: pointer to a 'struct spi_nor'
1684 static int sr2_bit7_quad_enable(struct spi_nor *nor) in sr2_bit7_quad_enable() argument
1690 ret = nor->read_reg(nor, SPINOR_OP_RDSR2, &sr2, 1); in sr2_bit7_quad_enable()
1699 write_enable(nor); in sr2_bit7_quad_enable()
1701 ret = nor->write_reg(nor, SPINOR_OP_WRSR2, &sr2, 1); in sr2_bit7_quad_enable()
1703 dev_err(nor->dev, "error while writing status register 2\n"); in sr2_bit7_quad_enable()
1707 ret = spi_nor_wait_till_ready(nor); in sr2_bit7_quad_enable()
1709 dev_err(nor->dev, "timeout while writing status register 2\n"); in sr2_bit7_quad_enable()
1714 ret = nor->read_reg(nor, SPINOR_OP_RDSR2, &sr2, 1); in sr2_bit7_quad_enable()
1716 dev_err(nor->dev, "SR2 Quad bit not set\n"); in sr2_bit7_quad_enable()
1723 static int spi_nor_check(struct spi_nor *nor) in spi_nor_check() argument
1725 if (!nor->dev || !nor->read || !nor->write || in spi_nor_check()
1726 !nor->read_reg || !nor->write_reg) { in spi_nor_check()
1727 pr_err("spi-nor: please fill all the necessary fields!\n"); in spi_nor_check()
1734 static int s3an_nor_scan(const struct flash_info *info, struct spi_nor *nor) in s3an_nor_scan() argument
1739 ret = nor->read_reg(nor, SPINOR_OP_XRDSR, &val, 1); in s3an_nor_scan()
1741 dev_err(nor->dev, "error %d reading XRDSR\n", (int) ret); in s3an_nor_scan()
1745 nor->erase_opcode = SPINOR_OP_XSE; in s3an_nor_scan()
1746 nor->program_opcode = SPINOR_OP_XPP; in s3an_nor_scan()
1747 nor->read_opcode = SPINOR_OP_READ; in s3an_nor_scan()
1748 nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; in s3an_nor_scan()
1763 nor->page_size = (nor->page_size == 264) ? 256 : 512; in s3an_nor_scan()
1764 nor->mtd.writebufsize = nor->page_size; in s3an_nor_scan()
1765 nor->mtd.size = 8 * nor->page_size * info->n_sectors; in s3an_nor_scan()
1766 nor->mtd.erasesize = 8 * nor->page_size; in s3an_nor_scan()
1769 nor->flags |= SNOR_F_S3AN_ADDR_DEFAULT; in s3an_nor_scan()
1837 int (*quad_enable)(struct spi_nor *nor);
1868 * @nor: pointer to a 'struct spi_nor'
1879 static int spi_nor_read_sfdp(struct spi_nor *nor, u32 addr, in spi_nor_read_sfdp() argument
1885 read_opcode = nor->read_opcode; in spi_nor_read_sfdp()
1886 addr_width = nor->addr_width; in spi_nor_read_sfdp()
1887 read_dummy = nor->read_dummy; in spi_nor_read_sfdp()
1889 nor->read_opcode = SPINOR_OP_RDSFDP; in spi_nor_read_sfdp()
1890 nor->addr_width = 3; in spi_nor_read_sfdp()
1891 nor->read_dummy = 8; in spi_nor_read_sfdp()
1894 ret = nor->read(nor, addr, len, (u8 *)buf); in spi_nor_read_sfdp()
1909 nor->read_opcode = read_opcode; in spi_nor_read_sfdp()
1910 nor->addr_width = addr_width; in spi_nor_read_sfdp()
1911 nor->read_dummy = read_dummy; in spi_nor_read_sfdp()
1918 * @nor: pointer to a 'struct spi_nor'
1929 static int spi_nor_read_sfdp_dma_unsafe(struct spi_nor *nor, u32 addr, in spi_nor_read_sfdp_dma_unsafe() argument
1939 ret = spi_nor_read_sfdp(nor, addr, len, dma_safe_buf); in spi_nor_read_sfdp_dma_unsafe()
2170 * @nor: pointer to a 'struct spi_nor'
2198 static int spi_nor_parse_bfpt(struct spi_nor *nor, in spi_nor_parse_bfpt() argument
2202 struct mtd_info *mtd = &nor->mtd; in spi_nor_parse_bfpt()
2218 err = spi_nor_read_sfdp_dma_unsafe(nor, addr, len, &bfpt); in spi_nor_parse_bfpt()
2229 nor->addr_width = 3; in spi_nor_parse_bfpt()
2233 nor->addr_width = 4; in spi_nor_parse_bfpt()
2246 * Prevent overflows on params->size. Anyway, a NOR of 2^64 in spi_nor_parse_bfpt()
2293 nor->erase_opcode = opcode; in spi_nor_parse_bfpt()
2299 nor->erase_opcode = opcode; in spi_nor_parse_bfpt()
2346 * @nor: pointer to a 'struct spi_nor'
2358 static int spi_nor_parse_sfdp(struct spi_nor *nor, in spi_nor_parse_sfdp() argument
2364 struct device *dev = nor->dev; in spi_nor_parse_sfdp()
2369 err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(header), &header); in spi_nor_parse_sfdp()
2405 err = spi_nor_read_sfdp(nor, sizeof(header), in spi_nor_parse_sfdp()
2428 err = spi_nor_parse_bfpt(nor, bfpt_header, params); in spi_nor_parse_sfdp()
2454 static int spi_nor_init_params(struct spi_nor *nor, in spi_nor_init_params() argument
2461 /* Set SPI NOR sizes. */ in spi_nor_init_params()
2525 nor->addr_width = 0; in spi_nor_init_params()
2526 nor->mtd.erasesize = 0; in spi_nor_init_params()
2532 if (spi_nor_parse_sfdp(nor, &sfdp_params)) { in spi_nor_init_params()
2533 nor->addr_width = 0; in spi_nor_init_params()
2534 nor->mtd.erasesize = 0; in spi_nor_init_params()
2594 static int spi_nor_select_read(struct spi_nor *nor, in spi_nor_select_read() argument
2609 nor->read_opcode = read->opcode; in spi_nor_select_read()
2610 nor->read_proto = read->proto; in spi_nor_select_read()
2613 * In the spi-nor framework, we don't need to make the difference in spi_nor_select_read()
2622 nor->read_dummy = read->num_mode_clocks + read->num_wait_states; in spi_nor_select_read()
2626 static int spi_nor_select_pp(struct spi_nor *nor, in spi_nor_select_pp() argument
2641 nor->program_opcode = pp->opcode; in spi_nor_select_pp()
2642 nor->write_proto = pp->proto; in spi_nor_select_pp()
2646 static int spi_nor_select_erase(struct spi_nor *nor, in spi_nor_select_erase() argument
2649 struct mtd_info *mtd = &nor->mtd; in spi_nor_select_erase()
2658 nor->erase_opcode = SPINOR_OP_BE_4K; in spi_nor_select_erase()
2661 nor->erase_opcode = SPINOR_OP_BE_4K_PMC; in spi_nor_select_erase()
2666 nor->erase_opcode = SPINOR_OP_SE; in spi_nor_select_erase()
2672 static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info, in spi_nor_setup() argument
2693 dev_dbg(nor->dev, in spi_nor_setup()
2699 err = spi_nor_select_read(nor, params, shared_mask); in spi_nor_setup()
2701 dev_err(nor->dev, in spi_nor_setup()
2707 err = spi_nor_select_pp(nor, params, shared_mask); in spi_nor_setup()
2709 dev_err(nor->dev, in spi_nor_setup()
2715 err = spi_nor_select_erase(nor, info); in spi_nor_setup()
2717 dev_err(nor->dev, in spi_nor_setup()
2723 enable_quad_io = (spi_nor_get_protocol_width(nor->read_proto) == 4 || in spi_nor_setup()
2724 spi_nor_get_protocol_width(nor->write_proto) == 4); in spi_nor_setup()
2726 nor->quad_enable = params->quad_enable; in spi_nor_setup()
2728 nor->quad_enable = NULL; in spi_nor_setup()
2733 static int spi_nor_init(struct spi_nor *nor) in spi_nor_init() argument
2738 * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up in spi_nor_init()
2741 if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL || in spi_nor_init()
2742 JEDEC_MFR(nor->info) == SNOR_MFR_INTEL || in spi_nor_init()
2743 JEDEC_MFR(nor->info) == SNOR_MFR_SST || in spi_nor_init()
2744 nor->info->flags & SPI_NOR_HAS_LOCK) { in spi_nor_init()
2745 write_enable(nor); in spi_nor_init()
2746 write_sr(nor, 0); in spi_nor_init()
2747 spi_nor_wait_till_ready(nor); in spi_nor_init()
2750 if (nor->quad_enable) { in spi_nor_init()
2751 err = nor->quad_enable(nor); in spi_nor_init()
2753 dev_err(nor->dev, "quad mode not supported\n"); in spi_nor_init()
2758 if ((nor->addr_width == 4) && in spi_nor_init()
2759 (JEDEC_MFR(nor->info) != SNOR_MFR_SPANSION) && in spi_nor_init()
2760 !(nor->info->flags & SPI_NOR_4B_OPCODES)) { in spi_nor_init()
2768 WARN_ONCE(nor->flags & SNOR_F_BROKEN_RESET, in spi_nor_init()
2770 set_4byte(nor, nor->info, 1); in spi_nor_init()
2779 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_resume() local
2780 struct device *dev = nor->dev; in spi_nor_resume()
2783 /* re-initialize the nor chip */ in spi_nor_resume()
2784 ret = spi_nor_init(nor); in spi_nor_resume()
2789 void spi_nor_restore(struct spi_nor *nor) in spi_nor_restore() argument
2792 if ((nor->addr_width == 4) && in spi_nor_restore()
2793 (JEDEC_MFR(nor->info) != SNOR_MFR_SPANSION) && in spi_nor_restore()
2794 !(nor->info->flags & SPI_NOR_4B_OPCODES) && in spi_nor_restore()
2795 (nor->flags & SNOR_F_BROKEN_RESET)) in spi_nor_restore()
2796 set_4byte(nor, nor->info, 0); in spi_nor_restore()
2800 int spi_nor_scan(struct spi_nor *nor, const char *name, in spi_nor_scan() argument
2805 struct device *dev = nor->dev; in spi_nor_scan()
2806 struct mtd_info *mtd = &nor->mtd; in spi_nor_scan()
2807 struct device_node *np = spi_nor_get_flash_node(nor); in spi_nor_scan()
2811 ret = spi_nor_check(nor); in spi_nor_scan()
2816 nor->reg_proto = SNOR_PROTO_1_1_1; in spi_nor_scan()
2817 nor->read_proto = SNOR_PROTO_1_1_1; in spi_nor_scan()
2818 nor->write_proto = SNOR_PROTO_1_1_1; in spi_nor_scan()
2824 info = spi_nor_read_id(nor); in spi_nor_scan()
2835 jinfo = spi_nor_read_id(nor); in spi_nor_scan()
2852 mutex_init(&nor->lock); in spi_nor_scan()
2857 * with Atmel spi-nor in spi_nor_scan()
2860 nor->flags |= SNOR_F_READY_XSR_RDY; in spi_nor_scan()
2863 ret = spi_nor_init_params(nor, info, ¶ms); in spi_nor_scan()
2869 mtd->priv = nor; in spi_nor_scan()
2878 /* NOR protection support for STmicro/Micron chips and similar */ in spi_nor_scan()
2881 nor->flash_lock = stm_lock; in spi_nor_scan()
2882 nor->flash_unlock = stm_unlock; in spi_nor_scan()
2883 nor->flash_is_locked = stm_is_locked; in spi_nor_scan()
2886 if (nor->flash_lock && nor->flash_unlock && nor->flash_is_locked) { in spi_nor_scan()
2892 /* sst nor chips use AAI word program */ in spi_nor_scan()
2899 nor->flags |= SNOR_F_USE_FSR; in spi_nor_scan()
2901 nor->flags |= SNOR_F_HAS_SR_TB; in spi_nor_scan()
2903 nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; in spi_nor_scan()
2905 nor->flags |= SNOR_F_USE_CLSR; in spi_nor_scan()
2911 nor->page_size = params.page_size; in spi_nor_scan()
2912 mtd->writebufsize = nor->page_size; in spi_nor_scan()
2926 nor->flags |= SNOR_F_BROKEN_RESET; in spi_nor_scan()
2939 ret = spi_nor_setup(nor, info, ¶ms, hwcaps); in spi_nor_scan()
2943 if (nor->addr_width) { in spi_nor_scan()
2946 nor->addr_width = info->addr_width; in spi_nor_scan()
2949 nor->addr_width = 4; in spi_nor_scan()
2952 spi_nor_set_4byte_opcodes(nor, info); in spi_nor_scan()
2954 nor->addr_width = 3; in spi_nor_scan()
2957 if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) { in spi_nor_scan()
2959 nor->addr_width); in spi_nor_scan()
2964 ret = s3an_nor_scan(info, nor); in spi_nor_scan()
2970 nor->info = info; in spi_nor_scan()
2971 ret = spi_nor_init(nor); in spi_nor_scan()
3013 MODULE_DESCRIPTION("framework for SPI NOR");