135 	struct stm32_qspi *qspi;  member
174 static int stm32_qspi_wait_cmd(struct stm32_qspi *qspi)  in stm32_qspi_wait_cmd()  argument
179 	if (readl_relaxed(qspi->io_base + QUADSPI_SR) & SR_TCF)  in stm32_qspi_wait_cmd()
182 	reinit_completion(&qspi->cmd_completion);  in stm32_qspi_wait_cmd()
183 	cr = readl_relaxed(qspi->io_base + QUADSPI_CR);  in stm32_qspi_wait_cmd()
184 	writel_relaxed(cr | CR_TCIE, qspi->io_base + QUADSPI_CR);  in stm32_qspi_wait_cmd()
186 	if (!wait_for_completion_interruptible_timeout(&qspi->cmd_completion,  in stm32_qspi_wait_cmd()
190 	writel_relaxed(cr, qspi->io_base + QUADSPI_CR);  in stm32_qspi_wait_cmd()
194 static int stm32_qspi_wait_nobusy(struct stm32_qspi *qspi)  in stm32_qspi_wait_nobusy()  argument
198 	return readl_relaxed_poll_timeout(qspi->io_base + QUADSPI_SR, sr,  in stm32_qspi_wait_nobusy()
239 static int stm32_qspi_tx_poll(struct stm32_qspi *qspi,  in stm32_qspi_tx_poll()  argument
253 		ret = readl_relaxed_poll_timeout(qspi->io_base + QUADSPI_SR,  in stm32_qspi_tx_poll()
257 			dev_err(qspi->dev, "fifo timeout (stat:%#x)\n", sr);  in stm32_qspi_tx_poll()
260 		tx_fifo(buf++, qspi->io_base + QUADSPI_DR);  in stm32_qspi_tx_poll()
266 static int stm32_qspi_tx_mm(struct stm32_qspi *qspi,  in stm32_qspi_tx_mm()  argument
269 	memcpy_fromio(cmd->buf, qspi->mm_base + cmd->addr, cmd->len);  in stm32_qspi_tx_mm()
273 static int stm32_qspi_tx(struct stm32_qspi *qspi,  in stm32_qspi_tx()  argument
280 		return stm32_qspi_tx_mm(qspi, cmd);  in stm32_qspi_tx()
282 	return stm32_qspi_tx_poll(qspi, cmd);  in stm32_qspi_tx()
288 	struct stm32_qspi *qspi = flash->qspi;  in stm32_qspi_send()  local
293 	err = stm32_qspi_wait_nobusy(qspi);  in stm32_qspi_send()
297 	dcr = readl_relaxed(qspi->io_base + QUADSPI_DCR) & ~DCR_FSIZE_MASK;  in stm32_qspi_send()
299 	writel_relaxed(dcr, qspi->io_base + QUADSPI_DCR);  in stm32_qspi_send()
301 	cr = readl_relaxed(qspi->io_base + QUADSPI_CR);  in stm32_qspi_send()
305 	writel_relaxed(cr, qspi->io_base + QUADSPI_CR);  in stm32_qspi_send()
308 		writel_relaxed(cmd->len - 1, qspi->io_base + QUADSPI_DLR);  in stm32_qspi_send()
319 	writel_relaxed(ccr, qspi->io_base + QUADSPI_CCR);  in stm32_qspi_send()
322 		writel_relaxed(cmd->addr, qspi->io_base + QUADSPI_AR);  in stm32_qspi_send()
324 	err = stm32_qspi_tx(qspi, cmd);  in stm32_qspi_send()
329 		err = stm32_qspi_wait_cmd(qspi);  in stm32_qspi_send()
332 		writel_relaxed(FCR_CTCF, qspi->io_base + QUADSPI_FCR);  in stm32_qspi_send()
342 	cr = readl_relaxed(qspi->io_base + QUADSPI_CR) | CR_ABORT;  in stm32_qspi_send()
343 	writel_relaxed(cr, qspi->io_base + QUADSPI_CR);  in stm32_qspi_send()
346 		dev_err(qspi->dev, "%s abort err:%d\n", __func__, err);  in stm32_qspi_send()
355 	struct device *dev = flash->qspi->dev;  in stm32_qspi_read_reg()
376 	struct device *dev = flash->qspi->dev;  in stm32_qspi_write_reg()
397 	struct stm32_qspi *qspi = flash->qspi;  in stm32_qspi_read()  local
401 	dev_dbg(qspi->dev, "read(%#.2x): buf:%pK from:%#.8x len:%#zx\n",  in stm32_qspi_read()
424 	struct device *dev = flash->qspi->dev;  in stm32_qspi_write()
449 	struct device *dev = flash->qspi->dev;  in stm32_qspi_erase()
467 	struct stm32_qspi *qspi = (struct stm32_qspi *)dev_id;  in stm32_qspi_irq()  local
470 	cr = readl_relaxed(qspi->io_base + QUADSPI_CR);  in stm32_qspi_irq()
471 	sr = readl_relaxed(qspi->io_base + QUADSPI_SR);  in stm32_qspi_irq()
476 		complete(&qspi->cmd_completion);  in stm32_qspi_irq()
478 		dev_info_ratelimited(qspi->dev, "spurious interrupt\n");  in stm32_qspi_irq()
481 	writel_relaxed(fcr, qspi->io_base + QUADSPI_FCR);  in stm32_qspi_irq()
489 	struct stm32_qspi *qspi = flash->qspi;  in stm32_qspi_prep()  local
491 	mutex_lock(&qspi->lock);  in stm32_qspi_prep()
498 	struct stm32_qspi *qspi = flash->qspi;  in stm32_qspi_unprep()  local
500 	mutex_unlock(&qspi->lock);  in stm32_qspi_unprep()
503 static int stm32_qspi_flash_setup(struct stm32_qspi *qspi,  in stm32_qspi_flash_setup()  argument
524 	presc = DIV_ROUND_UP(qspi->clk_rate, max_rate) - 1;  in stm32_qspi_flash_setup()
536 	flash = &qspi->flash[cs_num];  in stm32_qspi_flash_setup()
537 	flash->qspi = qspi;  in stm32_qspi_flash_setup()
541 	flash->nor.dev = qspi->dev;  in stm32_qspi_flash_setup()
554 	writel_relaxed(LPTR_DFT_TIMEOUT, qspi->io_base + QUADSPI_LPTR);  in stm32_qspi_flash_setup()
557 		       | CR_EN, qspi->io_base + QUADSPI_CR);  in stm32_qspi_flash_setup()
560 	 * in stm32 qspi controller, QUADSPI_DCR register has a fsize field  in stm32_qspi_flash_setup()
570 		dev_err(qspi->dev, "device scan failed\n");  in stm32_qspi_flash_setup()
578 	if (mtd->size > qspi->mm_size)  in stm32_qspi_flash_setup()
581 	writel_relaxed(DCR_CSHT(1), qspi->io_base + QUADSPI_DCR);  in stm32_qspi_flash_setup()
585 		dev_err(qspi->dev, "mtd device parse failed\n");  in stm32_qspi_flash_setup()
591 	dev_dbg(qspi->dev, "read mm:%s cs:%d bus:%d\n",  in stm32_qspi_flash_setup()
597 static void stm32_qspi_mtd_free(struct stm32_qspi *qspi)  in stm32_qspi_mtd_free()  argument
602 		if (qspi->flash[i].registered)  in stm32_qspi_mtd_free()
603 			mtd_device_unregister(&qspi->flash[i].nor.mtd);  in stm32_qspi_mtd_free()
611 	struct stm32_qspi *qspi;  in stm32_qspi_probe()  local
615 	qspi = devm_kzalloc(dev, sizeof(*qspi), GFP_KERNEL);  in stm32_qspi_probe()
616 	if (!qspi)  in stm32_qspi_probe()
619 	qspi->nor_num = of_get_child_count(dev->of_node);  in stm32_qspi_probe()
620 	if (!qspi->nor_num || qspi->nor_num > STM32_MAX_NORCHIP)  in stm32_qspi_probe()
623 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qspi");  in stm32_qspi_probe()
624 	qspi->io_base = devm_ioremap_resource(dev, res);  in stm32_qspi_probe()
625 	if (IS_ERR(qspi->io_base))  in stm32_qspi_probe()
626 		return PTR_ERR(qspi->io_base);  in stm32_qspi_probe()
629 	qspi->mm_base = devm_ioremap_resource(dev, res);  in stm32_qspi_probe()
630 	if (IS_ERR(qspi->mm_base))  in stm32_qspi_probe()
631 		return PTR_ERR(qspi->mm_base);  in stm32_qspi_probe()
633 	qspi->mm_size = resource_size(res);  in stm32_qspi_probe()
637 			       dev_name(dev), qspi);  in stm32_qspi_probe()
643 	init_completion(&qspi->cmd_completion);  in stm32_qspi_probe()
645 	qspi->clk = devm_clk_get(dev, NULL);  in stm32_qspi_probe()
646 	if (IS_ERR(qspi->clk))  in stm32_qspi_probe()
647 		return PTR_ERR(qspi->clk);  in stm32_qspi_probe()
649 	qspi->clk_rate = clk_get_rate(qspi->clk);  in stm32_qspi_probe()
650 	if (!qspi->clk_rate)  in stm32_qspi_probe()
653 	ret = clk_prepare_enable(qspi->clk);  in stm32_qspi_probe()
666 	qspi->dev = dev;  in stm32_qspi_probe()
667 	platform_set_drvdata(pdev, qspi);  in stm32_qspi_probe()
668 	mutex_init(&qspi->lock);  in stm32_qspi_probe()
671 		ret = stm32_qspi_flash_setup(qspi, flash_np);  in stm32_qspi_probe()
681 	mutex_destroy(&qspi->lock);  in stm32_qspi_probe()
682 	stm32_qspi_mtd_free(qspi);  in stm32_qspi_probe()
684 	clk_disable_unprepare(qspi->clk);  in stm32_qspi_probe()
690 	struct stm32_qspi *qspi = platform_get_drvdata(pdev);  in stm32_qspi_remove()  local
692 	/* disable qspi */  in stm32_qspi_remove()
693 	writel_relaxed(0, qspi->io_base + QUADSPI_CR);  in stm32_qspi_remove()
695 	stm32_qspi_mtd_free(qspi);  in stm32_qspi_remove()
696 	mutex_destroy(&qspi->lock);  in stm32_qspi_remove()
698 	clk_disable_unprepare(qspi->clk);  in stm32_qspi_remove()
703 	{.compatible = "st,stm32f469-qspi"},