Lines Matching full:chip
19 #include "chip.h"
23 int mv88e6xxx_g2_read(struct mv88e6xxx_chip *chip, int reg, u16 *val) in mv88e6xxx_g2_read() argument
25 return mv88e6xxx_read(chip, chip->info->global2_addr, reg, val); in mv88e6xxx_g2_read()
28 int mv88e6xxx_g2_write(struct mv88e6xxx_chip *chip, int reg, u16 val) in mv88e6xxx_g2_write() argument
30 return mv88e6xxx_write(chip, chip->info->global2_addr, reg, val); in mv88e6xxx_g2_write()
33 int mv88e6xxx_g2_update(struct mv88e6xxx_chip *chip, int reg, u16 update) in mv88e6xxx_g2_update() argument
35 return mv88e6xxx_update(chip, chip->info->global2_addr, reg, update); in mv88e6xxx_g2_update()
38 int mv88e6xxx_g2_wait(struct mv88e6xxx_chip *chip, int reg, u16 mask) in mv88e6xxx_g2_wait() argument
40 return mv88e6xxx_wait(chip, chip->info->global2_addr, reg, mask); in mv88e6xxx_g2_wait()
45 static int mv88e6xxx_g2_int_source(struct mv88e6xxx_chip *chip, u16 *src) in mv88e6xxx_g2_int_source() argument
48 return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_INT_SRC, src); in mv88e6xxx_g2_int_source()
53 static int mv88e6xxx_g2_int_mask(struct mv88e6xxx_chip *chip, u16 mask) in mv88e6xxx_g2_int_mask() argument
55 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_INT_MASK, mask); in mv88e6xxx_g2_int_mask()
60 static int mv88e6xxx_g2_mgmt_enable_2x(struct mv88e6xxx_chip *chip, u16 en2x) in mv88e6xxx_g2_mgmt_enable_2x() argument
62 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_MGMT_EN_2X, en2x); in mv88e6xxx_g2_mgmt_enable_2x()
67 static int mv88e6xxx_g2_mgmt_enable_0x(struct mv88e6xxx_chip *chip, u16 en0x) in mv88e6xxx_g2_mgmt_enable_0x() argument
69 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_MGMT_EN_0X, en0x); in mv88e6xxx_g2_mgmt_enable_0x()
74 static int mv88e6xxx_g2_switch_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_switch_mgmt_rsvd2cpu() argument
80 err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SWITCH_MGMT, &val); in mv88e6xxx_g2_switch_mgmt_rsvd2cpu()
89 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SWITCH_MGMT, val); in mv88e6xxx_g2_switch_mgmt_rsvd2cpu()
92 int mv88e6185_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip) in mv88e6185_g2_mgmt_rsvd2cpu() argument
99 err = mv88e6xxx_g2_mgmt_enable_0x(chip, 0xffff); in mv88e6185_g2_mgmt_rsvd2cpu()
103 return mv88e6xxx_g2_switch_mgmt_rsvd2cpu(chip, true); in mv88e6185_g2_mgmt_rsvd2cpu()
106 int mv88e6352_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip) in mv88e6352_g2_mgmt_rsvd2cpu() argument
113 err = mv88e6xxx_g2_mgmt_enable_2x(chip, 0xffff); in mv88e6352_g2_mgmt_rsvd2cpu()
117 return mv88e6185_g2_mgmt_rsvd2cpu(chip); in mv88e6352_g2_mgmt_rsvd2cpu()
122 int mv88e6xxx_g2_device_mapping_write(struct mv88e6xxx_chip *chip, int target, in mv88e6xxx_g2_device_mapping_write() argument
130 return mv88e6xxx_g2_update(chip, MV88E6XXX_G2_DEVICE_MAPPING, val); in mv88e6xxx_g2_device_mapping_write()
135 static int mv88e6xxx_g2_trunk_mask_write(struct mv88e6xxx_chip *chip, int num, in mv88e6xxx_g2_trunk_mask_write() argument
138 u16 val = (num << 12) | (mask & mv88e6xxx_port_mask(chip)); in mv88e6xxx_g2_trunk_mask_write()
143 return mv88e6xxx_g2_update(chip, MV88E6XXX_G2_TRUNK_MASK, val); in mv88e6xxx_g2_trunk_mask_write()
148 static int mv88e6xxx_g2_trunk_mapping_write(struct mv88e6xxx_chip *chip, int id, in mv88e6xxx_g2_trunk_mapping_write() argument
151 const u16 port_mask = BIT(mv88e6xxx_num_ports(chip)) - 1; in mv88e6xxx_g2_trunk_mapping_write()
154 return mv88e6xxx_g2_update(chip, MV88E6XXX_G2_TRUNK_MAPPING, val); in mv88e6xxx_g2_trunk_mapping_write()
157 int mv88e6xxx_g2_trunk_clear(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_trunk_clear() argument
159 const u16 port_mask = BIT(mv88e6xxx_num_ports(chip)) - 1; in mv88e6xxx_g2_trunk_clear()
164 err = mv88e6xxx_g2_trunk_mask_write(chip, i, false, port_mask); in mv88e6xxx_g2_trunk_clear()
171 err = mv88e6xxx_g2_trunk_mapping_write(chip, i, 0); in mv88e6xxx_g2_trunk_clear()
183 static int mv88e6xxx_g2_irl_wait(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_irl_wait() argument
185 return mv88e6xxx_g2_wait(chip, MV88E6XXX_G2_IRL_CMD, in mv88e6xxx_g2_irl_wait()
189 static int mv88e6xxx_g2_irl_op(struct mv88e6xxx_chip *chip, u16 op, int port, in mv88e6xxx_g2_irl_op() argument
194 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_IRL_CMD, in mv88e6xxx_g2_irl_op()
200 return mv88e6xxx_g2_irl_wait(chip); in mv88e6xxx_g2_irl_op()
203 int mv88e6352_g2_irl_init_all(struct mv88e6xxx_chip *chip, int port) in mv88e6352_g2_irl_init_all() argument
205 return mv88e6xxx_g2_irl_op(chip, MV88E6352_G2_IRL_CMD_OP_INIT_ALL, port, in mv88e6352_g2_irl_init_all()
209 int mv88e6390_g2_irl_init_all(struct mv88e6xxx_chip *chip, int port) in mv88e6390_g2_irl_init_all() argument
211 return mv88e6xxx_g2_irl_op(chip, MV88E6390_G2_IRL_CMD_OP_INIT_ALL, port, in mv88e6390_g2_irl_init_all()
215 /* Offset 0x0B: Cross-chip Port VLAN (Addr) Register
216 * Offset 0x0C: Cross-chip Port VLAN Data Register
219 static int mv88e6xxx_g2_pvt_op_wait(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_pvt_op_wait() argument
221 return mv88e6xxx_g2_wait(chip, MV88E6XXX_G2_PVT_ADDR, in mv88e6xxx_g2_pvt_op_wait()
225 static int mv88e6xxx_g2_pvt_op(struct mv88e6xxx_chip *chip, int src_dev, in mv88e6xxx_g2_pvt_op() argument
230 /* 9-bit Cross-chip PVT pointer: with MV88E6XXX_G2_MISC_5_BIT_PORT in mv88e6xxx_g2_pvt_op()
237 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_PVT_ADDR, op); in mv88e6xxx_g2_pvt_op()
241 return mv88e6xxx_g2_pvt_op_wait(chip); in mv88e6xxx_g2_pvt_op()
244 int mv88e6xxx_g2_pvt_write(struct mv88e6xxx_chip *chip, int src_dev, in mv88e6xxx_g2_pvt_write() argument
249 err = mv88e6xxx_g2_pvt_op_wait(chip); in mv88e6xxx_g2_pvt_write()
253 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_PVT_DATA, data); in mv88e6xxx_g2_pvt_write()
257 return mv88e6xxx_g2_pvt_op(chip, src_dev, src_port, in mv88e6xxx_g2_pvt_write()
263 static int mv88e6xxx_g2_switch_mac_write(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_switch_mac_write() argument
268 return mv88e6xxx_g2_update(chip, MV88E6XXX_G2_SWITCH_MAC, val); in mv88e6xxx_g2_switch_mac_write()
271 int mv88e6xxx_g2_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr) in mv88e6xxx_g2_set_switch_mac() argument
276 err = mv88e6xxx_g2_switch_mac_write(chip, i, addr[i]); in mv88e6xxx_g2_set_switch_mac()
286 static int mv88e6xxx_g2_pot_write(struct mv88e6xxx_chip *chip, int pointer, in mv88e6xxx_g2_pot_write() argument
291 return mv88e6xxx_g2_update(chip, MV88E6XXX_G2_PRIO_OVERRIDE, val); in mv88e6xxx_g2_pot_write()
294 int mv88e6xxx_g2_pot_clear(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_pot_clear() argument
300 err = mv88e6xxx_g2_pot_write(chip, i, 0); in mv88e6xxx_g2_pot_clear()
313 static int mv88e6xxx_g2_eeprom_wait(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_eeprom_wait() argument
315 return mv88e6xxx_g2_wait(chip, MV88E6XXX_G2_EEPROM_CMD, in mv88e6xxx_g2_eeprom_wait()
320 static int mv88e6xxx_g2_eeprom_cmd(struct mv88e6xxx_chip *chip, u16 cmd) in mv88e6xxx_g2_eeprom_cmd() argument
324 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_EEPROM_CMD, in mv88e6xxx_g2_eeprom_cmd()
329 return mv88e6xxx_g2_eeprom_wait(chip); in mv88e6xxx_g2_eeprom_cmd()
332 static int mv88e6xxx_g2_eeprom_read8(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_eeprom_read8() argument
338 err = mv88e6xxx_g2_eeprom_wait(chip); in mv88e6xxx_g2_eeprom_read8()
342 err = mv88e6xxx_g2_write(chip, MV88E6390_G2_EEPROM_ADDR, addr); in mv88e6xxx_g2_eeprom_read8()
346 err = mv88e6xxx_g2_eeprom_cmd(chip, cmd); in mv88e6xxx_g2_eeprom_read8()
350 err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_EEPROM_CMD, &cmd); in mv88e6xxx_g2_eeprom_read8()
359 static int mv88e6xxx_g2_eeprom_write8(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_eeprom_write8() argument
366 err = mv88e6xxx_g2_eeprom_wait(chip); in mv88e6xxx_g2_eeprom_write8()
370 err = mv88e6xxx_g2_write(chip, MV88E6390_G2_EEPROM_ADDR, addr); in mv88e6xxx_g2_eeprom_write8()
374 return mv88e6xxx_g2_eeprom_cmd(chip, cmd | data); in mv88e6xxx_g2_eeprom_write8()
377 static int mv88e6xxx_g2_eeprom_read16(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_eeprom_read16() argument
383 err = mv88e6xxx_g2_eeprom_wait(chip); in mv88e6xxx_g2_eeprom_read16()
387 err = mv88e6xxx_g2_eeprom_cmd(chip, cmd); in mv88e6xxx_g2_eeprom_read16()
391 return mv88e6xxx_g2_read(chip, MV88E6352_G2_EEPROM_DATA, data); in mv88e6xxx_g2_eeprom_read16()
394 static int mv88e6xxx_g2_eeprom_write16(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_eeprom_write16() argument
400 err = mv88e6xxx_g2_eeprom_wait(chip); in mv88e6xxx_g2_eeprom_write16()
404 err = mv88e6xxx_g2_write(chip, MV88E6352_G2_EEPROM_DATA, data); in mv88e6xxx_g2_eeprom_write16()
408 return mv88e6xxx_g2_eeprom_cmd(chip, cmd); in mv88e6xxx_g2_eeprom_write16()
411 int mv88e6xxx_g2_get_eeprom8(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_get_eeprom8() argument
421 err = mv88e6xxx_g2_eeprom_read8(chip, offset, data); in mv88e6xxx_g2_get_eeprom8()
434 int mv88e6xxx_g2_set_eeprom8(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_set_eeprom8() argument
444 err = mv88e6xxx_g2_eeprom_write8(chip, offset, *data); in mv88e6xxx_g2_set_eeprom8()
457 int mv88e6xxx_g2_get_eeprom16(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_get_eeprom16() argument
468 err = mv88e6xxx_g2_eeprom_read16(chip, offset >> 1, &val); in mv88e6xxx_g2_get_eeprom16()
480 err = mv88e6xxx_g2_eeprom_read16(chip, offset >> 1, &val); in mv88e6xxx_g2_get_eeprom16()
493 err = mv88e6xxx_g2_eeprom_read16(chip, offset >> 1, &val); in mv88e6xxx_g2_get_eeprom16()
507 int mv88e6xxx_g2_set_eeprom16(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_set_eeprom16() argument
516 err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_EEPROM_CMD, &val); in mv88e6xxx_g2_set_eeprom16()
526 err = mv88e6xxx_g2_eeprom_read16(chip, offset >> 1, &val); in mv88e6xxx_g2_set_eeprom16()
532 err = mv88e6xxx_g2_eeprom_write16(chip, offset >> 1, val); in mv88e6xxx_g2_set_eeprom16()
545 err = mv88e6xxx_g2_eeprom_write16(chip, offset >> 1, val); in mv88e6xxx_g2_set_eeprom16()
555 err = mv88e6xxx_g2_eeprom_read16(chip, offset >> 1, &val); in mv88e6xxx_g2_set_eeprom16()
561 err = mv88e6xxx_g2_eeprom_write16(chip, offset >> 1, val); in mv88e6xxx_g2_set_eeprom16()
577 static int mv88e6xxx_g2_smi_phy_wait(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_smi_phy_wait() argument
579 return mv88e6xxx_g2_wait(chip, MV88E6XXX_G2_SMI_PHY_CMD, in mv88e6xxx_g2_smi_phy_wait()
583 static int mv88e6xxx_g2_smi_phy_cmd(struct mv88e6xxx_chip *chip, u16 cmd) in mv88e6xxx_g2_smi_phy_cmd() argument
587 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SMI_PHY_CMD, in mv88e6xxx_g2_smi_phy_cmd()
592 return mv88e6xxx_g2_smi_phy_wait(chip); in mv88e6xxx_g2_smi_phy_cmd()
595 static int mv88e6xxx_g2_smi_phy_access(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_access() argument
615 return mv88e6xxx_g2_smi_phy_cmd(chip, cmd); in mv88e6xxx_g2_smi_phy_access()
618 static int mv88e6xxx_g2_smi_phy_access_c22(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_access_c22() argument
622 return mv88e6xxx_g2_smi_phy_access(chip, external, false, op, dev, reg); in mv88e6xxx_g2_smi_phy_access_c22()
626 static int mv88e6xxx_g2_smi_phy_read_data_c22(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_read_data_c22() argument
633 err = mv88e6xxx_g2_smi_phy_wait(chip); in mv88e6xxx_g2_smi_phy_read_data_c22()
637 err = mv88e6xxx_g2_smi_phy_access_c22(chip, external, op, dev, reg); in mv88e6xxx_g2_smi_phy_read_data_c22()
641 return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SMI_PHY_DATA, data); in mv88e6xxx_g2_smi_phy_read_data_c22()
645 static int mv88e6xxx_g2_smi_phy_write_data_c22(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_write_data_c22() argument
652 err = mv88e6xxx_g2_smi_phy_wait(chip); in mv88e6xxx_g2_smi_phy_write_data_c22()
656 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SMI_PHY_DATA, data); in mv88e6xxx_g2_smi_phy_write_data_c22()
660 return mv88e6xxx_g2_smi_phy_access_c22(chip, external, op, dev, reg); in mv88e6xxx_g2_smi_phy_write_data_c22()
663 static int mv88e6xxx_g2_smi_phy_access_c45(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_access_c45() argument
667 return mv88e6xxx_g2_smi_phy_access(chip, external, true, op, port, dev); in mv88e6xxx_g2_smi_phy_access_c45()
671 static int mv88e6xxx_g2_smi_phy_write_addr_c45(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_write_addr_c45() argument
678 err = mv88e6xxx_g2_smi_phy_wait(chip); in mv88e6xxx_g2_smi_phy_write_addr_c45()
682 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SMI_PHY_DATA, addr); in mv88e6xxx_g2_smi_phy_write_addr_c45()
686 return mv88e6xxx_g2_smi_phy_access_c45(chip, external, op, port, dev); in mv88e6xxx_g2_smi_phy_write_addr_c45()
690 static int mv88e6xxx_g2_smi_phy_read_data_c45(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_read_data_c45() argument
697 err = mv88e6xxx_g2_smi_phy_access_c45(chip, external, op, port, dev); in mv88e6xxx_g2_smi_phy_read_data_c45()
701 return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SMI_PHY_DATA, data); in mv88e6xxx_g2_smi_phy_read_data_c45()
704 static int mv88e6xxx_g2_smi_phy_read_c45(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_read_c45() argument
712 err = mv88e6xxx_g2_smi_phy_write_addr_c45(chip, external, port, dev, in mv88e6xxx_g2_smi_phy_read_c45()
717 return mv88e6xxx_g2_smi_phy_read_data_c45(chip, external, port, dev, in mv88e6xxx_g2_smi_phy_read_c45()
722 static int mv88e6xxx_g2_smi_phy_write_data_c45(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_write_data_c45() argument
729 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SMI_PHY_DATA, data); in mv88e6xxx_g2_smi_phy_write_data_c45()
733 return mv88e6xxx_g2_smi_phy_access_c45(chip, external, op, port, dev); in mv88e6xxx_g2_smi_phy_write_data_c45()
736 static int mv88e6xxx_g2_smi_phy_write_c45(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_write_c45() argument
744 err = mv88e6xxx_g2_smi_phy_write_addr_c45(chip, external, port, dev, in mv88e6xxx_g2_smi_phy_write_c45()
749 return mv88e6xxx_g2_smi_phy_write_data_c45(chip, external, port, dev, in mv88e6xxx_g2_smi_phy_write_c45()
753 int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus, in mv88e6xxx_g2_smi_phy_read() argument
760 return mv88e6xxx_g2_smi_phy_read_c45(chip, external, addr, reg, in mv88e6xxx_g2_smi_phy_read()
763 return mv88e6xxx_g2_smi_phy_read_data_c22(chip, external, addr, reg, in mv88e6xxx_g2_smi_phy_read()
767 int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus, in mv88e6xxx_g2_smi_phy_write() argument
774 return mv88e6xxx_g2_smi_phy_write_c45(chip, external, addr, reg, in mv88e6xxx_g2_smi_phy_write()
777 return mv88e6xxx_g2_smi_phy_write_data_c22(chip, external, addr, reg, in mv88e6xxx_g2_smi_phy_write()
782 static int mv88e6097_watchdog_action(struct mv88e6xxx_chip *chip, int irq) in mv88e6097_watchdog_action() argument
786 mv88e6xxx_g2_read(chip, MV88E6352_G2_WDOG_CTL, ®); in mv88e6097_watchdog_action()
788 dev_info(chip->dev, "Watchdog event: 0x%04x", reg); in mv88e6097_watchdog_action()
793 static void mv88e6097_watchdog_free(struct mv88e6xxx_chip *chip) in mv88e6097_watchdog_free() argument
797 mv88e6xxx_g2_read(chip, MV88E6352_G2_WDOG_CTL, ®); in mv88e6097_watchdog_free()
802 mv88e6xxx_g2_write(chip, MV88E6352_G2_WDOG_CTL, reg); in mv88e6097_watchdog_free()
805 static int mv88e6097_watchdog_setup(struct mv88e6xxx_chip *chip) in mv88e6097_watchdog_setup() argument
807 return mv88e6xxx_g2_write(chip, MV88E6352_G2_WDOG_CTL, in mv88e6097_watchdog_setup()
819 static int mv88e6390_watchdog_setup(struct mv88e6xxx_chip *chip) in mv88e6390_watchdog_setup() argument
821 return mv88e6xxx_g2_update(chip, MV88E6390_G2_WDOG_CTL, in mv88e6390_watchdog_setup()
829 static int mv88e6390_watchdog_action(struct mv88e6xxx_chip *chip, int irq) in mv88e6390_watchdog_action() argument
834 mv88e6xxx_g2_write(chip, MV88E6390_G2_WDOG_CTL, in mv88e6390_watchdog_action()
836 err = mv88e6xxx_g2_read(chip, MV88E6390_G2_WDOG_CTL, ®); in mv88e6390_watchdog_action()
838 dev_info(chip->dev, "Watchdog event: 0x%04x", in mv88e6390_watchdog_action()
841 mv88e6xxx_g2_write(chip, MV88E6390_G2_WDOG_CTL, in mv88e6390_watchdog_action()
843 err = mv88e6xxx_g2_read(chip, MV88E6390_G2_WDOG_CTL, ®); in mv88e6390_watchdog_action()
845 dev_info(chip->dev, "Watchdog history: 0x%04x", in mv88e6390_watchdog_action()
849 if (chip->info->ops->reset) in mv88e6390_watchdog_action()
850 chip->info->ops->reset(chip); in mv88e6390_watchdog_action()
852 mv88e6390_watchdog_setup(chip); in mv88e6390_watchdog_action()
857 static void mv88e6390_watchdog_free(struct mv88e6xxx_chip *chip) in mv88e6390_watchdog_free() argument
859 mv88e6xxx_g2_update(chip, MV88E6390_G2_WDOG_CTL, in mv88e6390_watchdog_free()
871 struct mv88e6xxx_chip *chip = dev_id; in mv88e6xxx_g2_watchdog_thread_fn() local
874 mutex_lock(&chip->reg_lock); in mv88e6xxx_g2_watchdog_thread_fn()
875 if (chip->info->ops->watchdog_ops->irq_action) in mv88e6xxx_g2_watchdog_thread_fn()
876 ret = chip->info->ops->watchdog_ops->irq_action(chip, irq); in mv88e6xxx_g2_watchdog_thread_fn()
877 mutex_unlock(&chip->reg_lock); in mv88e6xxx_g2_watchdog_thread_fn()
882 static void mv88e6xxx_g2_watchdog_free(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_watchdog_free() argument
884 mutex_lock(&chip->reg_lock); in mv88e6xxx_g2_watchdog_free()
885 if (chip->info->ops->watchdog_ops->irq_free) in mv88e6xxx_g2_watchdog_free()
886 chip->info->ops->watchdog_ops->irq_free(chip); in mv88e6xxx_g2_watchdog_free()
887 mutex_unlock(&chip->reg_lock); in mv88e6xxx_g2_watchdog_free()
889 free_irq(chip->watchdog_irq, chip); in mv88e6xxx_g2_watchdog_free()
890 irq_dispose_mapping(chip->watchdog_irq); in mv88e6xxx_g2_watchdog_free()
893 static int mv88e6xxx_g2_watchdog_setup(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_watchdog_setup() argument
897 chip->watchdog_irq = irq_find_mapping(chip->g2_irq.domain, in mv88e6xxx_g2_watchdog_setup()
899 if (chip->watchdog_irq < 0) in mv88e6xxx_g2_watchdog_setup()
900 return chip->watchdog_irq; in mv88e6xxx_g2_watchdog_setup()
902 err = request_threaded_irq(chip->watchdog_irq, NULL, in mv88e6xxx_g2_watchdog_setup()
905 "mv88e6xxx-watchdog", chip); in mv88e6xxx_g2_watchdog_setup()
909 mutex_lock(&chip->reg_lock); in mv88e6xxx_g2_watchdog_setup()
910 if (chip->info->ops->watchdog_ops->irq_setup) in mv88e6xxx_g2_watchdog_setup()
911 err = chip->info->ops->watchdog_ops->irq_setup(chip); in mv88e6xxx_g2_watchdog_setup()
912 mutex_unlock(&chip->reg_lock); in mv88e6xxx_g2_watchdog_setup()
919 static int mv88e6xxx_g2_misc_5_bit_port(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_misc_5_bit_port() argument
925 err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_MISC, &val); in mv88e6xxx_g2_misc_5_bit_port()
934 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_MISC, val); in mv88e6xxx_g2_misc_5_bit_port()
937 int mv88e6xxx_g2_misc_4_bit_port(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_misc_4_bit_port() argument
939 return mv88e6xxx_g2_misc_5_bit_port(chip, false); in mv88e6xxx_g2_misc_4_bit_port()
944 struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d); in mv88e6xxx_g2_irq_mask() local
947 chip->g2_irq.masked |= (1 << n); in mv88e6xxx_g2_irq_mask()
952 struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d); in mv88e6xxx_g2_irq_unmask() local
955 chip->g2_irq.masked &= ~(1 << n); in mv88e6xxx_g2_irq_unmask()
960 struct mv88e6xxx_chip *chip = dev_id; in mv88e6xxx_g2_irq_thread_fn() local
967 mutex_lock(&chip->reg_lock); in mv88e6xxx_g2_irq_thread_fn()
968 err = mv88e6xxx_g2_int_source(chip, ®); in mv88e6xxx_g2_irq_thread_fn()
969 mutex_unlock(&chip->reg_lock); in mv88e6xxx_g2_irq_thread_fn()
975 sub_irq = irq_find_mapping(chip->g2_irq.domain, n); in mv88e6xxx_g2_irq_thread_fn()
986 struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d); in mv88e6xxx_g2_irq_bus_lock() local
988 mutex_lock(&chip->reg_lock); in mv88e6xxx_g2_irq_bus_lock()
993 struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d); in mv88e6xxx_g2_irq_bus_sync_unlock() local
996 err = mv88e6xxx_g2_int_mask(chip, ~chip->g2_irq.masked); in mv88e6xxx_g2_irq_bus_sync_unlock()
998 dev_err(chip->dev, "failed to mask interrupts\n"); in mv88e6xxx_g2_irq_bus_sync_unlock()
1000 mutex_unlock(&chip->reg_lock); in mv88e6xxx_g2_irq_bus_sync_unlock()
1015 struct mv88e6xxx_chip *chip = d->host_data; in mv88e6xxx_g2_irq_domain_map() local
1018 irq_set_chip_and_handler(irq, &chip->g2_irq.chip, handle_level_irq); in mv88e6xxx_g2_irq_domain_map()
1029 void mv88e6xxx_g2_irq_free(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_irq_free() argument
1033 mv88e6xxx_g2_watchdog_free(chip); in mv88e6xxx_g2_irq_free()
1035 free_irq(chip->device_irq, chip); in mv88e6xxx_g2_irq_free()
1036 irq_dispose_mapping(chip->device_irq); in mv88e6xxx_g2_irq_free()
1039 virq = irq_find_mapping(chip->g2_irq.domain, irq); in mv88e6xxx_g2_irq_free()
1043 irq_domain_remove(chip->g2_irq.domain); in mv88e6xxx_g2_irq_free()
1046 int mv88e6xxx_g2_irq_setup(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_irq_setup() argument
1050 chip->g2_irq.domain = irq_domain_add_simple( in mv88e6xxx_g2_irq_setup()
1051 chip->dev->of_node, 16, 0, &mv88e6xxx_g2_irq_domain_ops, chip); in mv88e6xxx_g2_irq_setup()
1052 if (!chip->g2_irq.domain) in mv88e6xxx_g2_irq_setup()
1056 irq_create_mapping(chip->g2_irq.domain, irq); in mv88e6xxx_g2_irq_setup()
1058 chip->g2_irq.chip = mv88e6xxx_g2_irq_chip; in mv88e6xxx_g2_irq_setup()
1059 chip->g2_irq.masked = ~0; in mv88e6xxx_g2_irq_setup()
1061 chip->device_irq = irq_find_mapping(chip->g1_irq.domain, in mv88e6xxx_g2_irq_setup()
1063 if (chip->device_irq < 0) { in mv88e6xxx_g2_irq_setup()
1064 err = chip->device_irq; in mv88e6xxx_g2_irq_setup()
1068 err = request_threaded_irq(chip->device_irq, NULL, in mv88e6xxx_g2_irq_setup()
1070 IRQF_ONESHOT, "mv88e6xxx-g2", chip); in mv88e6xxx_g2_irq_setup()
1074 return mv88e6xxx_g2_watchdog_setup(chip); in mv88e6xxx_g2_irq_setup()
1078 virq = irq_find_mapping(chip->g2_irq.domain, irq); in mv88e6xxx_g2_irq_setup()
1082 irq_domain_remove(chip->g2_irq.domain); in mv88e6xxx_g2_irq_setup()
1087 int mv88e6xxx_g2_irq_mdio_setup(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_irq_mdio_setup() argument
1092 for (phy = 0; phy < chip->info->num_internal_phys; phy++) { in mv88e6xxx_g2_irq_mdio_setup()
1093 irq = irq_find_mapping(chip->g2_irq.domain, phy); in mv88e6xxx_g2_irq_mdio_setup()
1098 bus->irq[chip->info->phy_base_addr + phy] = irq; in mv88e6xxx_g2_irq_mdio_setup()
1110 void mv88e6xxx_g2_irq_mdio_free(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_irq_mdio_free() argument
1115 for (phy = 0; phy < chip->info->num_internal_phys; phy++) in mv88e6xxx_g2_irq_mdio_free()