1 // SPDX-License-Identifier: GPL-2.0
3  * Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
4  * Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
5  * Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
6  * Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
8  * These switches have a built-in 8051 CPU and can download and execute a
10  * handling the switch in a memory-mapped manner by connecting to that external
37 #define VSC73XX_BLOCK_MAC	0x1 /* Subblocks 0-4, 6 (CPU port) */
88 #define VSC73XX_MAC_CFG_MAC_RX_RST	BIT(5)
122 #define VSC73XX_ADVPORTM_EXT_PORT	BIT(5)
184 #define VSC73XX_MACACCESS_CMD_CLEAR_TABLE	5
203 /* Arbiter block 5 registers */
261 #define VSC73XX_CMD_BLOCK_SHIFT		5
278  * struct vsc73xx - VSC73xx state container
291 #define IS_7385(a) ((a)->chipid == VSC73XX_CHIPID_ID_7385)
292 #define IS_7388(a) ((a)->chipid == VSC73XX_CHIPID_ID_7388)
293 #define IS_7395(a) ((a)->chipid == VSC73XX_CHIPID_ID_7395)
294 #define IS_7398(a) ((a)->chipid == VSC73XX_CHIPID_ID_7398)
303  * Some counters are custom, non-standard. The standard counters are
304  * named in accordance with RFC2819, RFC2021 and IEEE Std 802.3-2002 Annex
309 	{ 1, "RxBroadcast+MulticastPkts" }, /* non-standard counter */
310 	{ 2, "RxTotalErrorPackets" }, /* non-standard counter */
313 	{ 5, "RxEtherStatsPkts64Octets" },
319 	{ 11, "RxJumboFrames" }, /* non-standard counter */
321 	{ 13, "RxFIFODrops" }, /* non-standard counter */
322 	{ 14, "RxBackwardDrops" }, /* non-standard counter */
323 	{ 15, "RxClassifierDrops" }, /* non-standard counter */
330 	/* 22-24 are undefined */
332 	{ 26, "RxQoSClass0" }, /* non-standard counter */
333 	{ 27, "RxQoSClass1" }, /* non-standard counter */
334 	{ 28, "RxQoSClass2" }, /* non-standard counter */
335 	{ 29, "RxQoSClass3" }, /* non-standard counter */
340 	{ 1, "TxBroadcast+MulticastPkts" }, /* non-standard counter */
341 	{ 2, "TxTotalErrorPackets" }, /* non-standard counter */
344 	{ 5, "TxEtherStatsPkts64Octets" },
350 	{ 11, "TxJumboFrames" }, /* non-standard counter */
352 	{ 13, "TxFIFODrops" }, /* non-standard counter */
353 	{ 14, "TxDrops" }, /* non-standard counter */
360 	/* 21-24 are undefined */
362 	{ 26, "TxQoSClass0" }, /* non-standard counter */
363 	{ 27, "TxQoSClass1" }, /* non-standard counter */
364 	{ 28, "TxQoSClass2" }, /* non-standard counter */
365 	{ 29, "TxQoSClass3" }, /* non-standard counter */
421 		return -EINVAL;  in vsc73xx_read()
440 	mutex_lock(&vsc->lock);  in vsc73xx_read()
441 	ret = spi_sync(vsc->spi, &m);  in vsc73xx_read()
442 	mutex_unlock(&vsc->lock);  in vsc73xx_read()
462 		return -EINVAL;  in vsc73xx_write()
484 	mutex_lock(&vsc->lock);  in vsc73xx_write()
485 	ret = spi_sync(vsc->spi, &m);  in vsc73xx_write()
486 	mutex_unlock(&vsc->lock);  in vsc73xx_write()
497 	/* Same read-modify-write algorithm as e.g. regmap */  in vsc73xx_update_bits()
518 		dev_err(vsc->dev, "unable to read mailbox (%d)\n", ret);  in vsc73xx_detect()
523 		dev_info(vsc->dev, "chip seems dead, assert reset\n");  in vsc73xx_detect()
524 		gpiod_set_value_cansleep(vsc->reset, 1);  in vsc73xx_detect()
529 		gpiod_set_value_cansleep(vsc->reset, 0);  in vsc73xx_detect()
536 			dev_err(vsc->dev, "seems not to help, giving up\n");  in vsc73xx_detect()
537 			return -ENODEV;  in vsc73xx_detect()
544 		dev_err(vsc->dev, "unable to read chip id (%d)\n", ret);  in vsc73xx_detect()
557 		dev_err(vsc->dev, "unsupported chip, id=%04x\n", id);  in vsc73xx_detect()
558 		return -ENODEV;  in vsc73xx_detect()
561 	vsc->chipid = id;  in vsc73xx_detect()
564 	dev_info(vsc->dev, "VSC%04X (rev: %d) switch found\n", id, rev);  in vsc73xx_detect()
569 		dev_err(vsc->dev, "unable to read iCPU control\n");  in vsc73xx_detect()
582 		dev_err(vsc->dev,  in vsc73xx_detect()
584 		dev_err(vsc->dev, "no idea how to deal with this\n");  in vsc73xx_detect()
585 		return -ENODEV;  in vsc73xx_detect()
588 		dev_err(vsc->dev,  in vsc73xx_detect()
590 		dev_err(vsc->dev, "no idea how to deal with this\n");  in vsc73xx_detect()
591 		return -ENODEV;  in vsc73xx_detect()
594 		dev_err(vsc->dev,  in vsc73xx_detect()
596 		dev_err(vsc->dev, "no idea how to deal with this\n");  in vsc73xx_detect()
597 		return -ENODEV;  in vsc73xx_detect()
600 	dev_info(vsc->dev, "iCPU disabled, no external memory\n");  in vsc73xx_detect()
607 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_phy_read()
622 		dev_err(vsc->dev, "reading reg %02x from phy%d failed\n",  in vsc73xx_phy_read()
624 		return -EIO;  in vsc73xx_phy_read()
628 	dev_dbg(vsc->dev, "read reg %02x from phy%d = %04x\n",  in vsc73xx_phy_read()
637 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_phy_write()
648 		dev_info(vsc->dev, "reset PHY - disallowed\n");  in vsc73xx_phy_write()
657 	dev_dbg(vsc->dev, "write %04x to reg %02x in phy%d\n",  in vsc73xx_phy_write()
679 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_setup()
682 	dev_info(vsc->dev, "set up the switch\n");  in vsc73xx_setup()
691 	 * VSC7385 SparX-G5 datasheet section 6.6.1  in vsc73xx_setup()
692 	 * VSC7395 SparX-G5e datasheet section 6.6.1  in vsc73xx_setup()
730 		if (i == 5)  in vsc73xx_setup()
769 	 * augmented after auto-negotiation on the PHY-facing  in vsc73xx_init_port()
820 	val = (vsc->addr[5] << 16) | (vsc->addr[4] << 8) | (vsc->addr[3]);  in vsc73xx_init_port()
825 	val = (vsc->addr[2] << 16) | (vsc->addr[1] << 8) | (vsc->addr[0]);  in vsc73xx_init_port()
887 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_adjust_link()
890 	/* Special handling of the CPU-facing port */  in vsc73xx_adjust_link()
909 	if (!phydev->link) {  in vsc73xx_adjust_link()
912 		dev_dbg(vsc->dev, "port %d: went down\n",  in vsc73xx_adjust_link()
931 			if (--maxloop == 0) {  in vsc73xx_adjust_link()
932 				dev_err(vsc->dev,  in vsc73xx_adjust_link()
959 	if (phydev->speed == SPEED_1000) {  in vsc73xx_adjust_link()
960 		dev_dbg(vsc->dev, "port %d: 1000 Mbit mode full duplex\n",  in vsc73xx_adjust_link()
964 		if (phydev->interface == PHY_INTERFACE_MODE_RGMII)  in vsc73xx_adjust_link()
969 	} else if (phydev->speed == SPEED_100) {  in vsc73xx_adjust_link()
970 		if (phydev->duplex == DUPLEX_FULL) {  in vsc73xx_adjust_link()
972 			dev_dbg(vsc->dev,  in vsc73xx_adjust_link()
977 			dev_dbg(vsc->dev,  in vsc73xx_adjust_link()
982 	} else if (phydev->speed == SPEED_10) {  in vsc73xx_adjust_link()
983 		if (phydev->duplex == DUPLEX_FULL) {  in vsc73xx_adjust_link()
985 			dev_dbg(vsc->dev,  in vsc73xx_adjust_link()
990 			dev_dbg(vsc->dev,  in vsc73xx_adjust_link()
996 		dev_err(vsc->dev,  in vsc73xx_adjust_link()
1008 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_port_enable()
1010 	dev_info(vsc->dev, "enable port %d\n", port);  in vsc73xx_port_enable()
1019 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_port_disable()
1047 		if (cnt->counter == counter)  in vsc73xx_find_counter()
1058 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_get_strings()
1073 	indices[1] = ((val >> 5) & 0x1f); /* RX counter 1 */  in vsc73xx_get_strings()
1077 	indices[5] = ((val >> 26) & 0x1f); /* TX counter 2 */  in vsc73xx_get_strings()
1086 	 * figure out what counters we use in this set-up and return the  in vsc73xx_get_strings()
1095 				cnt->name, ETH_GSTRING_LEN);  in vsc73xx_get_strings()
1108 				cnt->name, ETH_GSTRING_LEN);  in vsc73xx_get_strings()
1125 	struct vsc73xx *vsc = ds->priv;  in vsc73xx_get_ethtool_stats()
1144 			dev_err(vsc->dev, "error reading counter %d\n", i);  in vsc73xx_get_ethtool_stats()
1228 	vsc->gc.label = devm_kasprintf(vsc->dev, GFP_KERNEL, "VSC%04x",  in vsc73xx_gpio_probe()
1229 				       vsc->chipid);  in vsc73xx_gpio_probe()
1230 	vsc->gc.ngpio = 4;  in vsc73xx_gpio_probe()
1231 	vsc->gc.owner = THIS_MODULE;  in vsc73xx_gpio_probe()
1232 	vsc->gc.parent = vsc->dev;  in vsc73xx_gpio_probe()
1233 	vsc->gc.of_node = vsc->dev->of_node;  in vsc73xx_gpio_probe()
1234 	vsc->gc.base = -1;  in vsc73xx_gpio_probe()
1235 	vsc->gc.get = vsc73xx_gpio_get;  in vsc73xx_gpio_probe()
1236 	vsc->gc.set = vsc73xx_gpio_set;  in vsc73xx_gpio_probe()
1237 	vsc->gc.direction_input = vsc73xx_gpio_direction_input;  in vsc73xx_gpio_probe()
1238 	vsc->gc.direction_output = vsc73xx_gpio_direction_output;  in vsc73xx_gpio_probe()
1239 	vsc->gc.get_direction = vsc73xx_gpio_get_direction;  in vsc73xx_gpio_probe()
1240 	vsc->gc.can_sleep = true;  in vsc73xx_gpio_probe()
1241 	ret = devm_gpiochip_add_data(vsc->dev, &vsc->gc, vsc);  in vsc73xx_gpio_probe()
1243 		dev_err(vsc->dev, "unable to register GPIO chip\n");  in vsc73xx_gpio_probe()
1251 	struct device *dev = &spi->dev;  in vsc73xx_probe()
1257 		return -ENOMEM;  in vsc73xx_probe()
1260 	vsc->spi = spi_dev_get(spi);  in vsc73xx_probe()
1261 	vsc->dev = dev;  in vsc73xx_probe()
1262 	mutex_init(&vsc->lock);  in vsc73xx_probe()
1265 	vsc->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);  in vsc73xx_probe()
1266 	if (IS_ERR(vsc->reset)) {  in vsc73xx_probe()
1268 		return PTR_ERR(vsc->reset);  in vsc73xx_probe()
1270 	if (vsc->reset)  in vsc73xx_probe()
1274 	spi->mode = SPI_MODE_0;  in vsc73xx_probe()
1275 	spi->bits_per_word = 8;  in vsc73xx_probe()
1285 		return -ENODEV;  in vsc73xx_probe()
1288 	eth_random_addr(vsc->addr);  in vsc73xx_probe()
1289 	dev_info(vsc->dev,  in vsc73xx_probe()
1291 		 vsc->addr[0], vsc->addr[1], vsc->addr[2],  in vsc73xx_probe()
1292 		 vsc->addr[3], vsc->addr[4], vsc->addr[5]);  in vsc73xx_probe()
1294 	/* The VSC7395 switch chips have 5+1 ports which means 5  in vsc73xx_probe()
1297 	 * and 6, so they leave a "hole" in the port map for port 5,  in vsc73xx_probe()
1305 	vsc->ds = dsa_switch_alloc(dev, 8);  in vsc73xx_probe()
1306 	if (!vsc->ds)  in vsc73xx_probe()
1307 		return -ENOMEM;  in vsc73xx_probe()
1308 	vsc->ds->priv = vsc;  in vsc73xx_probe()
1310 	vsc->ds->ops = &vsc73xx_ds_ops;  in vsc73xx_probe()
1311 	ret = dsa_register_switch(vsc->ds);  in vsc73xx_probe()
1319 		dsa_unregister_switch(vsc->ds);  in vsc73xx_probe()
1330 	dsa_unregister_switch(vsc->ds);  in vsc73xx_remove()
1331 	gpiod_set_value(vsc->reset, 1);  in vsc73xx_remove()