Lines Matching full:db
368 struct dmfe_board_info *db; /* board information structure */ in dmfe_init_one() local
395 dev = alloc_etherdev(sizeof(*db)); in dmfe_init_one()
439 db = netdev_priv(dev); in dmfe_init_one()
442 db->desc_pool_ptr = pci_alloc_consistent(pdev, sizeof(struct tx_desc) * in dmfe_init_one()
443 DESC_ALL_CNT + 0x20, &db->desc_pool_dma_ptr); in dmfe_init_one()
444 if (!db->desc_pool_ptr) { in dmfe_init_one()
449 db->buf_pool_ptr = pci_alloc_consistent(pdev, TX_BUF_ALLOC * in dmfe_init_one()
450 TX_DESC_CNT + 4, &db->buf_pool_dma_ptr); in dmfe_init_one()
451 if (!db->buf_pool_ptr) { in dmfe_init_one()
456 db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr; in dmfe_init_one()
457 db->first_tx_desc_dma = db->desc_pool_dma_ptr; in dmfe_init_one()
458 db->buf_pool_start = db->buf_pool_ptr; in dmfe_init_one()
459 db->buf_pool_dma_start = db->buf_pool_dma_ptr; in dmfe_init_one()
461 db->chip_id = ent->driver_data; in dmfe_init_one()
463 db->ioaddr = pci_iomap(pdev, 0, 0); in dmfe_init_one()
464 if (!db->ioaddr) { in dmfe_init_one()
469 db->chip_revision = pdev->revision; in dmfe_init_one()
470 db->wol_mode = 0; in dmfe_init_one()
472 db->pdev = pdev; in dmfe_init_one()
478 spin_lock_init(&db->lock); in dmfe_init_one()
482 if ( (pci_pmr == 0x10000) && (db->chip_revision == 0x31) ) in dmfe_init_one()
483 db->chip_type = 1; /* DM9102A E3 */ in dmfe_init_one()
485 db->chip_type = 0; in dmfe_init_one()
489 ((__le16 *) db->srom)[i] = in dmfe_init_one()
490 cpu_to_le16(read_srom_word(db->ioaddr, i)); in dmfe_init_one()
495 dev->dev_addr[i] = db->srom[20 + i]; in dmfe_init_one()
510 pci_iounmap(pdev, db->ioaddr); in dmfe_init_one()
513 db->buf_pool_ptr, db->buf_pool_dma_ptr); in dmfe_init_one()
516 db->desc_pool_ptr, db->desc_pool_dma_ptr); in dmfe_init_one()
531 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_remove_one() local
538 pci_iounmap(db->pdev, db->ioaddr); in dmfe_remove_one()
539 pci_free_consistent(db->pdev, sizeof(struct tx_desc) * in dmfe_remove_one()
540 DESC_ALL_CNT + 0x20, db->desc_pool_ptr, in dmfe_remove_one()
541 db->desc_pool_dma_ptr); in dmfe_remove_one()
542 pci_free_consistent(db->pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4, in dmfe_remove_one()
543 db->buf_pool_ptr, db->buf_pool_dma_ptr); in dmfe_remove_one()
559 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_open() local
560 const int irq = db->pdev->irq; in dmfe_open()
570 db->cr6_data = CR6_DEFAULT | dmfe_cr6_user_set; in dmfe_open()
571 db->tx_packet_cnt = 0; in dmfe_open()
572 db->tx_queue_cnt = 0; in dmfe_open()
573 db->rx_avail_cnt = 0; in dmfe_open()
574 db->wait_reset = 0; in dmfe_open()
576 db->first_in_callback = 0; in dmfe_open()
577 db->NIC_capability = 0xf; /* All capability*/ in dmfe_open()
578 db->PHY_reg4 = 0x1e0; in dmfe_open()
581 if ( !chkmode || (db->chip_id == PCI_DM9132_ID) || in dmfe_open()
582 (db->chip_revision >= 0x30) ) { in dmfe_open()
583 db->cr6_data |= DMFE_TXTH_256; in dmfe_open()
584 db->cr0_data = CR0_DEFAULT; in dmfe_open()
585 db->dm910x_chk_mode=4; /* Enter the normal mode */ in dmfe_open()
587 db->cr6_data |= CR6_SFT; /* Store & Forward mode */ in dmfe_open()
588 db->cr0_data = 0; in dmfe_open()
589 db->dm910x_chk_mode = 1; /* Enter the check mode */ in dmfe_open()
599 timer_setup(&db->timer, dmfe_timer, 0); in dmfe_open()
600 db->timer.expires = DMFE_TIMER_WUT + HZ * 2; in dmfe_open()
601 add_timer(&db->timer); in dmfe_open()
616 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_init_dm910x() local
617 void __iomem *ioaddr = db->ioaddr; in dmfe_init_dm910x()
624 dw32(DCR0, db->cr0_data); in dmfe_init_dm910x()
628 db->phy_addr = 1; in dmfe_init_dm910x()
631 dmfe_parse_srom(db); in dmfe_init_dm910x()
632 db->media_mode = dmfe_media_mode; in dmfe_init_dm910x()
636 if (db->chip_id == PCI_DM9009_ID) { in dmfe_init_dm910x()
643 if ( !(db->media_mode & 0x10) ) /* Force 1M mode */ in dmfe_init_dm910x()
644 dmfe_set_phyxcer(db); in dmfe_init_dm910x()
647 if ( !(db->media_mode & DMFE_AUTO) ) in dmfe_init_dm910x()
648 db->op_mode = db->media_mode; /* Force Mode */ in dmfe_init_dm910x()
654 update_cr6(db->cr6_data, ioaddr); in dmfe_init_dm910x()
657 if (db->chip_id == PCI_DM9132_ID) in dmfe_init_dm910x()
663 db->cr7_data = CR7_DEFAULT; in dmfe_init_dm910x()
664 dw32(DCR7, db->cr7_data); in dmfe_init_dm910x()
667 dw32(DCR15, db->cr15_data); in dmfe_init_dm910x()
670 db->cr6_data |= CR6_RXSC | CR6_TXSC | 0x40000; in dmfe_init_dm910x()
671 update_cr6(db->cr6_data, ioaddr); in dmfe_init_dm910x()
683 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_start_xmit() local
684 void __iomem *ioaddr = db->ioaddr; in dmfe_start_xmit()
700 spin_lock_irqsave(&db->lock, flags); in dmfe_start_xmit()
703 if (db->tx_queue_cnt >= TX_FREE_DESC_CNT) { in dmfe_start_xmit()
704 spin_unlock_irqrestore(&db->lock, flags); in dmfe_start_xmit()
705 pr_err("No Tx resource %ld\n", db->tx_queue_cnt); in dmfe_start_xmit()
713 txptr = db->tx_insert_ptr; in dmfe_start_xmit()
718 db->tx_insert_ptr = txptr->next_tx_desc; in dmfe_start_xmit()
721 if ( (!db->tx_queue_cnt) && (db->tx_packet_cnt < TX_MAX_SEND_CNT) ) { in dmfe_start_xmit()
723 db->tx_packet_cnt++; /* Ready to send */ in dmfe_start_xmit()
727 db->tx_queue_cnt++; /* queue TX packet */ in dmfe_start_xmit()
732 if ( db->tx_queue_cnt < TX_FREE_DESC_CNT ) in dmfe_start_xmit()
736 spin_unlock_irqrestore(&db->lock, flags); in dmfe_start_xmit()
737 dw32(DCR7, db->cr7_data); in dmfe_start_xmit()
753 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_stop() local
754 void __iomem *ioaddr = db->ioaddr; in dmfe_stop()
762 del_timer_sync(&db->timer); in dmfe_stop()
767 dmfe_phy_write(ioaddr, db->phy_addr, 0, 0x8000, db->chip_id); in dmfe_stop()
770 free_irq(db->pdev->irq, dev); in dmfe_stop()
773 dmfe_free_rxbuffer(db); in dmfe_stop()
778 db->tx_fifo_underrun, db->tx_excessive_collision, in dmfe_stop()
779 db->tx_late_collision, db->tx_no_carrier, db->tx_loss_carrier, in dmfe_stop()
780 db->tx_jabber_timeout, db->reset_count, db->reset_cr8, in dmfe_stop()
781 db->reset_fatal, db->reset_TXtimeout); in dmfe_stop()
796 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_interrupt() local
797 void __iomem *ioaddr = db->ioaddr; in dmfe_interrupt()
802 spin_lock_irqsave(&db->lock, flags); in dmfe_interrupt()
805 db->cr5_data = dr32(DCR5); in dmfe_interrupt()
806 dw32(DCR5, db->cr5_data); in dmfe_interrupt()
807 if ( !(db->cr5_data & 0xc1) ) { in dmfe_interrupt()
808 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
816 if (db->cr5_data & 0x2000) { in dmfe_interrupt()
818 DMFE_DBUG(1, "System bus error happen. CR5=", db->cr5_data); in dmfe_interrupt()
819 db->reset_fatal++; in dmfe_interrupt()
820 db->wait_reset = 1; /* Need to RESET */ in dmfe_interrupt()
821 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
826 if ( (db->cr5_data & 0x40) && db->rx_avail_cnt ) in dmfe_interrupt()
827 dmfe_rx_packet(dev, db); in dmfe_interrupt()
830 if (db->rx_avail_cnt<RX_DESC_CNT) in dmfe_interrupt()
834 if ( db->cr5_data & 0x01) in dmfe_interrupt()
835 dmfe_free_tx_pkt(dev, db); in dmfe_interrupt()
838 if (db->dm910x_chk_mode & 0x2) { in dmfe_interrupt()
839 db->dm910x_chk_mode = 0x4; in dmfe_interrupt()
840 db->cr6_data |= 0x100; in dmfe_interrupt()
841 update_cr6(db->cr6_data, ioaddr); in dmfe_interrupt()
845 dw32(DCR7, db->cr7_data); in dmfe_interrupt()
847 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
861 struct dmfe_board_info *db = netdev_priv(dev); in poll_dmfe() local
862 const int irq = db->pdev->irq; in poll_dmfe()
876 static void dmfe_free_tx_pkt(struct net_device *dev, struct dmfe_board_info *db) in dmfe_free_tx_pkt() argument
879 void __iomem *ioaddr = db->ioaddr; in dmfe_free_tx_pkt()
882 txptr = db->tx_remove_ptr; in dmfe_free_tx_pkt()
883 while(db->tx_packet_cnt) { in dmfe_free_tx_pkt()
889 db->tx_packet_cnt--; in dmfe_free_tx_pkt()
900 db->tx_fifo_underrun++; in dmfe_free_tx_pkt()
901 if ( !(db->cr6_data & CR6_SFT) ) { in dmfe_free_tx_pkt()
902 db->cr6_data = db->cr6_data | CR6_SFT; in dmfe_free_tx_pkt()
903 update_cr6(db->cr6_data, ioaddr); in dmfe_free_tx_pkt()
907 db->tx_excessive_collision++; in dmfe_free_tx_pkt()
909 db->tx_late_collision++; in dmfe_free_tx_pkt()
911 db->tx_no_carrier++; in dmfe_free_tx_pkt()
913 db->tx_loss_carrier++; in dmfe_free_tx_pkt()
915 db->tx_jabber_timeout++; in dmfe_free_tx_pkt()
923 db->tx_remove_ptr = txptr; in dmfe_free_tx_pkt()
926 if ( (db->tx_packet_cnt < TX_MAX_SEND_CNT) && db->tx_queue_cnt ) { in dmfe_free_tx_pkt()
928 db->tx_packet_cnt++; /* Ready to send */ in dmfe_free_tx_pkt()
929 db->tx_queue_cnt--; in dmfe_free_tx_pkt()
935 if ( db->tx_queue_cnt < TX_WAKE_DESC_CNT ) in dmfe_free_tx_pkt()
958 static void dmfe_rx_packet(struct net_device *dev, struct dmfe_board_info *db) in dmfe_rx_packet() argument
965 rxptr = db->rx_ready_ptr; in dmfe_rx_packet()
967 while(db->rx_avail_cnt) { in dmfe_rx_packet()
972 db->rx_avail_cnt--; in dmfe_rx_packet()
973 db->interval_rx_cnt++; in dmfe_rx_packet()
975 pci_unmap_single(db->pdev, le32_to_cpu(rxptr->rdes2), in dmfe_rx_packet()
982 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1000 ((db->cr6_data & CR6_PM) && (rxlen>6)) ) { in dmfe_rx_packet()
1004 if ( (db->dm910x_chk_mode & 1) && in dmfe_rx_packet()
1008 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1009 db->dm910x_chk_mode = 3; in dmfe_rx_packet()
1023 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1035 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1042 db->rx_ready_ptr = rxptr; in dmfe_rx_packet()
1051 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_set_filter_mode() local
1056 spin_lock_irqsave(&db->lock, flags); in dmfe_set_filter_mode()
1060 db->cr6_data |= CR6_PM | CR6_PBF; in dmfe_set_filter_mode()
1061 update_cr6(db->cr6_data, db->ioaddr); in dmfe_set_filter_mode()
1062 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1068 db->cr6_data &= ~(CR6_PM | CR6_PBF); in dmfe_set_filter_mode()
1069 db->cr6_data |= CR6_PAM; in dmfe_set_filter_mode()
1070 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1075 if (db->chip_id == PCI_DM9132_ID) in dmfe_set_filter_mode()
1079 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1099 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_ethtool_set_wol() local
1105 db->wol_mode = wolinfo->wolopts; in dmfe_ethtool_set_wol()
1112 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_ethtool_get_wol() local
1115 wolinfo->wolopts = db->wol_mode; in dmfe_ethtool_get_wol()
1133 struct dmfe_board_info *db = from_timer(db, t, timer); in dmfe_timer() local
1134 struct net_device *dev = pci_get_drvdata(db->pdev); in dmfe_timer()
1135 void __iomem *ioaddr = db->ioaddr; in dmfe_timer()
1143 spin_lock_irqsave(&db->lock, flags); in dmfe_timer()
1146 if (db->first_in_callback == 0) { in dmfe_timer()
1147 db->first_in_callback = 1; in dmfe_timer()
1148 if (db->chip_type && (db->chip_id==PCI_DM9102_ID)) { in dmfe_timer()
1149 db->cr6_data &= ~0x40000; in dmfe_timer()
1150 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1151 dmfe_phy_write(ioaddr, db->phy_addr, 0, 0x1000, db->chip_id); in dmfe_timer()
1152 db->cr6_data |= 0x40000; in dmfe_timer()
1153 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1154 db->timer.expires = DMFE_TIMER_WUT + HZ * 2; in dmfe_timer()
1155 add_timer(&db->timer); in dmfe_timer()
1156 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1163 if ( (db->dm910x_chk_mode & 0x1) && in dmfe_timer()
1165 db->dm910x_chk_mode = 0x4; in dmfe_timer()
1169 if ( (db->interval_rx_cnt==0) && (tmp_cr8) ) { in dmfe_timer()
1170 db->reset_cr8++; in dmfe_timer()
1171 db->wait_reset = 1; in dmfe_timer()
1173 db->interval_rx_cnt = 0; in dmfe_timer()
1176 if ( db->tx_packet_cnt && in dmfe_timer()
1182 db->reset_TXtimeout++; in dmfe_timer()
1183 db->wait_reset = 1; in dmfe_timer()
1188 if (db->wait_reset) { in dmfe_timer()
1189 DMFE_DBUG(0, "Dynamic Reset device", db->tx_packet_cnt); in dmfe_timer()
1190 db->reset_count++; in dmfe_timer()
1192 db->first_in_callback = 0; in dmfe_timer()
1193 db->timer.expires = DMFE_TIMER_WUT; in dmfe_timer()
1194 add_timer(&db->timer); in dmfe_timer()
1195 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1200 if (db->chip_id == PCI_DM9132_ID) in dmfe_timer()
1205 if ( ((db->chip_id == PCI_DM9102_ID) && in dmfe_timer()
1206 (db->chip_revision == 0x30)) || in dmfe_timer()
1207 ((db->chip_id == PCI_DM9132_ID) && in dmfe_timer()
1208 (db->chip_revision == 0x10)) ) { in dmfe_timer()
1227 dmfe_phy_read (db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_timer()
1228 link_ok_phy = (dmfe_phy_read (db->ioaddr, in dmfe_timer()
1229 db->phy_addr, 1, db->chip_id) & 0x4) ? 1 : 0; in dmfe_timer()
1243 if ( !(db->media_mode & 0x38) ) in dmfe_timer()
1244 dmfe_phy_write(db->ioaddr, db->phy_addr, in dmfe_timer()
1245 0, 0x1000, db->chip_id); in dmfe_timer()
1248 if (db->media_mode & DMFE_AUTO) { in dmfe_timer()
1250 db->cr6_data|=0x00040000; /* bit18=1, MII */ in dmfe_timer()
1251 db->cr6_data&=~0x00000200; /* bit9=0, HD mode */ in dmfe_timer()
1252 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1259 if ( !(db->media_mode & DMFE_AUTO) || !dmfe_sense_speed(db)) { in dmfe_timer()
1261 SHOW_MEDIA_TYPE(db->op_mode); in dmfe_timer()
1264 dmfe_process_mode(db); in dmfe_timer()
1268 if (db->HPNA_command & 0xf00) { in dmfe_timer()
1269 db->HPNA_timer--; in dmfe_timer()
1270 if (!db->HPNA_timer) in dmfe_timer()
1271 dmfe_HPNA_remote_cmd_chk(db); in dmfe_timer()
1275 db->timer.expires = DMFE_TIMER_WUT; in dmfe_timer()
1276 add_timer(&db->timer); in dmfe_timer()
1277 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1291 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_dynamic_reset() local
1292 void __iomem *ioaddr = db->ioaddr; in dmfe_dynamic_reset()
1297 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */ in dmfe_dynamic_reset()
1298 update_cr6(db->cr6_data, ioaddr); in dmfe_dynamic_reset()
1306 dmfe_free_rxbuffer(db); in dmfe_dynamic_reset()
1309 db->tx_packet_cnt = 0; in dmfe_dynamic_reset()
1310 db->tx_queue_cnt = 0; in dmfe_dynamic_reset()
1311 db->rx_avail_cnt = 0; in dmfe_dynamic_reset()
1313 db->wait_reset = 0; in dmfe_dynamic_reset()
1327 static void dmfe_free_rxbuffer(struct dmfe_board_info * db) in dmfe_free_rxbuffer() argument
1332 while (db->rx_avail_cnt) { in dmfe_free_rxbuffer()
1333 dev_kfree_skb(db->rx_ready_ptr->rx_skb_ptr); in dmfe_free_rxbuffer()
1334 db->rx_ready_ptr = db->rx_ready_ptr->next_rx_desc; in dmfe_free_rxbuffer()
1335 db->rx_avail_cnt--; in dmfe_free_rxbuffer()
1344 static void dmfe_reuse_skb(struct dmfe_board_info *db, struct sk_buff * skb) in dmfe_reuse_skb() argument
1346 struct rx_desc *rxptr = db->rx_insert_ptr; in dmfe_reuse_skb()
1350 rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev, in dmfe_reuse_skb()
1354 db->rx_avail_cnt++; in dmfe_reuse_skb()
1355 db->rx_insert_ptr = rxptr->next_rx_desc; in dmfe_reuse_skb()
1357 DMFE_DBUG(0, "SK Buffer reuse method error", db->rx_avail_cnt); in dmfe_reuse_skb()
1368 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_descriptor_init() local
1369 void __iomem *ioaddr = db->ioaddr; in dmfe_descriptor_init()
1380 db->tx_insert_ptr = db->first_tx_desc; in dmfe_descriptor_init()
1381 db->tx_remove_ptr = db->first_tx_desc; in dmfe_descriptor_init()
1382 dw32(DCR4, db->first_tx_desc_dma); /* TX DESC address */ in dmfe_descriptor_init()
1385 db->first_rx_desc = (void *)db->first_tx_desc + in dmfe_descriptor_init()
1388 db->first_rx_desc_dma = db->first_tx_desc_dma + in dmfe_descriptor_init()
1390 db->rx_insert_ptr = db->first_rx_desc; in dmfe_descriptor_init()
1391 db->rx_ready_ptr = db->first_rx_desc; in dmfe_descriptor_init()
1392 dw32(DCR3, db->first_rx_desc_dma); /* RX DESC address */ in dmfe_descriptor_init()
1395 tmp_buf = db->buf_pool_start; in dmfe_descriptor_init()
1396 tmp_buf_dma = db->buf_pool_dma_start; in dmfe_descriptor_init()
1397 tmp_tx_dma = db->first_tx_desc_dma; in dmfe_descriptor_init()
1398 for (tmp_tx = db->first_tx_desc, i = 0; i < TX_DESC_CNT; i++, tmp_tx++) { in dmfe_descriptor_init()
1409 (--tmp_tx)->tdes3 = cpu_to_le32(db->first_tx_desc_dma); in dmfe_descriptor_init()
1410 tmp_tx->next_tx_desc = db->first_tx_desc; in dmfe_descriptor_init()
1413 tmp_rx_dma=db->first_rx_desc_dma; in dmfe_descriptor_init()
1414 for (tmp_rx = db->first_rx_desc, i = 0; i < RX_DESC_CNT; i++, tmp_rx++) { in dmfe_descriptor_init()
1421 (--tmp_rx)->rdes3 = cpu_to_le32(db->first_rx_desc_dma); in dmfe_descriptor_init()
1422 tmp_rx->next_rx_desc = db->first_rx_desc; in dmfe_descriptor_init()
1453 struct dmfe_board_info *db = netdev_priv(dev); in dm9132_id_table() local
1454 void __iomem *ioaddr = db->ioaddr + 0xc0; in dm9132_id_table()
1491 struct dmfe_board_info *db = netdev_priv(dev); in send_filter_frame() local
1500 txptr = db->tx_insert_ptr; in send_filter_frame()
1529 db->tx_insert_ptr = txptr->next_tx_desc; in send_filter_frame()
1533 if (!db->tx_packet_cnt) { in send_filter_frame()
1534 void __iomem *ioaddr = db->ioaddr; in send_filter_frame()
1537 db->tx_packet_cnt++; in send_filter_frame()
1539 update_cr6(db->cr6_data | 0x2000, ioaddr); in send_filter_frame()
1541 update_cr6(db->cr6_data, ioaddr); in send_filter_frame()
1544 db->tx_queue_cnt++; /* Put in TX queue */ in send_filter_frame()
1555 struct dmfe_board_info *db = netdev_priv(dev); in allocate_rx_buffer() local
1559 rxptr = db->rx_insert_ptr; in allocate_rx_buffer()
1561 while(db->rx_avail_cnt < RX_DESC_CNT) { in allocate_rx_buffer()
1565 rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev, skb->data, in allocate_rx_buffer()
1570 db->rx_avail_cnt++; in allocate_rx_buffer()
1573 db->rx_insert_ptr = rxptr; in allocate_rx_buffer()
1637 static u8 dmfe_sense_speed(struct dmfe_board_info *db) in dmfe_sense_speed() argument
1639 void __iomem *ioaddr = db->ioaddr; in dmfe_sense_speed()
1644 update_cr6(db->cr6_data & ~0x40000, ioaddr); in dmfe_sense_speed()
1646 phy_mode = dmfe_phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_sense_speed()
1647 phy_mode = dmfe_phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_sense_speed()
1650 if (db->chip_id == PCI_DM9132_ID) /* DM9132 */ in dmfe_sense_speed()
1651 phy_mode = dmfe_phy_read(db->ioaddr, in dmfe_sense_speed()
1652 db->phy_addr, 7, db->chip_id) & 0xf000; in dmfe_sense_speed()
1654 phy_mode = dmfe_phy_read(db->ioaddr, in dmfe_sense_speed()
1655 db->phy_addr, 17, db->chip_id) & 0xf000; in dmfe_sense_speed()
1657 case 0x1000: db->op_mode = DMFE_10MHF; break; in dmfe_sense_speed()
1658 case 0x2000: db->op_mode = DMFE_10MFD; break; in dmfe_sense_speed()
1659 case 0x4000: db->op_mode = DMFE_100MHF; break; in dmfe_sense_speed()
1660 case 0x8000: db->op_mode = DMFE_100MFD; break; in dmfe_sense_speed()
1661 default: db->op_mode = DMFE_10MHF; in dmfe_sense_speed()
1666 db->op_mode = DMFE_10MHF; in dmfe_sense_speed()
1681 static void dmfe_set_phyxcer(struct dmfe_board_info *db) in dmfe_set_phyxcer() argument
1683 void __iomem *ioaddr = db->ioaddr; in dmfe_set_phyxcer()
1687 db->cr6_data &= ~0x40000; in dmfe_set_phyxcer()
1688 update_cr6(db->cr6_data, ioaddr); in dmfe_set_phyxcer()
1691 if (db->chip_id == PCI_DM9009_ID) { in dmfe_set_phyxcer()
1692 phy_reg = dmfe_phy_read(db->ioaddr, in dmfe_set_phyxcer()
1693 db->phy_addr, 18, db->chip_id) & ~0x1000; in dmfe_set_phyxcer()
1695 dmfe_phy_write(db->ioaddr, in dmfe_set_phyxcer()
1696 db->phy_addr, 18, phy_reg, db->chip_id); in dmfe_set_phyxcer()
1700 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0; in dmfe_set_phyxcer()
1702 if (db->media_mode & DMFE_AUTO) { in dmfe_set_phyxcer()
1704 phy_reg |= db->PHY_reg4; in dmfe_set_phyxcer()
1707 switch(db->media_mode) { in dmfe_set_phyxcer()
1713 if (db->chip_id == PCI_DM9009_ID) phy_reg &= 0x61; in dmfe_set_phyxcer()
1718 phy_reg|=db->PHY_reg4; in dmfe_set_phyxcer()
1719 db->media_mode|=DMFE_AUTO; in dmfe_set_phyxcer()
1721 dmfe_phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id); in dmfe_set_phyxcer()
1724 if ( db->chip_type && (db->chip_id == PCI_DM9102_ID) ) in dmfe_set_phyxcer()
1725 dmfe_phy_write(db->ioaddr, db->phy_addr, 0, 0x1800, db->chip_id); in dmfe_set_phyxcer()
1726 if ( !db->chip_type ) in dmfe_set_phyxcer()
1727 dmfe_phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id); in dmfe_set_phyxcer()
1738 static void dmfe_process_mode(struct dmfe_board_info *db) in dmfe_process_mode() argument
1743 if (db->op_mode & 0x4) in dmfe_process_mode()
1744 db->cr6_data |= CR6_FDM; /* Set Full Duplex Bit */ in dmfe_process_mode()
1746 db->cr6_data &= ~CR6_FDM; /* Clear Full Duplex Bit */ in dmfe_process_mode()
1749 if (db->op_mode & 0x10) /* 1M HomePNA */ in dmfe_process_mode()
1750 db->cr6_data |= 0x40000;/* External MII select */ in dmfe_process_mode()
1752 db->cr6_data &= ~0x40000;/* Internal 10/100 transciver */ in dmfe_process_mode()
1754 update_cr6(db->cr6_data, db->ioaddr); in dmfe_process_mode()
1757 if ( !(db->media_mode & 0x18)) { in dmfe_process_mode()
1759 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 6, db->chip_id); in dmfe_process_mode()
1763 switch(db->op_mode) { in dmfe_process_mode()
1769 dmfe_phy_write(db->ioaddr, in dmfe_process_mode()
1770 db->phy_addr, 0, phy_reg, db->chip_id); in dmfe_process_mode()
1771 if ( db->chip_type && (db->chip_id == PCI_DM9102_ID) ) in dmfe_process_mode()
1773 dmfe_phy_write(db->ioaddr, in dmfe_process_mode()
1774 db->phy_addr, 0, phy_reg, db->chip_id); in dmfe_process_mode()
1916 static void dmfe_parse_srom(struct dmfe_board_info * db) in dmfe_parse_srom() argument
1918 char * srom = db->srom; in dmfe_parse_srom()
1924 db->cr15_data = CR15_DEFAULT; in dmfe_parse_srom()
1930 db->NIC_capability = le16_to_cpup((__le16 *) (srom + 34)); in dmfe_parse_srom()
1931 db->PHY_reg4 = 0; in dmfe_parse_srom()
1933 switch( db->NIC_capability & tmp_reg ) { in dmfe_parse_srom()
1934 case 0x1: db->PHY_reg4 |= 0x0020; break; in dmfe_parse_srom()
1935 case 0x2: db->PHY_reg4 |= 0x0040; break; in dmfe_parse_srom()
1936 case 0x4: db->PHY_reg4 |= 0x0080; break; in dmfe_parse_srom()
1937 case 0x8: db->PHY_reg4 |= 0x0100; break; in dmfe_parse_srom()
1955 db->cr15_data |= 0x40; in dmfe_parse_srom()
1959 db->cr15_data |= 0x400; in dmfe_parse_srom()
1963 db->cr15_data |= 0x9800; in dmfe_parse_srom()
1967 db->HPNA_command = 1; in dmfe_parse_srom()
1971 db->HPNA_command |= 0x8000; in dmfe_parse_srom()
1976 case 0: db->HPNA_command |= 0x0904; break; in dmfe_parse_srom()
1977 case 1: db->HPNA_command |= 0x0a00; break; in dmfe_parse_srom()
1978 case 2: db->HPNA_command |= 0x0506; break; in dmfe_parse_srom()
1979 case 3: db->HPNA_command |= 0x0602; break; in dmfe_parse_srom()
1983 case 0: db->HPNA_command |= 0x0004; break; in dmfe_parse_srom()
1984 case 1: db->HPNA_command |= 0x0000; break; in dmfe_parse_srom()
1985 case 2: db->HPNA_command |= 0x0006; break; in dmfe_parse_srom()
1986 case 3: db->HPNA_command |= 0x0002; break; in dmfe_parse_srom()
1990 db->HPNA_present = 0; in dmfe_parse_srom()
1991 update_cr6(db->cr6_data | 0x40000, db->ioaddr); in dmfe_parse_srom()
1992 tmp_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 3, db->chip_id); in dmfe_parse_srom()
1995 db->HPNA_timer = 8; in dmfe_parse_srom()
1996 if ( dmfe_phy_read(db->ioaddr, db->phy_addr, 31, db->chip_id) == 0x4404) { in dmfe_parse_srom()
1998 db->HPNA_present = 1; in dmfe_parse_srom()
1999 dmfe_program_DM9801(db, tmp_reg); in dmfe_parse_srom()
2002 db->HPNA_present = 2; in dmfe_parse_srom()
2003 dmfe_program_DM9802(db); in dmfe_parse_srom()
2014 static void dmfe_program_DM9801(struct dmfe_board_info * db, int HPNA_rev) in dmfe_program_DM9801() argument
2021 db->HPNA_command |= 0x1000; in dmfe_program_DM9801()
2022 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 24, db->chip_id); in dmfe_program_DM9801()
2024 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2027 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9801()
2029 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2035 db->HPNA_command |= 0x1000; in dmfe_program_DM9801()
2036 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9801()
2038 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2042 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, db->chip_id); in dmfe_program_DM9801()
2043 dmfe_phy_write(db->ioaddr, db->phy_addr, 17, reg17, db->chip_id); in dmfe_program_DM9801()
2044 dmfe_phy_write(db->ioaddr, db->phy_addr, 25, reg25, db->chip_id); in dmfe_program_DM9801()
2052 static void dmfe_program_DM9802(struct dmfe_board_info * db) in dmfe_program_DM9802() argument
2057 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, db->chip_id); in dmfe_program_DM9802()
2058 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9802()
2060 dmfe_phy_write(db->ioaddr, db->phy_addr, 25, phy_reg, db->chip_id); in dmfe_program_DM9802()
2069 static void dmfe_HPNA_remote_cmd_chk(struct dmfe_board_info * db) in dmfe_HPNA_remote_cmd_chk() argument
2074 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id) & 0x60; in dmfe_HPNA_remote_cmd_chk()
2083 if ( phy_reg != (db->HPNA_command & 0x0f00) ) { in dmfe_HPNA_remote_cmd_chk()
2084 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, in dmfe_HPNA_remote_cmd_chk()
2085 db->chip_id); in dmfe_HPNA_remote_cmd_chk()
2086 db->HPNA_timer=8; in dmfe_HPNA_remote_cmd_chk()
2088 db->HPNA_timer=600; /* Match, every 10 minutes, check */ in dmfe_HPNA_remote_cmd_chk()
2107 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_suspend() local
2108 void __iomem *ioaddr = db->ioaddr; in dmfe_suspend()
2115 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); in dmfe_suspend()
2116 update_cr6(db->cr6_data, ioaddr); in dmfe_suspend()
2123 dmfe_free_rxbuffer(db); in dmfe_suspend()
2129 if (db->wol_mode & WAKE_PHY) in dmfe_suspend()
2131 if (db->wol_mode & WAKE_MAGIC) in dmfe_suspend()