Lines Matching full:db
240 static void phy_write_1bit(struct uli526x_board_info *db, u32);
241 static u16 phy_read_1bit(struct uli526x_board_info *db);
253 static void srom_clk_write(struct uli526x_board_info *db, u32 data) in srom_clk_write() argument
255 void __iomem *ioaddr = db->ioaddr; in srom_clk_write()
286 struct uli526x_board_info *db; /* board information structure */ in uli526x_init_one() local
297 dev = alloc_etherdev(sizeof(*db)); in uli526x_init_one()
332 db = netdev_priv(dev); in uli526x_init_one()
337 …db->desc_pool_ptr = pci_alloc_consistent(pdev, sizeof(struct tx_desc) * DESC_ALL_CNT + 0x20, &db->… in uli526x_init_one()
338 if (!db->desc_pool_ptr) in uli526x_init_one()
341 …db->buf_pool_ptr = pci_alloc_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4, &db->buf_pool_dma_pt… in uli526x_init_one()
342 if (!db->buf_pool_ptr) in uli526x_init_one()
345 db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr; in uli526x_init_one()
346 db->first_tx_desc_dma = db->desc_pool_dma_ptr; in uli526x_init_one()
347 db->buf_pool_start = db->buf_pool_ptr; in uli526x_init_one()
348 db->buf_pool_dma_start = db->buf_pool_dma_ptr; in uli526x_init_one()
352 db->phy.write = phy_writeby_cr10; in uli526x_init_one()
353 db->phy.read = phy_readby_cr10; in uli526x_init_one()
356 db->phy.write = phy_writeby_cr9; in uli526x_init_one()
357 db->phy.read = phy_readby_cr9; in uli526x_init_one()
366 db->ioaddr = ioaddr; in uli526x_init_one()
367 db->pdev = pdev; in uli526x_init_one()
368 db->init = 1; in uli526x_init_one()
376 spin_lock_init(&db->lock); in uli526x_init_one()
381 ((__le16 *) db->srom)[i] = cpu_to_le16(read_srom_word(db, i)); in uli526x_init_one()
384 …if(((u16 *) db->srom)[0] == 0xffff || ((u16 *) db->srom)[0] == 0) /* SROM absent, so read MAC add… in uli526x_init_one()
404 dev->dev_addr[i] = db->srom[20 + i]; in uli526x_init_one()
419 pci_iounmap(pdev, db->ioaddr); in uli526x_init_one()
422 db->buf_pool_ptr, db->buf_pool_dma_ptr); in uli526x_init_one()
425 db->desc_pool_ptr, db->desc_pool_dma_ptr); in uli526x_init_one()
440 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_remove_one() local
443 pci_iounmap(pdev, db->ioaddr); in uli526x_remove_one()
444 pci_free_consistent(db->pdev, sizeof(struct tx_desc) * in uli526x_remove_one()
445 DESC_ALL_CNT + 0x20, db->desc_pool_ptr, in uli526x_remove_one()
446 db->desc_pool_dma_ptr); in uli526x_remove_one()
447 pci_free_consistent(db->pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4, in uli526x_remove_one()
448 db->buf_pool_ptr, db->buf_pool_dma_ptr); in uli526x_remove_one()
463 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_open() local
468 db->cr6_data = CR6_DEFAULT | uli526x_cr6_user_set; in uli526x_open()
469 db->tx_packet_cnt = 0; in uli526x_open()
470 db->rx_avail_cnt = 0; in uli526x_open()
471 db->link_failed = 1; in uli526x_open()
473 db->wait_reset = 0; in uli526x_open()
475 db->NIC_capability = 0xf; /* All capability*/ in uli526x_open()
476 db->PHY_reg4 = 0x1e0; in uli526x_open()
479 db->cr6_data |= ULI526X_TXTH_256; in uli526x_open()
480 db->cr0_data = CR0_DEFAULT; in uli526x_open()
485 ret = request_irq(db->pdev->irq, uli526x_interrupt, IRQF_SHARED, in uli526x_open()
494 timer_setup(&db->timer, uli526x_timer, 0); in uli526x_open()
495 db->timer.expires = ULI526X_TIMER_WUT + HZ * 2; in uli526x_open()
496 add_timer(&db->timer); in uli526x_open()
511 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_init() local
512 struct uli_phy_ops *phy = &db->phy; in uli526x_init()
513 void __iomem *ioaddr = db->ioaddr; in uli526x_init()
524 uw32(DCR0, db->cr0_data); in uli526x_init()
528 db->phy_addr = 1; in uli526x_init()
532 phy_value = phy->read(db, phy_tmp, 3); //peer add in uli526x_init()
534 db->phy_addr = phy_tmp; in uli526x_init()
542 db->media_mode = uli526x_media_mode; in uli526x_init()
545 phy_reg_reset = phy->read(db, db->phy_addr, 0); in uli526x_init()
547 phy->write(db, db->phy_addr, 0, phy_reg_reset); in uli526x_init()
554 while (timeout-- && phy->read(db, db->phy_addr, 0) & 0x8000) in uli526x_init()
558 uli526x_set_phyxcer(db); in uli526x_init()
561 if ( !(db->media_mode & ULI526X_AUTO) ) in uli526x_init()
562 db->op_mode = db->media_mode; /* Force Mode */ in uli526x_init()
568 update_cr6(db->cr6_data, ioaddr); in uli526x_init()
574 db->cr7_data = CR7_DEFAULT; in uli526x_init()
575 uw32(DCR7, db->cr7_data); in uli526x_init()
578 uw32(DCR15, db->cr15_data); in uli526x_init()
581 db->cr6_data |= CR6_RXSC | CR6_TXSC; in uli526x_init()
582 update_cr6(db->cr6_data, ioaddr); in uli526x_init()
594 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_start_xmit() local
595 void __iomem *ioaddr = db->ioaddr; in uli526x_start_xmit()
611 spin_lock_irqsave(&db->lock, flags); in uli526x_start_xmit()
614 if (db->tx_packet_cnt >= TX_FREE_DESC_CNT) { in uli526x_start_xmit()
615 spin_unlock_irqrestore(&db->lock, flags); in uli526x_start_xmit()
616 netdev_err(dev, "No Tx resource %ld\n", db->tx_packet_cnt); in uli526x_start_xmit()
624 txptr = db->tx_insert_ptr; in uli526x_start_xmit()
629 db->tx_insert_ptr = txptr->next_tx_desc; in uli526x_start_xmit()
632 if (db->tx_packet_cnt < TX_DESC_CNT) { in uli526x_start_xmit()
634 db->tx_packet_cnt++; /* Ready to send */ in uli526x_start_xmit()
640 if ( db->tx_packet_cnt < TX_FREE_DESC_CNT ) in uli526x_start_xmit()
644 spin_unlock_irqrestore(&db->lock, flags); in uli526x_start_xmit()
645 uw32(DCR7, db->cr7_data); in uli526x_start_xmit()
661 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_stop() local
662 void __iomem *ioaddr = db->ioaddr; in uli526x_stop()
668 del_timer_sync(&db->timer); in uli526x_stop()
673 db->phy.write(db, db->phy_addr, 0, 0x8000); in uli526x_stop()
676 free_irq(db->pdev->irq, dev); in uli526x_stop()
679 uli526x_free_rxbuffer(db); in uli526x_stop()
693 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_interrupt() local
694 void __iomem *ioaddr = db->ioaddr; in uli526x_interrupt()
697 spin_lock_irqsave(&db->lock, flags); in uli526x_interrupt()
701 db->cr5_data = ur32(DCR5); in uli526x_interrupt()
702 uw32(DCR5, db->cr5_data); in uli526x_interrupt()
703 if ( !(db->cr5_data & 0x180c1) ) { in uli526x_interrupt()
705 uw32(DCR7, db->cr7_data); in uli526x_interrupt()
706 spin_unlock_irqrestore(&db->lock, flags); in uli526x_interrupt()
711 if (db->cr5_data & 0x2000) { in uli526x_interrupt()
713 ULI526X_DBUG(1, "System bus error happen. CR5=", db->cr5_data); in uli526x_interrupt()
714 db->reset_fatal++; in uli526x_interrupt()
715 db->wait_reset = 1; /* Need to RESET */ in uli526x_interrupt()
716 spin_unlock_irqrestore(&db->lock, flags); in uli526x_interrupt()
721 if ( (db->cr5_data & 0x40) && db->rx_avail_cnt ) in uli526x_interrupt()
722 uli526x_rx_packet(dev, db); in uli526x_interrupt()
725 if (db->rx_avail_cnt<RX_DESC_CNT) in uli526x_interrupt()
729 if ( db->cr5_data & 0x01) in uli526x_interrupt()
730 uli526x_free_tx_pkt(dev, db); in uli526x_interrupt()
733 uw32(DCR7, db->cr7_data); in uli526x_interrupt()
735 spin_unlock_irqrestore(&db->lock, flags); in uli526x_interrupt()
742 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_poll() local
745 uli526x_interrupt(db->pdev->irq, dev); in uli526x_poll()
754 struct uli526x_board_info * db) in uli526x_free_tx_pkt() argument
759 txptr = db->tx_remove_ptr; in uli526x_free_tx_pkt()
760 while(db->tx_packet_cnt) { in uli526x_free_tx_pkt()
766 db->tx_packet_cnt--; in uli526x_free_tx_pkt()
776 db->tx_fifo_underrun++; in uli526x_free_tx_pkt()
777 if ( !(db->cr6_data & CR6_SFT) ) { in uli526x_free_tx_pkt()
778 db->cr6_data = db->cr6_data | CR6_SFT; in uli526x_free_tx_pkt()
779 update_cr6(db->cr6_data, db->ioaddr); in uli526x_free_tx_pkt()
783 db->tx_excessive_collision++; in uli526x_free_tx_pkt()
785 db->tx_late_collision++; in uli526x_free_tx_pkt()
787 db->tx_no_carrier++; in uli526x_free_tx_pkt()
789 db->tx_loss_carrier++; in uli526x_free_tx_pkt()
791 db->tx_jabber_timeout++; in uli526x_free_tx_pkt()
799 db->tx_remove_ptr = txptr; in uli526x_free_tx_pkt()
802 if ( db->tx_packet_cnt < TX_WAKE_DESC_CNT ) in uli526x_free_tx_pkt()
811 static void uli526x_rx_packet(struct net_device *dev, struct uli526x_board_info * db) in uli526x_rx_packet() argument
818 rxptr = db->rx_ready_ptr; in uli526x_rx_packet()
820 while(db->rx_avail_cnt) { in uli526x_rx_packet()
827 db->rx_avail_cnt--; in uli526x_rx_packet()
828 db->interval_rx_cnt++; in uli526x_rx_packet()
830 pci_unmap_single(db->pdev, le32_to_cpu(rxptr->rdes2), RX_ALLOC_SIZE, PCI_DMA_FROMDEVICE); in uli526x_rx_packet()
835 uli526x_reuse_skb(db, rxptr->rx_skb_ptr); in uli526x_rx_packet()
853 ((db->cr6_data & CR6_PM) && (rxlen>6)) ) { in uli526x_rx_packet()
868 uli526x_reuse_skb(db, rxptr->rx_skb_ptr); in uli526x_rx_packet()
880 uli526x_reuse_skb(db, rxptr->rx_skb_ptr); in uli526x_rx_packet()
887 db->rx_ready_ptr = rxptr; in uli526x_rx_packet()
897 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_set_filter_mode() local
901 spin_lock_irqsave(&db->lock, flags); in uli526x_set_filter_mode()
905 db->cr6_data |= CR6_PM | CR6_PBF; in uli526x_set_filter_mode()
906 update_cr6(db->cr6_data, db->ioaddr); in uli526x_set_filter_mode()
907 spin_unlock_irqrestore(&db->lock, flags); in uli526x_set_filter_mode()
915 db->cr6_data &= ~(CR6_PM | CR6_PBF); in uli526x_set_filter_mode()
916 db->cr6_data |= CR6_PAM; in uli526x_set_filter_mode()
917 spin_unlock_irqrestore(&db->lock, flags); in uli526x_set_filter_mode()
923 spin_unlock_irqrestore(&db->lock, flags); in uli526x_set_filter_mode()
927 ULi_ethtool_get_link_ksettings(struct uli526x_board_info *db, in ULi_ethtool_get_link_ksettings() argument
952 cmd->base.phy_address = db->phy_addr; in ULi_ethtool_get_link_ksettings()
957 if(db->op_mode==ULI526X_100MHF || db->op_mode==ULI526X_100MFD) in ULi_ethtool_get_link_ksettings()
961 if(db->op_mode==ULI526X_10MFD || db->op_mode==ULI526X_100MFD) in ULi_ethtool_get_link_ksettings()
965 if(db->link_failed) in ULi_ethtool_get_link_ksettings()
971 if (db->media_mode & ULI526X_AUTO) in ULi_ethtool_get_link_ksettings()
1026 struct uli526x_board_info *db = from_timer(db, t, timer); in uli526x_timer() local
1027 struct net_device *dev = pci_get_drvdata(db->pdev); in uli526x_timer()
1028 struct uli_phy_ops *phy = &db->phy; in uli526x_timer()
1029 void __iomem *ioaddr = db->ioaddr; in uli526x_timer()
1035 spin_lock_irqsave(&db->lock, flags); in uli526x_timer()
1040 if ( (db->interval_rx_cnt==0) && (tmp_cr8) ) { in uli526x_timer()
1041 db->reset_cr8++; in uli526x_timer()
1042 db->wait_reset = 1; in uli526x_timer()
1044 db->interval_rx_cnt = 0; in uli526x_timer()
1047 if ( db->tx_packet_cnt && in uli526x_timer()
1053 db->reset_TXtimeout++; in uli526x_timer()
1054 db->wait_reset = 1; in uli526x_timer()
1059 if (db->wait_reset) { in uli526x_timer()
1060 ULI526X_DBUG(0, "Dynamic Reset device", db->tx_packet_cnt); in uli526x_timer()
1061 db->reset_count++; in uli526x_timer()
1063 db->timer.expires = ULI526X_TIMER_WUT; in uli526x_timer()
1064 add_timer(&db->timer); in uli526x_timer()
1065 spin_unlock_irqrestore(&db->lock, flags); in uli526x_timer()
1070 if ((phy->read(db, db->phy_addr, 5) & 0x01e0)!=0) in uli526x_timer()
1073 if ( !(tmp_cr12 & 0x3) && !db->link_failed ) { in uli526x_timer()
1078 db->link_failed = 1; in uli526x_timer()
1082 if ( !(db->media_mode & 0x8) ) in uli526x_timer()
1083 phy->write(db, db->phy_addr, 0, 0x1000); in uli526x_timer()
1086 if (db->media_mode & ULI526X_AUTO) { in uli526x_timer()
1087 db->cr6_data&=~0x00000200; /* bit9=0, HD mode */ in uli526x_timer()
1088 update_cr6(db->cr6_data, db->ioaddr); in uli526x_timer()
1091 if ((tmp_cr12 & 0x3) && db->link_failed) { in uli526x_timer()
1093 db->link_failed = 0; in uli526x_timer()
1096 if ( (db->media_mode & ULI526X_AUTO) && in uli526x_timer()
1097 uli526x_sense_speed(db) ) in uli526x_timer()
1098 db->link_failed = 1; in uli526x_timer()
1099 uli526x_process_mode(db); in uli526x_timer()
1101 if(db->link_failed==0) in uli526x_timer()
1104 (db->op_mode == ULI526X_100MHF || in uli526x_timer()
1105 db->op_mode == ULI526X_100MFD) in uli526x_timer()
1107 (db->op_mode == ULI526X_10MFD || in uli526x_timer()
1108 db->op_mode == ULI526X_100MFD) in uli526x_timer()
1112 /* SHOW_MEDIA_TYPE(db->op_mode); */ in uli526x_timer()
1114 else if(!(tmp_cr12 & 0x3) && db->link_failed) in uli526x_timer()
1116 if(db->init==1) in uli526x_timer()
1122 db->init = 0; in uli526x_timer()
1125 db->timer.expires = ULI526X_TIMER_WUT; in uli526x_timer()
1126 add_timer(&db->timer); in uli526x_timer()
1127 spin_unlock_irqrestore(&db->lock, flags); in uli526x_timer()
1139 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_reset_prepare() local
1140 void __iomem *ioaddr = db->ioaddr; in uli526x_reset_prepare()
1143 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */ in uli526x_reset_prepare()
1144 update_cr6(db->cr6_data, ioaddr); in uli526x_reset_prepare()
1152 uli526x_free_rxbuffer(db); in uli526x_reset_prepare()
1155 db->tx_packet_cnt = 0; in uli526x_reset_prepare()
1156 db->rx_avail_cnt = 0; in uli526x_reset_prepare()
1157 db->link_failed = 1; in uli526x_reset_prepare()
1158 db->init=1; in uli526x_reset_prepare()
1159 db->wait_reset = 0; in uli526x_reset_prepare()
1264 static void uli526x_free_rxbuffer(struct uli526x_board_info * db) in uli526x_free_rxbuffer() argument
1269 while (db->rx_avail_cnt) { in uli526x_free_rxbuffer()
1270 dev_kfree_skb(db->rx_ready_ptr->rx_skb_ptr); in uli526x_free_rxbuffer()
1271 db->rx_ready_ptr = db->rx_ready_ptr->next_rx_desc; in uli526x_free_rxbuffer()
1272 db->rx_avail_cnt--; in uli526x_free_rxbuffer()
1281 static void uli526x_reuse_skb(struct uli526x_board_info *db, struct sk_buff * skb) in uli526x_reuse_skb() argument
1283 struct rx_desc *rxptr = db->rx_insert_ptr; in uli526x_reuse_skb()
1287 rxptr->rdes2 = cpu_to_le32(pci_map_single(db->pdev, in uli526x_reuse_skb()
1293 db->rx_avail_cnt++; in uli526x_reuse_skb()
1294 db->rx_insert_ptr = rxptr->next_rx_desc; in uli526x_reuse_skb()
1296 ULI526X_DBUG(0, "SK Buffer reuse method error", db->rx_avail_cnt); in uli526x_reuse_skb()
1307 struct uli526x_board_info *db = netdev_priv(dev); in uli526x_descriptor_init() local
1318 db->tx_insert_ptr = db->first_tx_desc; in uli526x_descriptor_init()
1319 db->tx_remove_ptr = db->first_tx_desc; in uli526x_descriptor_init()
1320 uw32(DCR4, db->first_tx_desc_dma); /* TX DESC address */ in uli526x_descriptor_init()
1323 db->first_rx_desc = (void *)db->first_tx_desc + sizeof(struct tx_desc) * TX_DESC_CNT; in uli526x_descriptor_init()
1324 db->first_rx_desc_dma = db->first_tx_desc_dma + sizeof(struct tx_desc) * TX_DESC_CNT; in uli526x_descriptor_init()
1325 db->rx_insert_ptr = db->first_rx_desc; in uli526x_descriptor_init()
1326 db->rx_ready_ptr = db->first_rx_desc; in uli526x_descriptor_init()
1327 uw32(DCR3, db->first_rx_desc_dma); /* RX DESC address */ in uli526x_descriptor_init()
1330 tmp_buf = db->buf_pool_start; in uli526x_descriptor_init()
1331 tmp_buf_dma = db->buf_pool_dma_start; in uli526x_descriptor_init()
1332 tmp_tx_dma = db->first_tx_desc_dma; in uli526x_descriptor_init()
1333 for (tmp_tx = db->first_tx_desc, i = 0; i < TX_DESC_CNT; i++, tmp_tx++) { in uli526x_descriptor_init()
1344 (--tmp_tx)->tdes3 = cpu_to_le32(db->first_tx_desc_dma); in uli526x_descriptor_init()
1345 tmp_tx->next_tx_desc = db->first_tx_desc; in uli526x_descriptor_init()
1348 tmp_rx_dma=db->first_rx_desc_dma; in uli526x_descriptor_init()
1349 for (tmp_rx = db->first_rx_desc, i = 0; i < RX_DESC_CNT; i++, tmp_rx++) { in uli526x_descriptor_init()
1356 (--tmp_rx)->rdes3 = cpu_to_le32(db->first_rx_desc_dma); in uli526x_descriptor_init()
1357 tmp_rx->next_rx_desc = db->first_rx_desc; in uli526x_descriptor_init()
1388 struct uli526x_board_info *db = netdev_priv(dev); in send_filter_frame() local
1389 void __iomem *ioaddr = db->ioaddr; in send_filter_frame()
1398 txptr = db->tx_insert_ptr; in send_filter_frame()
1427 db->tx_insert_ptr = txptr->next_tx_desc; in send_filter_frame()
1431 if (db->tx_packet_cnt < TX_DESC_CNT) { in send_filter_frame()
1433 db->tx_packet_cnt++; in send_filter_frame()
1435 update_cr6(db->cr6_data | 0x2000, ioaddr); in send_filter_frame()
1437 update_cr6(db->cr6_data, ioaddr); in send_filter_frame()
1451 struct uli526x_board_info *db = netdev_priv(dev); in allocate_rx_buffer() local
1455 rxptr = db->rx_insert_ptr; in allocate_rx_buffer()
1457 while(db->rx_avail_cnt < RX_DESC_CNT) { in allocate_rx_buffer()
1462 rxptr->rdes2 = cpu_to_le32(pci_map_single(db->pdev, in allocate_rx_buffer()
1469 db->rx_avail_cnt++; in allocate_rx_buffer()
1472 db->rx_insert_ptr = rxptr; in allocate_rx_buffer()
1480 static u16 read_srom_word(struct uli526x_board_info *db, int offset) in read_srom_word() argument
1482 void __iomem *ioaddr = db->ioaddr; in read_srom_word()
1490 srom_clk_write(db, SROM_DATA_1); in read_srom_word()
1491 srom_clk_write(db, SROM_DATA_1); in read_srom_word()
1492 srom_clk_write(db, SROM_DATA_0); in read_srom_word()
1497 srom_clk_write(db, srom_data); in read_srom_word()
1520 static u8 uli526x_sense_speed(struct uli526x_board_info * db) in uli526x_sense_speed() argument
1522 struct uli_phy_ops *phy = &db->phy; in uli526x_sense_speed()
1526 phy_mode = phy->read(db, db->phy_addr, 1); in uli526x_sense_speed()
1527 phy_mode = phy->read(db, db->phy_addr, 1); in uli526x_sense_speed()
1531 phy_mode = ((phy->read(db, db->phy_addr, 5) & 0x01e0)<<7); in uli526x_sense_speed()
1542 case 0x1000: db->op_mode = ULI526X_10MHF; break; in uli526x_sense_speed()
1543 case 0x2000: db->op_mode = ULI526X_10MFD; break; in uli526x_sense_speed()
1544 case 0x4000: db->op_mode = ULI526X_100MHF; break; in uli526x_sense_speed()
1545 case 0x8000: db->op_mode = ULI526X_100MFD; break; in uli526x_sense_speed()
1546 default: db->op_mode = ULI526X_10MHF; ErrFlag = 1; break; in uli526x_sense_speed()
1549 db->op_mode = ULI526X_10MHF; in uli526x_sense_speed()
1564 static void uli526x_set_phyxcer(struct uli526x_board_info *db) in uli526x_set_phyxcer() argument
1566 struct uli_phy_ops *phy = &db->phy; in uli526x_set_phyxcer()
1570 phy_reg = phy->read(db, db->phy_addr, 4) & ~0x01e0; in uli526x_set_phyxcer()
1572 if (db->media_mode & ULI526X_AUTO) { in uli526x_set_phyxcer()
1574 phy_reg |= db->PHY_reg4; in uli526x_set_phyxcer()
1577 switch(db->media_mode) { in uli526x_set_phyxcer()
1588 phy_reg|=db->PHY_reg4; in uli526x_set_phyxcer()
1589 db->media_mode|=ULI526X_AUTO; in uli526x_set_phyxcer()
1591 phy->write(db, db->phy_addr, 4, phy_reg); in uli526x_set_phyxcer()
1594 phy->write(db, db->phy_addr, 0, 0x1200); in uli526x_set_phyxcer()
1606 static void uli526x_process_mode(struct uli526x_board_info *db) in uli526x_process_mode() argument
1608 struct uli_phy_ops *phy = &db->phy; in uli526x_process_mode()
1612 if (db->op_mode & 0x4) in uli526x_process_mode()
1613 db->cr6_data |= CR6_FDM; /* Set Full Duplex Bit */ in uli526x_process_mode()
1615 db->cr6_data &= ~CR6_FDM; /* Clear Full Duplex Bit */ in uli526x_process_mode()
1617 update_cr6(db->cr6_data, db->ioaddr); in uli526x_process_mode()
1620 if (!(db->media_mode & 0x8)) { in uli526x_process_mode()
1622 phy_reg = phy->read(db, db->phy_addr, 6); in uli526x_process_mode()
1626 switch(db->op_mode) { in uli526x_process_mode()
1632 phy->write(db, db->phy_addr, 0, phy_reg); in uli526x_process_mode()
1639 static void phy_writeby_cr9(struct uli526x_board_info *db, u8 phy_addr, in phy_writeby_cr9() argument
1646 phy_write_1bit(db, PHY_DATA_1); in phy_writeby_cr9()
1649 phy_write_1bit(db, PHY_DATA_0); in phy_writeby_cr9()
1650 phy_write_1bit(db, PHY_DATA_1); in phy_writeby_cr9()
1653 phy_write_1bit(db, PHY_DATA_0); in phy_writeby_cr9()
1654 phy_write_1bit(db, PHY_DATA_1); in phy_writeby_cr9()
1658 phy_write_1bit(db, phy_addr & i ? PHY_DATA_1 : PHY_DATA_0); in phy_writeby_cr9()
1662 phy_write_1bit(db, offset & i ? PHY_DATA_1 : PHY_DATA_0); in phy_writeby_cr9()
1665 phy_write_1bit(db, PHY_DATA_1); in phy_writeby_cr9()
1666 phy_write_1bit(db, PHY_DATA_0); in phy_writeby_cr9()
1670 phy_write_1bit(db, phy_data & i ? PHY_DATA_1 : PHY_DATA_0); in phy_writeby_cr9()
1673 static u16 phy_readby_cr9(struct uli526x_board_info *db, u8 phy_addr, u8 offset) in phy_readby_cr9() argument
1680 phy_write_1bit(db, PHY_DATA_1); in phy_readby_cr9()
1683 phy_write_1bit(db, PHY_DATA_0); in phy_readby_cr9()
1684 phy_write_1bit(db, PHY_DATA_1); in phy_readby_cr9()
1687 phy_write_1bit(db, PHY_DATA_1); in phy_readby_cr9()
1688 phy_write_1bit(db, PHY_DATA_0); in phy_readby_cr9()
1692 phy_write_1bit(db, phy_addr & i ? PHY_DATA_1 : PHY_DATA_0); in phy_readby_cr9()
1696 phy_write_1bit(db, offset & i ? PHY_DATA_1 : PHY_DATA_0); in phy_readby_cr9()
1699 phy_read_1bit(db); in phy_readby_cr9()
1704 phy_data |= phy_read_1bit(db); in phy_readby_cr9()
1710 static u16 phy_readby_cr10(struct uli526x_board_info *db, u8 phy_addr, in phy_readby_cr10() argument
1713 void __iomem *ioaddr = db->ioaddr; in phy_readby_cr10()
1728 static void phy_writeby_cr10(struct uli526x_board_info *db, u8 phy_addr, in phy_writeby_cr10() argument
1731 void __iomem *ioaddr = db->ioaddr; in phy_writeby_cr10()
1743 static void phy_write_1bit(struct uli526x_board_info *db, u32 data) in phy_write_1bit() argument
1745 void __iomem *ioaddr = db->ioaddr; in phy_write_1bit()
1760 static u16 phy_read_1bit(struct uli526x_board_info *db) in phy_read_1bit() argument
1762 void __iomem *ioaddr = db->ioaddr; in phy_read_1bit()