Lines Matching +full:0 +full:x1f
72 #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
92 RTL_GIGA_MAC_VER_01 = 0,
143 RTL_GIGA_MAC_NONE = 0xff,
212 RTL_CFG_0 = 0x00,
218 { PCI_VDEVICE(REALTEK, 0x2502), RTL_CFG_1 },
219 { PCI_VDEVICE(REALTEK, 0x2600), RTL_CFG_1 },
220 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8129), 0, 0, RTL_CFG_0 },
221 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8136), 0, 0, RTL_CFG_2 },
222 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8161), 0, 0, RTL_CFG_1 },
223 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8167), 0, 0, RTL_CFG_0 },
224 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168), 0, 0, RTL_CFG_1 },
225 { PCI_DEVICE(PCI_VENDOR_ID_NCUBE, 0x8168), 0, 0, RTL_CFG_1 },
226 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), 0, 0, RTL_CFG_0 },
227 { PCI_VENDOR_ID_DLINK, 0x4300,
228 PCI_VENDOR_ID_DLINK, 0x4b10, 0, 0, RTL_CFG_1 },
229 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4300), 0, 0, RTL_CFG_0 },
230 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4302), 0, 0, RTL_CFG_0 },
231 { PCI_DEVICE(PCI_VENDOR_ID_AT, 0xc107), 0, 0, RTL_CFG_0 },
232 { PCI_DEVICE(PCI_VENDOR_ID_USR, 0x0116), 0, 0, RTL_CFG_0 },
233 { PCI_VENDOR_ID_LINKSYS, 0x1032,
234 PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 },
235 { 0x0001, 0x8168,
236 PCI_ANY_ID, 0x2410, 0, 0, RTL_CFG_2 },
237 {0,},
248 MAC0 = 0, /* Ethernet hardware address. */
251 CounterAddrLow = 0x10,
252 CounterAddrHigh = 0x14,
253 TxDescStartAddrLow = 0x20,
254 TxDescStartAddrHigh = 0x24,
255 TxHDescStartAddrLow = 0x28,
256 TxHDescStartAddrHigh = 0x2c,
257 FLASH = 0x30,
258 ERSR = 0x36,
259 ChipCmd = 0x37,
260 TxPoll = 0x38,
261 IntrMask = 0x3c,
262 IntrStatus = 0x3e,
264 TxConfig = 0x40,
268 RxConfig = 0x44,
279 RxMissed = 0x4c,
280 Cfg9346 = 0x50,
281 Config0 = 0x51,
282 Config1 = 0x52,
283 Config2 = 0x53,
286 Config3 = 0x54,
287 Config4 = 0x55,
288 Config5 = 0x56,
289 MultiIntr = 0x5c,
290 PHYAR = 0x60,
291 PHYstatus = 0x6c,
292 RxMaxSize = 0xda,
293 CPlusCmd = 0xe0,
294 IntrMitigate = 0xe2,
296 #define RTL_COALESCE_MASK 0x0f
301 RxDescAddrLow = 0xe4,
302 RxDescAddrHigh = 0xe8,
303 EarlyTxThres = 0xec, /* 8169. Unit of 32 bytes. */
305 #define NoEarlyTx 0x3f /* Max value : no early transmit. */
307 MaxTxPacketSize = 0xec, /* 8101/8168. Unit of 128 bytes. */
310 #define EarlySize 0x27
312 FuncEvent = 0xf0,
313 FuncEventMask = 0xf4,
314 FuncPresetState = 0xf8,
315 IBCR0 = 0xf8,
316 IBCR2 = 0xf9,
317 IBIMR0 = 0xfa,
318 IBISR0 = 0xfb,
319 FuncForceEvent = 0xfc,
323 CSIDR = 0x64,
324 CSIAR = 0x68,
325 #define CSIAR_FLAG 0x80000000
326 #define CSIAR_WRITE_CMD 0x80000000
327 #define CSIAR_BYTE_ENABLE 0x0000f000
328 #define CSIAR_ADDR_MASK 0x00000fff
329 PMCH = 0x6f,
330 EPHYAR = 0x80,
331 #define EPHYAR_FLAG 0x80000000
332 #define EPHYAR_WRITE_CMD 0x80000000
333 #define EPHYAR_REG_MASK 0x1f
335 #define EPHYAR_DATA_MASK 0xffff
336 DLLPR = 0xd0,
339 DBG_REG = 0xd1,
342 TWSI = 0xd2,
343 MCU = 0xd3,
351 EFUSEAR = 0xdc,
352 #define EFUSEAR_FLAG 0x80000000
353 #define EFUSEAR_WRITE_CMD 0x80000000
354 #define EFUSEAR_READ_CMD 0x00000000
355 #define EFUSEAR_REG_MASK 0x03ff
357 #define EFUSEAR_DATA_MASK 0xff
358 MISC_1 = 0xf2,
363 LED_FREQ = 0x1a,
364 EEE_LED = 0x1b,
365 ERIDR = 0x70,
366 ERIAR = 0x74,
367 #define ERIAR_FLAG 0x80000000
368 #define ERIAR_WRITE_CMD 0x80000000
369 #define ERIAR_READ_CMD 0x00000000
372 #define ERIAR_EXGMAC (0x00 << ERIAR_TYPE_SHIFT)
373 #define ERIAR_MSIX (0x01 << ERIAR_TYPE_SHIFT)
374 #define ERIAR_ASF (0x02 << ERIAR_TYPE_SHIFT)
375 #define ERIAR_OOB (0x02 << ERIAR_TYPE_SHIFT)
377 #define ERIAR_MASK_0001 (0x1 << ERIAR_MASK_SHIFT)
378 #define ERIAR_MASK_0011 (0x3 << ERIAR_MASK_SHIFT)
379 #define ERIAR_MASK_0100 (0x4 << ERIAR_MASK_SHIFT)
380 #define ERIAR_MASK_0101 (0x5 << ERIAR_MASK_SHIFT)
381 #define ERIAR_MASK_1111 (0xf << ERIAR_MASK_SHIFT)
382 EPHY_RXER_NUM = 0x7c,
383 OCPDR = 0xb0, /* OCP GPHY access */
384 #define OCPDR_WRITE_CMD 0x80000000
385 #define OCPDR_READ_CMD 0x00000000
386 #define OCPDR_REG_MASK 0x7f
388 #define OCPDR_DATA_MASK 0xffff
389 OCPAR = 0xb4,
390 #define OCPAR_FLAG 0x80000000
391 #define OCPAR_GPHY_WRITE_CMD 0x8000f060
392 #define OCPAR_GPHY_READ_CMD 0x0000f060
393 GPHY_OCP = 0xb8,
394 RDSAR1 = 0xd0, /* 8168c only. Undocumented on 8168dp */
395 MISC = 0xf0, /* 8168e only. */
405 SYSErr = 0x8000,
406 PCSTimeout = 0x4000,
407 SWInt = 0x0100,
408 TxDescUnavail = 0x0080,
409 RxFIFOOver = 0x0040,
410 LinkChg = 0x0020,
411 RxOverflow = 0x0010,
412 TxErr = 0x0008,
413 TxOK = 0x0004,
414 RxErr = 0x0002,
415 RxOK = 0x0001,
426 StopReq = 0x80,
427 CmdReset = 0x10,
428 CmdRxEnb = 0x08,
429 CmdTxEnb = 0x04,
430 RxBufEmpty = 0x01,
433 HPQ = 0x80, /* Poll cmd on the high prio queue */
434 NPQ = 0x40, /* Poll cmd on the low prio queue */
435 FSWInt = 0x01, /* Forced software interrupt */
438 Cfg9346_Lock = 0x00,
439 Cfg9346_Unlock = 0xc0,
442 AcceptErr = 0x20,
443 AcceptRunt = 0x10,
444 AcceptBroadcast = 0x08,
445 AcceptMulticast = 0x04,
446 AcceptMyPhys = 0x02,
447 AcceptAllPhys = 0x01,
448 #define RX_CONFIG_ACCEPT_MASK 0x3f
452 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
461 PMEnable = (1 << 0), /* Power Management Enable */
466 PCI_Clock_66MHz = 0x01,
467 PCI_Clock_33MHz = 0x00,
474 Beacon_en = (1 << 0), /* 8168 only. Reserved in the 8168b */
485 PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */
486 ASPM_en = (1 << 0), /* ASPM enable */
498 Mac_dbgo_sel = 0x001c, // 8168
503 #define INTT_MASK GENMASK(1, 0)
504 INTT_0 = 0x0000, // 8168
505 INTT_1 = 0x0001, // 8168
506 INTT_2 = 0x0002, // 8168
507 INTT_3 = 0x0003, // 8168
510 TBI_Enable = 0x80,
511 TxFlowCtrl = 0x40,
512 RxFlowCtrl = 0x20,
513 _1000bpsF = 0x10,
514 _100bps = 0x08,
515 _10bps = 0x04,
516 LinkStatus = 0x02,
517 FullDup = 0x01,
520 TBILinkOK = 0x02000000,
523 CounterReset = 0x1,
526 CounterDump = 0x8,
544 #define TD_MSS_MAX 0x07ffu /* MSS value */
565 #define GTTCPHO_MAX 0x7fU
569 #define TCPHO_MAX 0x3ffU
580 PID0 = (1 << 17), /* Protocol ID bit 0/2 */
593 #define RsvdMask 0x3fffc000
638 RTL_FLAG_TASK_ENABLED = 0,
719 module_param(use_dac, int, 0);
721 module_param_named(debug, debug.msg_enable, int, 0);
722 MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
782 for (i = 0; i < n; i++) { in rtl_loop_wait()
832 if (reg & 0xffff0001) { in rtl_ocp_reg_failure()
857 return 0; in r8168_phy_ocp_read()
862 (RTL_R32(tp, GPHY_OCP) & 0xffff) : ~0; in r8168_phy_ocp_read()
876 return 0; in r8168_mac_ocp_read()
883 #define OCP_STD_PHY_BASE 0xa400
887 if (reg == 0x1f) { in r8168g_mdio_write()
893 reg -= 0x10; in r8168g_mdio_write()
901 reg -= 0x10; in r8168g_mdio_read()
908 if (reg == 0x1f) { in mac_mcu_write()
923 return RTL_R32(tp, PHYAR) & 0x80000000; in DECLARE_RTL_COND()
928 RTL_W32(tp, PHYAR, 0x80000000 | (reg & 0x1f) << 16 | (value & 0xffff)); in r8169_mdio_write()
942 RTL_W32(tp, PHYAR, 0x0 | (reg & 0x1f) << 16); in r8169_mdio_read()
945 RTL_R32(tp, PHYAR) & 0xffff : ~0; in r8169_mdio_read()
965 RTL_W32(tp, EPHY_RXER_NUM, 0); in r8168dp_1_mdio_access()
982 RTL_W32(tp, EPHY_RXER_NUM, 0); in r8168dp_1_mdio_read()
985 RTL_R32(tp, OCPDR) & OCPDR_DATA_MASK : ~0; in r8168dp_1_mdio_read()
988 #define R8168DP_1_MDIO_ACCESS_BIT 0x00020000
992 RTL_W32(tp, 0xd0, RTL_R32(tp, 0xd0) & ~R8168DP_1_MDIO_ACCESS_BIT); in r8168dp_2_mdio_start()
997 RTL_W32(tp, 0xd0, RTL_R32(tp, 0xd0) | R8168DP_1_MDIO_ACCESS_BIT); in r8168dp_2_mdio_stop()
1015 return 0xc912; in r8168dp_2_mdio_read()
1069 RTL_R32(tp, EPHYAR) & EPHYAR_DATA_MASK : ~0; in rtl_ephy_read()
1080 BUG_ON((addr & 3) || (mask == 0)); in rtl_eri_write()
1092 RTL_R32(tp, ERIDR) : ~0; in rtl_eri_read()
1106 RTL_W32(tp, OCPAR, ((u32)mask & 0x0f) << 12 | (reg & 0x0fff)); in r8168dp_ocp_read()
1108 RTL_R32(tp, OCPDR) : ~0; in r8168dp_ocp_read()
1129 return ~0; in ocp_read()
1137 RTL_W32(tp, OCPAR, OCPAR_FLAG | ((u32)mask & 0x0f) << 12 | (reg & 0x0fff)); in r8168dp_ocp_write()
1144 rtl_eri_write(tp, reg, ((u32)mask & 0x0f) << ERIAR_MASK_SHIFT, in r8168ep_ocp_write()
1169 rtl_eri_write(tp, 0xe8, ERIAR_MASK_0001, cmd, ERIAR_EXGMAC); in rtl8168_oob_notify()
1171 ocp_write(tp, 0x1, 0x30, 0x00000001); in rtl8168_oob_notify()
1174 #define OOB_CMD_RESET 0x00
1175 #define OOB_CMD_DRIVER_START 0x05
1176 #define OOB_CMD_DRIVER_STOP 0x06
1180 return (tp->mac_version == RTL_GIGA_MAC_VER_31) ? 0xb8 : 0x10; in rtl8168_get_ocp_reg()
1189 return ocp_read(tp, 0x0f, reg) & 0x00000800; in DECLARE_RTL_COND()
1194 return ocp_read(tp, 0x0f, 0x124) & 0x00000001; in DECLARE_RTL_COND()
1199 return RTL_R8(tp, IBISR0) & 0x20; in DECLARE_RTL_COND()
1204 RTL_W8(tp, IBCR2, RTL_R8(tp, IBCR2) & ~0x01); in rtl8168ep_stop_cmac()
1206 RTL_W8(tp, IBISR0, RTL_R8(tp, IBISR0) | 0x20); in rtl8168ep_stop_cmac()
1207 RTL_W8(tp, IBCR0, RTL_R8(tp, IBCR0) & ~0x01); in rtl8168ep_stop_cmac()
1218 ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_START); in rtl8168ep_driver_start()
1219 ocp_write(tp, 0x01, 0x30, ocp_read(tp, 0x01, 0x30) | 0x01); in rtl8168ep_driver_start()
1251 ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_STOP); in rtl8168ep_driver_stop()
1252 ocp_write(tp, 0x01, 0x30, ocp_read(tp, 0x01, 0x30) | 0x01); in rtl8168ep_driver_stop()
1279 return !!(ocp_read(tp, 0x0f, reg) & 0x00008000); in r8168dp_check_dash()
1284 return !!(ocp_read(tp, 0x0f, 0x128) & 0x00000001); in r8168ep_check_dash()
1312 while (len-- > 0) { in rtl_write_exgmac_batch()
1328 RTL_R32(tp, EFUSEAR) & EFUSEAR_DATA_MASK : ~0; in rtl8168d_efuse_read()
1344 RTL_W16(tp, IntrMask, 0); in rtl_irq_disable()
1380 rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x00000011, in rtl_link_chg_patch()
1382 rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x00000005, in rtl_link_chg_patch()
1385 rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x0000001f, in rtl_link_chg_patch()
1387 rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x00000005, in rtl_link_chg_patch()
1390 rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x0000001f, in rtl_link_chg_patch()
1392 rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x0000003f, in rtl_link_chg_patch()
1396 rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, in rtl_link_chg_patch()
1398 rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, in rtl_link_chg_patch()
1403 rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x00000011, in rtl_link_chg_patch()
1405 rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x00000005, in rtl_link_chg_patch()
1408 rtl_eri_write(tp, 0x1bc, ERIAR_MASK_1111, 0x0000001f, in rtl_link_chg_patch()
1410 rtl_eri_write(tp, 0x1dc, ERIAR_MASK_1111, 0x0000003f, in rtl_link_chg_patch()
1415 rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x4d02, in rtl_link_chg_patch()
1417 rtl_eri_write(tp, 0x1dc, ERIAR_MASK_0011, 0x0060, in rtl_link_chg_patch()
1420 rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x0000, in rtl_link_chg_patch()
1431 u32 wolopts = 0; in __rtl8169_get_wol()
1435 return 0; in __rtl8169_get_wol()
1443 if (rtl_eri_read(tp, 0xdc, ERIAR_EXGMAC) & MagicPacket_v2) in __rtl8169_get_wol()
1498 0x0dc, in __rtl8169_set_wol()
1501 0x0000, in __rtl8169_set_wol()
1505 0x0dc, in __rtl8169_set_wol()
1507 0x0000, in __rtl8169_set_wol()
1516 for (i = 0; i < tmp; i++) { in __rtl8169_set_wol()
1564 return 0; in rtl8169_set_wol()
1637 return 0; in rtl8169_set_features()
1643 TxVlanTag | swab16(skb_vlan_tag_get(skb)) : 0x00; in rtl8169_tx_vlan_tag()
1651 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), swab16(opts2 & 0xffff)); in rtl8169_rx_vlan_tag()
1663 for (i = 0; i < R8169_REGS_SIZE; i += 4) in rtl8169_get_regs()
1745 * is disabled. If 0xff chip may be in a PCI power-save state. in rtl8169_update_counters()
1747 if (!(val & CmdRxEnb) || val == 0xff) in rtl8169_update_counters()
1807 data[0] = le64_to_cpu(counters->tx_packets); in rtl8169_get_ethtool_stats()
1834 * > 1 - the availability of the IntrMitigate (0xe2) register through the
1842 * (0xe0) bit 1 and bit 0.
1845 * bit[1:0] \ speed 1000M 100M 10M
1846 * 0 0 320ns 2.56us 40.96us
1847 * 0 1 2.56us 20.48us 327.7us
1848 * 1 0 5.12us 40.96us 655.4us
1852 * bit[1:0] \ speed 1000M 100M 10M
1853 * 0 0 5us 2.56us 40.96us
1854 * 0 1 40us 20.48us 327.7us
1855 * 1 0 80us 40.96us 655.4us
1859 /* rx/tx scale factors for one particular CPlusCmd[0:1] value */
1865 /* rx/tx scale factors for all CPlusCmd[0:1] cases */
1868 struct rtl_coalesce_scale scalev[4]; /* each CPlusCmd[0:1] case */
1883 { 0 },
1891 { 0 },
1904 if (rc < 0) in rtl_coalesce_info()
1907 for (ci = tp->coalesce_info; ci->speed != 0; ci++) { in rtl_coalesce_info()
1931 memset(ec, 0, sizeof(*ec)); in rtl_get_coalesce()
1933 /* get rx/tx scale corresponding to current speed and CPlusCmd[0:1] */ in rtl_get_coalesce()
1947 for (i = 0; i < 2; i++) { in rtl_get_coalesce()
1953 * max_frames to 0. in rtl_get_coalesce()
1959 return 0; in rtl_get_coalesce()
1962 /* choose appropriate scale factor and CPlusCmd[0:1] for (speed, nsec) */
1973 for (i = 0; i < 4; i++) { in rtl_coalesce_choose_scale()
1974 u32 rxtx_maxscale = max(ci->scalev[i].nsecs[0], in rtl_coalesce_choose_scale()
1996 u16 w = 0, cp01; in rtl_set_coalesce()
2000 max(p[0].usecs, p[1].usecs) * 1000, &cp01); in rtl_set_coalesce()
2004 for (i = 0; i < 2; i++, p++) { in rtl_set_coalesce()
2009 * accept it not only when usecs=0 because of e.g. the following scenario: in rtl_set_coalesce()
2011 * - both rx_usecs=0 & rx_frames=0 in hardware (no delay on RX) in rtl_set_coalesce()
2012 * - rtl_get_coalesce returns rx_usecs=0, rx_frames=1 in rtl_set_coalesce()
2016 * settings, if we do not handle rx_usecs=!0, rx_frames=1 in rtl_set_coalesce()
2017 * we'll reject it below in `frames % 4 != 0`. in rtl_set_coalesce()
2020 p->frames = 0; in rtl_set_coalesce()
2043 return 0; in rtl_set_coalesce()
2074 * (RTL_R32(tp, TxConfig) & 0x700000) == 0x500000 ? 8168Bf : 8168Be in rtl8169_get_mac_version()
2078 * (RTL_R32(tp, TxConfig) & 0x700000) == 0x200000 ? 8101Eb : 8101Ec in rtl8169_get_mac_version()
2086 { 0x7cf00000, 0x50200000, RTL_GIGA_MAC_VER_51 }, in rtl8169_get_mac_version()
2087 { 0x7cf00000, 0x50100000, RTL_GIGA_MAC_VER_50 }, in rtl8169_get_mac_version()
2088 { 0x7cf00000, 0x50000000, RTL_GIGA_MAC_VER_49 }, in rtl8169_get_mac_version()
2091 { 0x7cf00000, 0x54100000, RTL_GIGA_MAC_VER_46 }, in rtl8169_get_mac_version()
2092 { 0x7cf00000, 0x54000000, RTL_GIGA_MAC_VER_45 }, in rtl8169_get_mac_version()
2095 { 0x7cf00000, 0x5c800000, RTL_GIGA_MAC_VER_44 }, in rtl8169_get_mac_version()
2096 { 0x7cf00000, 0x50900000, RTL_GIGA_MAC_VER_42 }, in rtl8169_get_mac_version()
2097 { 0x7cf00000, 0x4c100000, RTL_GIGA_MAC_VER_41 }, in rtl8169_get_mac_version()
2098 { 0x7cf00000, 0x4c000000, RTL_GIGA_MAC_VER_40 }, in rtl8169_get_mac_version()
2101 { 0x7c800000, 0x48800000, RTL_GIGA_MAC_VER_38 }, in rtl8169_get_mac_version()
2102 { 0x7cf00000, 0x48100000, RTL_GIGA_MAC_VER_36 }, in rtl8169_get_mac_version()
2103 { 0x7cf00000, 0x48000000, RTL_GIGA_MAC_VER_35 }, in rtl8169_get_mac_version()
2106 { 0x7c800000, 0x2c800000, RTL_GIGA_MAC_VER_34 }, in rtl8169_get_mac_version()
2107 { 0x7cf00000, 0x2c100000, RTL_GIGA_MAC_VER_32 }, in rtl8169_get_mac_version()
2108 { 0x7c800000, 0x2c000000, RTL_GIGA_MAC_VER_33 }, in rtl8169_get_mac_version()
2111 { 0x7cf00000, 0x28100000, RTL_GIGA_MAC_VER_25 }, in rtl8169_get_mac_version()
2112 { 0x7c800000, 0x28000000, RTL_GIGA_MAC_VER_26 }, in rtl8169_get_mac_version()
2115 { 0x7cf00000, 0x28800000, RTL_GIGA_MAC_VER_27 }, in rtl8169_get_mac_version()
2116 { 0x7cf00000, 0x28a00000, RTL_GIGA_MAC_VER_28 }, in rtl8169_get_mac_version()
2117 { 0x7cf00000, 0x28b00000, RTL_GIGA_MAC_VER_31 }, in rtl8169_get_mac_version()
2120 { 0x7cf00000, 0x3c900000, RTL_GIGA_MAC_VER_23 }, in rtl8169_get_mac_version()
2121 { 0x7cf00000, 0x3c800000, RTL_GIGA_MAC_VER_18 }, in rtl8169_get_mac_version()
2122 { 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_24 }, in rtl8169_get_mac_version()
2123 { 0x7cf00000, 0x3c000000, RTL_GIGA_MAC_VER_19 }, in rtl8169_get_mac_version()
2124 { 0x7cf00000, 0x3c200000, RTL_GIGA_MAC_VER_20 }, in rtl8169_get_mac_version()
2125 { 0x7cf00000, 0x3c300000, RTL_GIGA_MAC_VER_21 }, in rtl8169_get_mac_version()
2126 { 0x7c800000, 0x3c000000, RTL_GIGA_MAC_VER_22 }, in rtl8169_get_mac_version()
2129 { 0x7cf00000, 0x38000000, RTL_GIGA_MAC_VER_12 }, in rtl8169_get_mac_version()
2130 { 0x7c800000, 0x38000000, RTL_GIGA_MAC_VER_17 }, in rtl8169_get_mac_version()
2131 { 0x7c800000, 0x30000000, RTL_GIGA_MAC_VER_11 }, in rtl8169_get_mac_version()
2134 { 0x7c800000, 0x44800000, RTL_GIGA_MAC_VER_39 }, in rtl8169_get_mac_version()
2135 { 0x7c800000, 0x44000000, RTL_GIGA_MAC_VER_37 }, in rtl8169_get_mac_version()
2136 { 0x7cf00000, 0x40900000, RTL_GIGA_MAC_VER_29 }, in rtl8169_get_mac_version()
2137 { 0x7c800000, 0x40800000, RTL_GIGA_MAC_VER_30 }, in rtl8169_get_mac_version()
2138 { 0x7cf00000, 0x34900000, RTL_GIGA_MAC_VER_08 }, in rtl8169_get_mac_version()
2139 { 0x7cf00000, 0x24900000, RTL_GIGA_MAC_VER_08 }, in rtl8169_get_mac_version()
2140 { 0x7cf00000, 0x34800000, RTL_GIGA_MAC_VER_07 }, in rtl8169_get_mac_version()
2141 { 0x7cf00000, 0x24800000, RTL_GIGA_MAC_VER_07 }, in rtl8169_get_mac_version()
2142 { 0x7cf00000, 0x34000000, RTL_GIGA_MAC_VER_13 }, in rtl8169_get_mac_version()
2143 { 0x7cf00000, 0x34300000, RTL_GIGA_MAC_VER_10 }, in rtl8169_get_mac_version()
2144 { 0x7cf00000, 0x34200000, RTL_GIGA_MAC_VER_16 }, in rtl8169_get_mac_version()
2145 { 0x7c800000, 0x34800000, RTL_GIGA_MAC_VER_09 }, in rtl8169_get_mac_version()
2146 { 0x7c800000, 0x24800000, RTL_GIGA_MAC_VER_09 }, in rtl8169_get_mac_version()
2147 { 0x7c800000, 0x34000000, RTL_GIGA_MAC_VER_16 }, in rtl8169_get_mac_version()
2149 { 0xfc800000, 0x38800000, RTL_GIGA_MAC_VER_15 }, in rtl8169_get_mac_version()
2150 { 0xfc800000, 0x30800000, RTL_GIGA_MAC_VER_14 }, in rtl8169_get_mac_version()
2153 { 0xfc800000, 0x98000000, RTL_GIGA_MAC_VER_06 }, in rtl8169_get_mac_version()
2154 { 0xfc800000, 0x18000000, RTL_GIGA_MAC_VER_05 }, in rtl8169_get_mac_version()
2155 { 0xfc800000, 0x10000000, RTL_GIGA_MAC_VER_04 }, in rtl8169_get_mac_version()
2156 { 0xfc800000, 0x04000000, RTL_GIGA_MAC_VER_03 }, in rtl8169_get_mac_version()
2157 { 0xfc800000, 0x00800000, RTL_GIGA_MAC_VER_02 }, in rtl8169_get_mac_version()
2158 { 0xfc800000, 0x00000000, RTL_GIGA_MAC_VER_01 }, in rtl8169_get_mac_version()
2161 { 0x00000000, 0x00000000, RTL_GIGA_MAC_NONE } in rtl8169_get_mac_version()
2192 netif_dbg(tp, drv, tp->dev, "mac_version = 0x%02x\n", tp->mac_version); in rtl8169_print_mac_version()
2203 while (len-- > 0) { in rtl_writephy_batch()
2209 #define PHY_READ 0x00000000
2210 #define PHY_DATA_OR 0x10000000
2211 #define PHY_DATA_AND 0x20000000
2212 #define PHY_BJMPN 0x30000000
2213 #define PHY_MDIO_CHG 0x40000000
2214 #define PHY_CLEAR_READCOUNT 0x70000000
2215 #define PHY_WRITE 0x80000000
2216 #define PHY_READCOUNT_EQ_SKIP 0x90000000
2217 #define PHY_COMP_EQ_SKIPN 0xa0000000
2218 #define PHY_COMP_NEQ_SKIPN 0xb0000000
2219 #define PHY_WRITE_PREVIOUS 0xc0000000
2220 #define PHY_SKIPN 0xd0000000
2221 #define PHY_DELAY_MS 0xe0000000
2231 #define FW_OPCODE_SIZE sizeof(typeof(*((struct rtl_fw_phy_action *)0)->code))
2246 u8 checksum = 0; in rtl_fw_format_ok()
2251 for (i = 0; i < fw->size; i++) in rtl_fw_format_ok()
2253 if (checksum != 0) in rtl_fw_format_ok()
2277 version[RTL_VER_SIZE - 1] = 0; in rtl_fw_format_ok()
2290 for (index = 0; index < pa->size; index++) { in rtl_fw_data_ok()
2292 u32 regno = (action & 0x0fff0000) >> 16; in rtl_fw_data_ok()
2294 switch(action & 0xf0000000) { in rtl_fw_data_ok()
2331 "Invalid action 0x%08x\n", action); in rtl_fw_data_ok()
2351 rc = 0; in rtl_check_firmware()
2363 predata = count = 0; in rtl_phy_write_fw()
2367 for (index = 0; index < pa->size; ) { in rtl_phy_write_fw()
2369 u32 data = action & 0x0000ffff; in rtl_phy_write_fw()
2370 u32 regno = (action & 0x0fff0000) >> 16; in rtl_phy_write_fw()
2375 switch(action & 0xf0000000) { in rtl_phy_write_fw()
2393 if (data == 0) { in rtl_phy_write_fw()
2404 count = 0; in rtl_phy_write_fw()
2474 { 0x1f, 0x0001 }, in rtl8169s_hw_phy_config()
2475 { 0x06, 0x006e }, in rtl8169s_hw_phy_config()
2476 { 0x08, 0x0708 }, in rtl8169s_hw_phy_config()
2477 { 0x15, 0x4000 }, in rtl8169s_hw_phy_config()
2478 { 0x18, 0x65c7 }, in rtl8169s_hw_phy_config()
2480 { 0x1f, 0x0001 }, in rtl8169s_hw_phy_config()
2481 { 0x03, 0x00a1 }, in rtl8169s_hw_phy_config()
2482 { 0x02, 0x0008 }, in rtl8169s_hw_phy_config()
2483 { 0x01, 0x0120 }, in rtl8169s_hw_phy_config()
2484 { 0x00, 0x1000 }, in rtl8169s_hw_phy_config()
2485 { 0x04, 0x0800 }, in rtl8169s_hw_phy_config()
2486 { 0x04, 0x0000 }, in rtl8169s_hw_phy_config()
2488 { 0x03, 0xff41 }, in rtl8169s_hw_phy_config()
2489 { 0x02, 0xdf60 }, in rtl8169s_hw_phy_config()
2490 { 0x01, 0x0140 }, in rtl8169s_hw_phy_config()
2491 { 0x00, 0x0077 }, in rtl8169s_hw_phy_config()
2492 { 0x04, 0x7800 }, in rtl8169s_hw_phy_config()
2493 { 0x04, 0x7000 }, in rtl8169s_hw_phy_config()
2495 { 0x03, 0x802f }, in rtl8169s_hw_phy_config()
2496 { 0x02, 0x4f02 }, in rtl8169s_hw_phy_config()
2497 { 0x01, 0x0409 }, in rtl8169s_hw_phy_config()
2498 { 0x00, 0xf0f9 }, in rtl8169s_hw_phy_config()
2499 { 0x04, 0x9800 }, in rtl8169s_hw_phy_config()
2500 { 0x04, 0x9000 }, in rtl8169s_hw_phy_config()
2502 { 0x03, 0xdf01 }, in rtl8169s_hw_phy_config()
2503 { 0x02, 0xdf20 }, in rtl8169s_hw_phy_config()
2504 { 0x01, 0xff95 }, in rtl8169s_hw_phy_config()
2505 { 0x00, 0xba00 }, in rtl8169s_hw_phy_config()
2506 { 0x04, 0xa800 }, in rtl8169s_hw_phy_config()
2507 { 0x04, 0xa000 }, in rtl8169s_hw_phy_config()
2509 { 0x03, 0xff41 }, in rtl8169s_hw_phy_config()
2510 { 0x02, 0xdf20 }, in rtl8169s_hw_phy_config()
2511 { 0x01, 0x0140 }, in rtl8169s_hw_phy_config()
2512 { 0x00, 0x00bb }, in rtl8169s_hw_phy_config()
2513 { 0x04, 0xb800 }, in rtl8169s_hw_phy_config()
2514 { 0x04, 0xb000 }, in rtl8169s_hw_phy_config()
2516 { 0x03, 0xdf41 }, in rtl8169s_hw_phy_config()
2517 { 0x02, 0xdc60 }, in rtl8169s_hw_phy_config()
2518 { 0x01, 0x6340 }, in rtl8169s_hw_phy_config()
2519 { 0x00, 0x007d }, in rtl8169s_hw_phy_config()
2520 { 0x04, 0xd800 }, in rtl8169s_hw_phy_config()
2521 { 0x04, 0xd000 }, in rtl8169s_hw_phy_config()
2523 { 0x03, 0xdf01 }, in rtl8169s_hw_phy_config()
2524 { 0x02, 0xdf20 }, in rtl8169s_hw_phy_config()
2525 { 0x01, 0x100a }, in rtl8169s_hw_phy_config()
2526 { 0x00, 0xa0ff }, in rtl8169s_hw_phy_config()
2527 { 0x04, 0xf800 }, in rtl8169s_hw_phy_config()
2528 { 0x04, 0xf000 }, in rtl8169s_hw_phy_config()
2530 { 0x1f, 0x0000 }, in rtl8169s_hw_phy_config()
2531 { 0x0b, 0x0000 }, in rtl8169s_hw_phy_config()
2532 { 0x00, 0x9200 } in rtl8169s_hw_phy_config()
2541 { 0x1f, 0x0002 }, in rtl8169sb_hw_phy_config()
2542 { 0x01, 0x90d0 }, in rtl8169sb_hw_phy_config()
2543 { 0x1f, 0x0000 } in rtl8169sb_hw_phy_config()
2554 (pdev->subsystem_device != 0xe000)) in rtl8169scd_hw_phy_config_quirk()
2557 rtl_writephy(tp, 0x1f, 0x0001); in rtl8169scd_hw_phy_config_quirk()
2558 rtl_writephy(tp, 0x10, 0xf01b); in rtl8169scd_hw_phy_config_quirk()
2559 rtl_writephy(tp, 0x1f, 0x0000); in rtl8169scd_hw_phy_config_quirk()
2565 { 0x1f, 0x0001 }, in rtl8169scd_hw_phy_config()
2566 { 0x04, 0x0000 }, in rtl8169scd_hw_phy_config()
2567 { 0x03, 0x00a1 }, in rtl8169scd_hw_phy_config()
2568 { 0x02, 0x0008 }, in rtl8169scd_hw_phy_config()
2569 { 0x01, 0x0120 }, in rtl8169scd_hw_phy_config()
2570 { 0x00, 0x1000 }, in rtl8169scd_hw_phy_config()
2571 { 0x04, 0x0800 }, in rtl8169scd_hw_phy_config()
2572 { 0x04, 0x9000 }, in rtl8169scd_hw_phy_config()
2573 { 0x03, 0x802f }, in rtl8169scd_hw_phy_config()
2574 { 0x02, 0x4f02 }, in rtl8169scd_hw_phy_config()
2575 { 0x01, 0x0409 }, in rtl8169scd_hw_phy_config()
2576 { 0x00, 0xf099 }, in rtl8169scd_hw_phy_config()
2577 { 0x04, 0x9800 }, in rtl8169scd_hw_phy_config()
2578 { 0x04, 0xa000 }, in rtl8169scd_hw_phy_config()
2579 { 0x03, 0xdf01 }, in rtl8169scd_hw_phy_config()
2580 { 0x02, 0xdf20 }, in rtl8169scd_hw_phy_config()
2581 { 0x01, 0xff95 }, in rtl8169scd_hw_phy_config()
2582 { 0x00, 0xba00 }, in rtl8169scd_hw_phy_config()
2583 { 0x04, 0xa800 }, in rtl8169scd_hw_phy_config()
2584 { 0x04, 0xf000 }, in rtl8169scd_hw_phy_config()
2585 { 0x03, 0xdf01 }, in rtl8169scd_hw_phy_config()
2586 { 0x02, 0xdf20 }, in rtl8169scd_hw_phy_config()
2587 { 0x01, 0x101a }, in rtl8169scd_hw_phy_config()
2588 { 0x00, 0xa0ff }, in rtl8169scd_hw_phy_config()
2589 { 0x04, 0xf800 }, in rtl8169scd_hw_phy_config()
2590 { 0x04, 0x0000 }, in rtl8169scd_hw_phy_config()
2591 { 0x1f, 0x0000 }, in rtl8169scd_hw_phy_config()
2593 { 0x1f, 0x0001 }, in rtl8169scd_hw_phy_config()
2594 { 0x10, 0xf41b }, in rtl8169scd_hw_phy_config()
2595 { 0x14, 0xfb54 }, in rtl8169scd_hw_phy_config()
2596 { 0x18, 0xf5c7 }, in rtl8169scd_hw_phy_config()
2597 { 0x1f, 0x0000 }, in rtl8169scd_hw_phy_config()
2599 { 0x1f, 0x0001 }, in rtl8169scd_hw_phy_config()
2600 { 0x17, 0x0cc0 }, in rtl8169scd_hw_phy_config()
2601 { 0x1f, 0x0000 } in rtl8169scd_hw_phy_config()
2612 { 0x1f, 0x0001 }, in rtl8169sce_hw_phy_config()
2613 { 0x04, 0x0000 }, in rtl8169sce_hw_phy_config()
2614 { 0x03, 0x00a1 }, in rtl8169sce_hw_phy_config()
2615 { 0x02, 0x0008 }, in rtl8169sce_hw_phy_config()
2616 { 0x01, 0x0120 }, in rtl8169sce_hw_phy_config()
2617 { 0x00, 0x1000 }, in rtl8169sce_hw_phy_config()
2618 { 0x04, 0x0800 }, in rtl8169sce_hw_phy_config()
2619 { 0x04, 0x9000 }, in rtl8169sce_hw_phy_config()
2620 { 0x03, 0x802f }, in rtl8169sce_hw_phy_config()
2621 { 0x02, 0x4f02 }, in rtl8169sce_hw_phy_config()
2622 { 0x01, 0x0409 }, in rtl8169sce_hw_phy_config()
2623 { 0x00, 0xf099 }, in rtl8169sce_hw_phy_config()
2624 { 0x04, 0x9800 }, in rtl8169sce_hw_phy_config()
2625 { 0x04, 0xa000 }, in rtl8169sce_hw_phy_config()
2626 { 0x03, 0xdf01 }, in rtl8169sce_hw_phy_config()
2627 { 0x02, 0xdf20 }, in rtl8169sce_hw_phy_config()
2628 { 0x01, 0xff95 }, in rtl8169sce_hw_phy_config()
2629 { 0x00, 0xba00 }, in rtl8169sce_hw_phy_config()
2630 { 0x04, 0xa800 }, in rtl8169sce_hw_phy_config()
2631 { 0x04, 0xf000 }, in rtl8169sce_hw_phy_config()
2632 { 0x03, 0xdf01 }, in rtl8169sce_hw_phy_config()
2633 { 0x02, 0xdf20 }, in rtl8169sce_hw_phy_config()
2634 { 0x01, 0x101a }, in rtl8169sce_hw_phy_config()
2635 { 0x00, 0xa0ff }, in rtl8169sce_hw_phy_config()
2636 { 0x04, 0xf800 }, in rtl8169sce_hw_phy_config()
2637 { 0x04, 0x0000 }, in rtl8169sce_hw_phy_config()
2638 { 0x1f, 0x0000 }, in rtl8169sce_hw_phy_config()
2640 { 0x1f, 0x0001 }, in rtl8169sce_hw_phy_config()
2641 { 0x0b, 0x8480 }, in rtl8169sce_hw_phy_config()
2642 { 0x1f, 0x0000 }, in rtl8169sce_hw_phy_config()
2644 { 0x1f, 0x0001 }, in rtl8169sce_hw_phy_config()
2645 { 0x18, 0x67c7 }, in rtl8169sce_hw_phy_config()
2646 { 0x04, 0x2000 }, in rtl8169sce_hw_phy_config()
2647 { 0x03, 0x002f }, in rtl8169sce_hw_phy_config()
2648 { 0x02, 0x4360 }, in rtl8169sce_hw_phy_config()
2649 { 0x01, 0x0109 }, in rtl8169sce_hw_phy_config()
2650 { 0x00, 0x3022 }, in rtl8169sce_hw_phy_config()
2651 { 0x04, 0x2800 }, in rtl8169sce_hw_phy_config()
2652 { 0x1f, 0x0000 }, in rtl8169sce_hw_phy_config()
2654 { 0x1f, 0x0001 }, in rtl8169sce_hw_phy_config()
2655 { 0x17, 0x0cc0 }, in rtl8169sce_hw_phy_config()
2656 { 0x1f, 0x0000 } in rtl8169sce_hw_phy_config()
2665 { 0x10, 0xf41b }, in rtl8168bb_hw_phy_config()
2666 { 0x1f, 0x0000 } in rtl8168bb_hw_phy_config()
2669 rtl_writephy(tp, 0x1f, 0x0001); in rtl8168bb_hw_phy_config()
2670 rtl_patchphy(tp, 0x16, 1 << 0); in rtl8168bb_hw_phy_config()
2678 { 0x1f, 0x0001 }, in rtl8168bef_hw_phy_config()
2679 { 0x10, 0xf41b }, in rtl8168bef_hw_phy_config()
2680 { 0x1f, 0x0000 } in rtl8168bef_hw_phy_config()
2689 { 0x1f, 0x0000 }, in rtl8168cp_1_hw_phy_config()
2690 { 0x1d, 0x0f00 }, in rtl8168cp_1_hw_phy_config()
2691 { 0x1f, 0x0002 }, in rtl8168cp_1_hw_phy_config()
2692 { 0x0c, 0x1ec8 }, in rtl8168cp_1_hw_phy_config()
2693 { 0x1f, 0x0000 } in rtl8168cp_1_hw_phy_config()
2702 { 0x1f, 0x0001 }, in rtl8168cp_2_hw_phy_config()
2703 { 0x1d, 0x3d98 }, in rtl8168cp_2_hw_phy_config()
2704 { 0x1f, 0x0000 } in rtl8168cp_2_hw_phy_config()
2707 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168cp_2_hw_phy_config()
2708 rtl_patchphy(tp, 0x14, 1 << 5); in rtl8168cp_2_hw_phy_config()
2709 rtl_patchphy(tp, 0x0d, 1 << 5); in rtl8168cp_2_hw_phy_config()
2717 { 0x1f, 0x0001 }, in rtl8168c_1_hw_phy_config()
2718 { 0x12, 0x2300 }, in rtl8168c_1_hw_phy_config()
2719 { 0x1f, 0x0002 }, in rtl8168c_1_hw_phy_config()
2720 { 0x00, 0x88d4 }, in rtl8168c_1_hw_phy_config()
2721 { 0x01, 0x82b1 }, in rtl8168c_1_hw_phy_config()
2722 { 0x03, 0x7002 }, in rtl8168c_1_hw_phy_config()
2723 { 0x08, 0x9e30 }, in rtl8168c_1_hw_phy_config()
2724 { 0x09, 0x01f0 }, in rtl8168c_1_hw_phy_config()
2725 { 0x0a, 0x5500 }, in rtl8168c_1_hw_phy_config()
2726 { 0x0c, 0x00c8 }, in rtl8168c_1_hw_phy_config()
2727 { 0x1f, 0x0003 }, in rtl8168c_1_hw_phy_config()
2728 { 0x12, 0xc096 }, in rtl8168c_1_hw_phy_config()
2729 { 0x16, 0x000a }, in rtl8168c_1_hw_phy_config()
2730 { 0x1f, 0x0000 }, in rtl8168c_1_hw_phy_config()
2731 { 0x1f, 0x0000 }, in rtl8168c_1_hw_phy_config()
2732 { 0x09, 0x2000 }, in rtl8168c_1_hw_phy_config()
2733 { 0x09, 0x0000 } in rtl8168c_1_hw_phy_config()
2738 rtl_patchphy(tp, 0x14, 1 << 5); in rtl8168c_1_hw_phy_config()
2739 rtl_patchphy(tp, 0x0d, 1 << 5); in rtl8168c_1_hw_phy_config()
2740 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168c_1_hw_phy_config()
2746 { 0x1f, 0x0001 }, in rtl8168c_2_hw_phy_config()
2747 { 0x12, 0x2300 }, in rtl8168c_2_hw_phy_config()
2748 { 0x03, 0x802f }, in rtl8168c_2_hw_phy_config()
2749 { 0x02, 0x4f02 }, in rtl8168c_2_hw_phy_config()
2750 { 0x01, 0x0409 }, in rtl8168c_2_hw_phy_config()
2751 { 0x00, 0xf099 }, in rtl8168c_2_hw_phy_config()
2752 { 0x04, 0x9800 }, in rtl8168c_2_hw_phy_config()
2753 { 0x04, 0x9000 }, in rtl8168c_2_hw_phy_config()
2754 { 0x1d, 0x3d98 }, in rtl8168c_2_hw_phy_config()
2755 { 0x1f, 0x0002 }, in rtl8168c_2_hw_phy_config()
2756 { 0x0c, 0x7eb8 }, in rtl8168c_2_hw_phy_config()
2757 { 0x06, 0x0761 }, in rtl8168c_2_hw_phy_config()
2758 { 0x1f, 0x0003 }, in rtl8168c_2_hw_phy_config()
2759 { 0x16, 0x0f0a }, in rtl8168c_2_hw_phy_config()
2760 { 0x1f, 0x0000 } in rtl8168c_2_hw_phy_config()
2765 rtl_patchphy(tp, 0x16, 1 << 0); in rtl8168c_2_hw_phy_config()
2766 rtl_patchphy(tp, 0x14, 1 << 5); in rtl8168c_2_hw_phy_config()
2767 rtl_patchphy(tp, 0x0d, 1 << 5); in rtl8168c_2_hw_phy_config()
2768 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168c_2_hw_phy_config()
2774 { 0x1f, 0x0001 }, in rtl8168c_3_hw_phy_config()
2775 { 0x12, 0x2300 }, in rtl8168c_3_hw_phy_config()
2776 { 0x1d, 0x3d98 }, in rtl8168c_3_hw_phy_config()
2777 { 0x1f, 0x0002 }, in rtl8168c_3_hw_phy_config()
2778 { 0x0c, 0x7eb8 }, in rtl8168c_3_hw_phy_config()
2779 { 0x06, 0x5461 }, in rtl8168c_3_hw_phy_config()
2780 { 0x1f, 0x0003 }, in rtl8168c_3_hw_phy_config()
2781 { 0x16, 0x0f0a }, in rtl8168c_3_hw_phy_config()
2782 { 0x1f, 0x0000 } in rtl8168c_3_hw_phy_config()
2787 rtl_patchphy(tp, 0x16, 1 << 0); in rtl8168c_3_hw_phy_config()
2788 rtl_patchphy(tp, 0x14, 1 << 5); in rtl8168c_3_hw_phy_config()
2789 rtl_patchphy(tp, 0x0d, 1 << 5); in rtl8168c_3_hw_phy_config()
2790 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168c_3_hw_phy_config()
2802 { 0x1f, 0x0001 }, in rtl8168d_1_hw_phy_config()
2803 { 0x06, 0x4064 }, in rtl8168d_1_hw_phy_config()
2804 { 0x07, 0x2863 }, in rtl8168d_1_hw_phy_config()
2805 { 0x08, 0x059c }, in rtl8168d_1_hw_phy_config()
2806 { 0x09, 0x26b4 }, in rtl8168d_1_hw_phy_config()
2807 { 0x0a, 0x6a19 }, in rtl8168d_1_hw_phy_config()
2808 { 0x0b, 0xdcc8 }, in rtl8168d_1_hw_phy_config()
2809 { 0x10, 0xf06d }, in rtl8168d_1_hw_phy_config()
2810 { 0x14, 0x7f68 }, in rtl8168d_1_hw_phy_config()
2811 { 0x18, 0x7fd9 }, in rtl8168d_1_hw_phy_config()
2812 { 0x1c, 0xf0ff }, in rtl8168d_1_hw_phy_config()
2813 { 0x1d, 0x3d9c }, in rtl8168d_1_hw_phy_config()
2814 { 0x1f, 0x0003 }, in rtl8168d_1_hw_phy_config()
2815 { 0x12, 0xf49f }, in rtl8168d_1_hw_phy_config()
2816 { 0x13, 0x070b }, in rtl8168d_1_hw_phy_config()
2817 { 0x1a, 0x05ad }, in rtl8168d_1_hw_phy_config()
2818 { 0x14, 0x94c0 }, in rtl8168d_1_hw_phy_config()
2824 { 0x1f, 0x0002 }, in rtl8168d_1_hw_phy_config()
2825 { 0x06, 0x5561 }, in rtl8168d_1_hw_phy_config()
2826 { 0x1f, 0x0005 }, in rtl8168d_1_hw_phy_config()
2827 { 0x05, 0x8332 }, in rtl8168d_1_hw_phy_config()
2828 { 0x06, 0x5561 }, in rtl8168d_1_hw_phy_config()
2834 { 0x1f, 0x0001 }, in rtl8168d_1_hw_phy_config()
2835 { 0x17, 0x0cc0 }, in rtl8168d_1_hw_phy_config()
2837 { 0x1f, 0x0000 }, in rtl8168d_1_hw_phy_config()
2838 { 0x0d, 0xf880 } in rtl8168d_1_hw_phy_config()
2847 rtl_writephy(tp, 0x1f, 0x0002); in rtl8168d_1_hw_phy_config()
2848 rtl_w0w1_phy(tp, 0x0b, 0x0010, 0x00ef); in rtl8168d_1_hw_phy_config()
2849 rtl_w0w1_phy(tp, 0x0c, 0xa200, 0x5d00); in rtl8168d_1_hw_phy_config()
2851 if (rtl8168d_efuse_read(tp, 0x01) == 0xb1) { in rtl8168d_1_hw_phy_config()
2853 { 0x1f, 0x0002 }, in rtl8168d_1_hw_phy_config()
2854 { 0x05, 0x669a }, in rtl8168d_1_hw_phy_config()
2855 { 0x1f, 0x0005 }, in rtl8168d_1_hw_phy_config()
2856 { 0x05, 0x8330 }, in rtl8168d_1_hw_phy_config()
2857 { 0x06, 0x669a }, in rtl8168d_1_hw_phy_config()
2858 { 0x1f, 0x0002 } in rtl8168d_1_hw_phy_config()
2864 val = rtl_readphy(tp, 0x0d); in rtl8168d_1_hw_phy_config()
2866 if ((val & 0x00ff) != 0x006c) { in rtl8168d_1_hw_phy_config()
2868 0x0065, 0x0066, 0x0067, 0x0068, in rtl8168d_1_hw_phy_config()
2869 0x0069, 0x006a, 0x006b, 0x006c in rtl8168d_1_hw_phy_config()
2873 rtl_writephy(tp, 0x1f, 0x0002); in rtl8168d_1_hw_phy_config()
2875 val &= 0xff00; in rtl8168d_1_hw_phy_config()
2876 for (i = 0; i < ARRAY_SIZE(set); i++) in rtl8168d_1_hw_phy_config()
2877 rtl_writephy(tp, 0x0d, val | set[i]); in rtl8168d_1_hw_phy_config()
2881 { 0x1f, 0x0002 }, in rtl8168d_1_hw_phy_config()
2882 { 0x05, 0x6662 }, in rtl8168d_1_hw_phy_config()
2883 { 0x1f, 0x0005 }, in rtl8168d_1_hw_phy_config()
2884 { 0x05, 0x8330 }, in rtl8168d_1_hw_phy_config()
2885 { 0x06, 0x6662 } in rtl8168d_1_hw_phy_config()
2892 rtl_writephy(tp, 0x1f, 0x0002); in rtl8168d_1_hw_phy_config()
2893 rtl_patchphy(tp, 0x0d, 0x0300); in rtl8168d_1_hw_phy_config()
2894 rtl_patchphy(tp, 0x0f, 0x0010); in rtl8168d_1_hw_phy_config()
2897 rtl_writephy(tp, 0x1f, 0x0002); in rtl8168d_1_hw_phy_config()
2898 rtl_w0w1_phy(tp, 0x02, 0x0100, 0x0600); in rtl8168d_1_hw_phy_config()
2899 rtl_w0w1_phy(tp, 0x03, 0x0000, 0xe000); in rtl8168d_1_hw_phy_config()
2901 rtl_writephy(tp, 0x1f, 0x0005); in rtl8168d_1_hw_phy_config()
2902 rtl_writephy(tp, 0x05, 0x001b); in rtl8168d_1_hw_phy_config()
2904 rtl_apply_firmware_cond(tp, MII_EXPANSION, 0xbf00); in rtl8168d_1_hw_phy_config()
2906 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168d_1_hw_phy_config()
2913 { 0x1f, 0x0001 }, in rtl8168d_2_hw_phy_config()
2914 { 0x06, 0x4064 }, in rtl8168d_2_hw_phy_config()
2915 { 0x07, 0x2863 }, in rtl8168d_2_hw_phy_config()
2916 { 0x08, 0x059c }, in rtl8168d_2_hw_phy_config()
2917 { 0x09, 0x26b4 }, in rtl8168d_2_hw_phy_config()
2918 { 0x0a, 0x6a19 }, in rtl8168d_2_hw_phy_config()
2919 { 0x0b, 0xdcc8 }, in rtl8168d_2_hw_phy_config()
2920 { 0x10, 0xf06d }, in rtl8168d_2_hw_phy_config()
2921 { 0x14, 0x7f68 }, in rtl8168d_2_hw_phy_config()
2922 { 0x18, 0x7fd9 }, in rtl8168d_2_hw_phy_config()
2923 { 0x1c, 0xf0ff }, in rtl8168d_2_hw_phy_config()
2924 { 0x1d, 0x3d9c }, in rtl8168d_2_hw_phy_config()
2925 { 0x1f, 0x0003 }, in rtl8168d_2_hw_phy_config()
2926 { 0x12, 0xf49f }, in rtl8168d_2_hw_phy_config()
2927 { 0x13, 0x070b }, in rtl8168d_2_hw_phy_config()
2928 { 0x1a, 0x05ad }, in rtl8168d_2_hw_phy_config()
2929 { 0x14, 0x94c0 }, in rtl8168d_2_hw_phy_config()
2935 { 0x1f, 0x0002 }, in rtl8168d_2_hw_phy_config()
2936 { 0x06, 0x5561 }, in rtl8168d_2_hw_phy_config()
2937 { 0x1f, 0x0005 }, in rtl8168d_2_hw_phy_config()
2938 { 0x05, 0x8332 }, in rtl8168d_2_hw_phy_config()
2939 { 0x06, 0x5561 }, in rtl8168d_2_hw_phy_config()
2945 { 0x1f, 0x0001 }, in rtl8168d_2_hw_phy_config()
2946 { 0x17, 0x0cc0 }, in rtl8168d_2_hw_phy_config()
2948 { 0x1f, 0x0000 }, in rtl8168d_2_hw_phy_config()
2949 { 0x0d, 0xf880 } in rtl8168d_2_hw_phy_config()
2954 if (rtl8168d_efuse_read(tp, 0x01) == 0xb1) { in rtl8168d_2_hw_phy_config()
2956 { 0x1f, 0x0002 }, in rtl8168d_2_hw_phy_config()
2957 { 0x05, 0x669a }, in rtl8168d_2_hw_phy_config()
2958 { 0x1f, 0x0005 }, in rtl8168d_2_hw_phy_config()
2959 { 0x05, 0x8330 }, in rtl8168d_2_hw_phy_config()
2960 { 0x06, 0x669a }, in rtl8168d_2_hw_phy_config()
2962 { 0x1f, 0x0002 } in rtl8168d_2_hw_phy_config()
2968 val = rtl_readphy(tp, 0x0d); in rtl8168d_2_hw_phy_config()
2969 if ((val & 0x00ff) != 0x006c) { in rtl8168d_2_hw_phy_config()
2971 0x0065, 0x0066, 0x0067, 0x0068, in rtl8168d_2_hw_phy_config()
2972 0x0069, 0x006a, 0x006b, 0x006c in rtl8168d_2_hw_phy_config()
2976 rtl_writephy(tp, 0x1f, 0x0002); in rtl8168d_2_hw_phy_config()
2978 val &= 0xff00; in rtl8168d_2_hw_phy_config()
2979 for (i = 0; i < ARRAY_SIZE(set); i++) in rtl8168d_2_hw_phy_config()
2980 rtl_writephy(tp, 0x0d, val | set[i]); in rtl8168d_2_hw_phy_config()
2984 { 0x1f, 0x0002 }, in rtl8168d_2_hw_phy_config()
2985 { 0x05, 0x2642 }, in rtl8168d_2_hw_phy_config()
2986 { 0x1f, 0x0005 }, in rtl8168d_2_hw_phy_config()
2987 { 0x05, 0x8330 }, in rtl8168d_2_hw_phy_config()
2988 { 0x06, 0x2642 } in rtl8168d_2_hw_phy_config()
2995 rtl_writephy(tp, 0x1f, 0x0002); in rtl8168d_2_hw_phy_config()
2996 rtl_w0w1_phy(tp, 0x02, 0x0100, 0x0600); in rtl8168d_2_hw_phy_config()
2997 rtl_w0w1_phy(tp, 0x03, 0x0000, 0xe000); in rtl8168d_2_hw_phy_config()
3000 rtl_writephy(tp, 0x1f, 0x0002); in rtl8168d_2_hw_phy_config()
3001 rtl_patchphy(tp, 0x0f, 0x0017); in rtl8168d_2_hw_phy_config()
3003 rtl_writephy(tp, 0x1f, 0x0005); in rtl8168d_2_hw_phy_config()
3004 rtl_writephy(tp, 0x05, 0x001b); in rtl8168d_2_hw_phy_config()
3006 rtl_apply_firmware_cond(tp, MII_EXPANSION, 0xb300); in rtl8168d_2_hw_phy_config()
3008 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168d_2_hw_phy_config()
3014 { 0x1f, 0x0002 }, in rtl8168d_3_hw_phy_config()
3015 { 0x10, 0x0008 }, in rtl8168d_3_hw_phy_config()
3016 { 0x0d, 0x006c }, in rtl8168d_3_hw_phy_config()
3018 { 0x1f, 0x0000 }, in rtl8168d_3_hw_phy_config()
3019 { 0x0d, 0xf880 }, in rtl8168d_3_hw_phy_config()
3021 { 0x1f, 0x0001 }, in rtl8168d_3_hw_phy_config()
3022 { 0x17, 0x0cc0 }, in rtl8168d_3_hw_phy_config()
3024 { 0x1f, 0x0001 }, in rtl8168d_3_hw_phy_config()
3025 { 0x0b, 0xa4d8 }, in rtl8168d_3_hw_phy_config()
3026 { 0x09, 0x281c }, in rtl8168d_3_hw_phy_config()
3027 { 0x07, 0x2883 }, in rtl8168d_3_hw_phy_config()
3028 { 0x0a, 0x6b35 }, in rtl8168d_3_hw_phy_config()
3029 { 0x1d, 0x3da4 }, in rtl8168d_3_hw_phy_config()
3030 { 0x1c, 0xeffd }, in rtl8168d_3_hw_phy_config()
3031 { 0x14, 0x7f52 }, in rtl8168d_3_hw_phy_config()
3032 { 0x18, 0x7fc6 }, in rtl8168d_3_hw_phy_config()
3033 { 0x08, 0x0601 }, in rtl8168d_3_hw_phy_config()
3034 { 0x06, 0x4063 }, in rtl8168d_3_hw_phy_config()
3035 { 0x10, 0xf074 }, in rtl8168d_3_hw_phy_config()
3036 { 0x1f, 0x0003 }, in rtl8168d_3_hw_phy_config()
3037 { 0x13, 0x0789 }, in rtl8168d_3_hw_phy_config()
3038 { 0x12, 0xf4bd }, in rtl8168d_3_hw_phy_config()
3039 { 0x1a, 0x04fd }, in rtl8168d_3_hw_phy_config()
3040 { 0x14, 0x84b0 }, in rtl8168d_3_hw_phy_config()
3041 { 0x1f, 0x0000 }, in rtl8168d_3_hw_phy_config()
3042 { 0x00, 0x9200 }, in rtl8168d_3_hw_phy_config()
3044 { 0x1f, 0x0005 }, in rtl8168d_3_hw_phy_config()
3045 { 0x01, 0x0340 }, in rtl8168d_3_hw_phy_config()
3046 { 0x1f, 0x0001 }, in rtl8168d_3_hw_phy_config()
3047 { 0x04, 0x4000 }, in rtl8168d_3_hw_phy_config()
3048 { 0x03, 0x1d21 }, in rtl8168d_3_hw_phy_config()
3049 { 0x02, 0x0c32 }, in rtl8168d_3_hw_phy_config()
3050 { 0x01, 0x0200 }, in rtl8168d_3_hw_phy_config()
3051 { 0x00, 0x5554 }, in rtl8168d_3_hw_phy_config()
3052 { 0x04, 0x4800 }, in rtl8168d_3_hw_phy_config()
3053 { 0x04, 0x4000 }, in rtl8168d_3_hw_phy_config()
3054 { 0x04, 0xf000 }, in rtl8168d_3_hw_phy_config()
3055 { 0x03, 0xdf01 }, in rtl8168d_3_hw_phy_config()
3056 { 0x02, 0xdf20 }, in rtl8168d_3_hw_phy_config()
3057 { 0x01, 0x101a }, in rtl8168d_3_hw_phy_config()
3058 { 0x00, 0xa0ff }, in rtl8168d_3_hw_phy_config()
3059 { 0x04, 0xf800 }, in rtl8168d_3_hw_phy_config()
3060 { 0x04, 0xf000 }, in rtl8168d_3_hw_phy_config()
3061 { 0x1f, 0x0000 }, in rtl8168d_3_hw_phy_config()
3063 { 0x1f, 0x0007 }, in rtl8168d_3_hw_phy_config()
3064 { 0x1e, 0x0023 }, in rtl8168d_3_hw_phy_config()
3065 { 0x16, 0x0000 }, in rtl8168d_3_hw_phy_config()
3066 { 0x1f, 0x0000 } in rtl8168d_3_hw_phy_config()
3075 { 0x1f, 0x0001 }, in rtl8168d_4_hw_phy_config()
3076 { 0x17, 0x0cc0 }, in rtl8168d_4_hw_phy_config()
3078 { 0x1f, 0x0007 }, in rtl8168d_4_hw_phy_config()
3079 { 0x1e, 0x002d }, in rtl8168d_4_hw_phy_config()
3080 { 0x18, 0x0040 }, in rtl8168d_4_hw_phy_config()
3081 { 0x1f, 0x0000 } in rtl8168d_4_hw_phy_config()
3085 rtl_patchphy(tp, 0x0d, 1 << 5); in rtl8168d_4_hw_phy_config()
3092 { 0x1f, 0x0005 }, in rtl8168e_1_hw_phy_config()
3093 { 0x05, 0x8b80 }, in rtl8168e_1_hw_phy_config()
3094 { 0x06, 0xc896 }, in rtl8168e_1_hw_phy_config()
3095 { 0x1f, 0x0000 }, in rtl8168e_1_hw_phy_config()
3098 { 0x1f, 0x0001 }, in rtl8168e_1_hw_phy_config()
3099 { 0x0b, 0x6c20 }, in rtl8168e_1_hw_phy_config()
3100 { 0x07, 0x2872 }, in rtl8168e_1_hw_phy_config()
3101 { 0x1c, 0xefff }, in rtl8168e_1_hw_phy_config()
3102 { 0x1f, 0x0003 }, in rtl8168e_1_hw_phy_config()
3103 { 0x14, 0x6420 }, in rtl8168e_1_hw_phy_config()
3104 { 0x1f, 0x0000 }, in rtl8168e_1_hw_phy_config()
3107 { 0x1f, 0x0007 }, in rtl8168e_1_hw_phy_config()
3108 { 0x1e, 0x002f }, in rtl8168e_1_hw_phy_config()
3109 { 0x15, 0x1919 }, in rtl8168e_1_hw_phy_config()
3110 { 0x1f, 0x0000 }, in rtl8168e_1_hw_phy_config()
3112 { 0x1f, 0x0007 }, in rtl8168e_1_hw_phy_config()
3113 { 0x1e, 0x00ac }, in rtl8168e_1_hw_phy_config()
3114 { 0x18, 0x0006 }, in rtl8168e_1_hw_phy_config()
3115 { 0x1f, 0x0000 } in rtl8168e_1_hw_phy_config()
3123 rtl_writephy(tp, 0x1f, 0x0007); in rtl8168e_1_hw_phy_config()
3124 rtl_writephy(tp, 0x1e, 0x0023); in rtl8168e_1_hw_phy_config()
3125 rtl_w0w1_phy(tp, 0x17, 0x0006, 0x0000); in rtl8168e_1_hw_phy_config()
3126 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168e_1_hw_phy_config()
3129 rtl_writephy(tp, 0x1f, 0x0002); in rtl8168e_1_hw_phy_config()
3130 rtl_w0w1_phy(tp, 0x08, 0x8000, 0x7f00); in rtl8168e_1_hw_phy_config()
3131 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168e_1_hw_phy_config()
3134 rtl_writephy(tp, 0x1f, 0x0007); in rtl8168e_1_hw_phy_config()
3135 rtl_writephy(tp, 0x1e, 0x002d); in rtl8168e_1_hw_phy_config()
3136 rtl_w0w1_phy(tp, 0x18, 0x0050, 0x0000); in rtl8168e_1_hw_phy_config()
3137 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168e_1_hw_phy_config()
3138 rtl_w0w1_phy(tp, 0x14, 0x8000, 0x0000); in rtl8168e_1_hw_phy_config()
3140 rtl_writephy(tp, 0x1f, 0x0005); in rtl8168e_1_hw_phy_config()
3141 rtl_writephy(tp, 0x05, 0x8b86); in rtl8168e_1_hw_phy_config()
3142 rtl_w0w1_phy(tp, 0x06, 0x0001, 0x0000); in rtl8168e_1_hw_phy_config()
3143 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168e_1_hw_phy_config()
3145 rtl_writephy(tp, 0x1f, 0x0005); in rtl8168e_1_hw_phy_config()
3146 rtl_writephy(tp, 0x05, 0x8b85); in rtl8168e_1_hw_phy_config()
3147 rtl_w0w1_phy(tp, 0x06, 0x0000, 0x2000); in rtl8168e_1_hw_phy_config()
3148 rtl_writephy(tp, 0x1f, 0x0007); in rtl8168e_1_hw_phy_config()
3149 rtl_writephy(tp, 0x1e, 0x0020); in rtl8168e_1_hw_phy_config()
3150 rtl_w0w1_phy(tp, 0x15, 0x0000, 0x1100); in rtl8168e_1_hw_phy_config()
3151 rtl_writephy(tp, 0x1f, 0x0006); in rtl8168e_1_hw_phy_config()
3152 rtl_writephy(tp, 0x00, 0x5a00); in rtl8168e_1_hw_phy_config()
3153 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168e_1_hw_phy_config()
3154 rtl_writephy(tp, 0x0d, 0x0007); in rtl8168e_1_hw_phy_config()
3155 rtl_writephy(tp, 0x0e, 0x003c); in rtl8168e_1_hw_phy_config()
3156 rtl_writephy(tp, 0x0d, 0x4007); in rtl8168e_1_hw_phy_config()
3157 rtl_writephy(tp, 0x0e, 0x0000); in rtl8168e_1_hw_phy_config()
3158 rtl_writephy(tp, 0x0d, 0x0000); in rtl8168e_1_hw_phy_config()
3164 addr[0] | (addr[1] << 8), in rtl_rar_exgmac_set()
3169 { .addr = 0xe0, ERIAR_MASK_1111, .val = w[0] | (w[1] << 16) }, in rtl_rar_exgmac_set()
3170 { .addr = 0xe4, ERIAR_MASK_1111, .val = w[2] }, in rtl_rar_exgmac_set()
3171 { .addr = 0xf0, ERIAR_MASK_1111, .val = w[0] << 16 }, in rtl_rar_exgmac_set()
3172 { .addr = 0xf4, ERIAR_MASK_1111, .val = w[1] | (w[2] << 16) } in rtl_rar_exgmac_set()
3182 { 0x1f, 0x0004 }, in rtl8168e_2_hw_phy_config()
3183 { 0x1f, 0x0007 }, in rtl8168e_2_hw_phy_config()
3184 { 0x1e, 0x00ac }, in rtl8168e_2_hw_phy_config()
3185 { 0x18, 0x0006 }, in rtl8168e_2_hw_phy_config()
3186 { 0x1f, 0x0002 }, in rtl8168e_2_hw_phy_config()
3187 { 0x1f, 0x0000 }, in rtl8168e_2_hw_phy_config()
3188 { 0x1f, 0x0000 }, in rtl8168e_2_hw_phy_config()
3191 { 0x1f, 0x0003 }, in rtl8168e_2_hw_phy_config()
3192 { 0x09, 0xa20f }, in rtl8168e_2_hw_phy_config()
3193 { 0x1f, 0x0000 }, in rtl8168e_2_hw_phy_config()
3194 { 0x1f, 0x0000 }, in rtl8168e_2_hw_phy_config()
3197 { 0x1f, 0x0005 }, in rtl8168e_2_hw_phy_config()
3198 { 0x05, 0x8b5b }, in rtl8168e_2_hw_phy_config()
3199 { 0x06, 0x9222 }, in rtl8168e_2_hw_phy_config()
3200 { 0x05, 0x8b6d }, in rtl8168e_2_hw_phy_config()
3201 { 0x06, 0x8000 }, in rtl8168e_2_hw_phy_config()
3202 { 0x05, 0x8b76 }, in rtl8168e_2_hw_phy_config()
3203 { 0x06, 0x8000 }, in rtl8168e_2_hw_phy_config()
3204 { 0x1f, 0x0000 } in rtl8168e_2_hw_phy_config()
3212 rtl_writephy(tp, 0x1f, 0x0005); in rtl8168e_2_hw_phy_config()
3213 rtl_writephy(tp, 0x05, 0x8b80); in rtl8168e_2_hw_phy_config()
3214 rtl_w0w1_phy(tp, 0x17, 0x0006, 0x0000); in rtl8168e_2_hw_phy_config()
3215 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168e_2_hw_phy_config()
3218 rtl_writephy(tp, 0x1f, 0x0004); in rtl8168e_2_hw_phy_config()
3219 rtl_writephy(tp, 0x1f, 0x0007); in rtl8168e_2_hw_phy_config()
3220 rtl_writephy(tp, 0x1e, 0x002d); in rtl8168e_2_hw_phy_config()
3221 rtl_w0w1_phy(tp, 0x18, 0x0010, 0x0000); in rtl8168e_2_hw_phy_config()
3222 rtl_writephy(tp, 0x1f, 0x0002); in rtl8168e_2_hw_phy_config()
3223 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168e_2_hw_phy_config()
3224 rtl_w0w1_phy(tp, 0x14, 0x8000, 0x0000); in rtl8168e_2_hw_phy_config()
3227 rtl_writephy(tp, 0x1f, 0x0005); in rtl8168e_2_hw_phy_config()
3228 rtl_writephy(tp, 0x05, 0x8b86); in rtl8168e_2_hw_phy_config()
3229 rtl_w0w1_phy(tp, 0x06, 0x0001, 0x0000); in rtl8168e_2_hw_phy_config()
3230 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168e_2_hw_phy_config()
3233 rtl_writephy(tp, 0x1f, 0x0005); in rtl8168e_2_hw_phy_config()
3234 rtl_writephy(tp, 0x05, 0x8b85); in rtl8168e_2_hw_phy_config()
3235 rtl_w0w1_phy(tp, 0x06, 0x4000, 0x0000); in rtl8168e_2_hw_phy_config()
3236 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168e_2_hw_phy_config()
3239 rtl_w0w1_eri(tp, 0x1b0, ERIAR_MASK_1111, 0x0003, 0x0000, ERIAR_EXGMAC); in rtl8168e_2_hw_phy_config()
3240 rtl_writephy(tp, 0x1f, 0x0005); in rtl8168e_2_hw_phy_config()
3241 rtl_writephy(tp, 0x05, 0x8b85); in rtl8168e_2_hw_phy_config()
3242 rtl_w0w1_phy(tp, 0x06, 0x2000, 0x0000); in rtl8168e_2_hw_phy_config()
3243 rtl_writephy(tp, 0x1f, 0x0004); in rtl8168e_2_hw_phy_config()
3244 rtl_writephy(tp, 0x1f, 0x0007); in rtl8168e_2_hw_phy_config()
3245 rtl_writephy(tp, 0x1e, 0x0020); in rtl8168e_2_hw_phy_config()
3246 rtl_w0w1_phy(tp, 0x15, 0x0100, 0x0000); in rtl8168e_2_hw_phy_config()
3247 rtl_writephy(tp, 0x1f, 0x0002); in rtl8168e_2_hw_phy_config()
3248 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168e_2_hw_phy_config()
3249 rtl_writephy(tp, 0x0d, 0x0007); in rtl8168e_2_hw_phy_config()
3250 rtl_writephy(tp, 0x0e, 0x003c); in rtl8168e_2_hw_phy_config()
3251 rtl_writephy(tp, 0x0d, 0x4007); in rtl8168e_2_hw_phy_config()
3252 rtl_writephy(tp, 0x0e, 0x0006); in rtl8168e_2_hw_phy_config()
3253 rtl_writephy(tp, 0x0d, 0x0000); in rtl8168e_2_hw_phy_config()
3256 rtl_writephy(tp, 0x1f, 0x0003); in rtl8168e_2_hw_phy_config()
3257 rtl_w0w1_phy(tp, 0x19, 0x0001, 0x0000); in rtl8168e_2_hw_phy_config()
3258 rtl_w0w1_phy(tp, 0x10, 0x0400, 0x0000); in rtl8168e_2_hw_phy_config()
3259 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168e_2_hw_phy_config()
3260 rtl_writephy(tp, 0x1f, 0x0005); in rtl8168e_2_hw_phy_config()
3261 rtl_w0w1_phy(tp, 0x01, 0x0100, 0x0000); in rtl8168e_2_hw_phy_config()
3262 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168e_2_hw_phy_config()
3271 rtl_writephy(tp, 0x1f, 0x0005); in rtl8168f_hw_phy_config()
3272 rtl_writephy(tp, 0x05, 0x8b80); in rtl8168f_hw_phy_config()
3273 rtl_w0w1_phy(tp, 0x06, 0x0006, 0x0000); in rtl8168f_hw_phy_config()
3274 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168f_hw_phy_config()
3277 rtl_writephy(tp, 0x1f, 0x0007); in rtl8168f_hw_phy_config()
3278 rtl_writephy(tp, 0x1e, 0x002d); in rtl8168f_hw_phy_config()
3279 rtl_w0w1_phy(tp, 0x18, 0x0010, 0x0000); in rtl8168f_hw_phy_config()
3280 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168f_hw_phy_config()
3281 rtl_w0w1_phy(tp, 0x14, 0x8000, 0x0000); in rtl8168f_hw_phy_config()
3284 rtl_writephy(tp, 0x1f, 0x0005); in rtl8168f_hw_phy_config()
3285 rtl_writephy(tp, 0x05, 0x8b86); in rtl8168f_hw_phy_config()
3286 rtl_w0w1_phy(tp, 0x06, 0x0001, 0x0000); in rtl8168f_hw_phy_config()
3287 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168f_hw_phy_config()
3294 { 0x1f, 0x0003 }, in rtl8168f_1_hw_phy_config()
3295 { 0x09, 0xa20f }, in rtl8168f_1_hw_phy_config()
3296 { 0x1f, 0x0000 }, in rtl8168f_1_hw_phy_config()
3299 { 0x1f, 0x0005 }, in rtl8168f_1_hw_phy_config()
3300 { 0x05, 0x8b55 }, in rtl8168f_1_hw_phy_config()
3301 { 0x06, 0x0000 }, in rtl8168f_1_hw_phy_config()
3302 { 0x05, 0x8b5e }, in rtl8168f_1_hw_phy_config()
3303 { 0x06, 0x0000 }, in rtl8168f_1_hw_phy_config()
3304 { 0x05, 0x8b67 }, in rtl8168f_1_hw_phy_config()
3305 { 0x06, 0x0000 }, in rtl8168f_1_hw_phy_config()
3306 { 0x05, 0x8b70 }, in rtl8168f_1_hw_phy_config()
3307 { 0x06, 0x0000 }, in rtl8168f_1_hw_phy_config()
3308 { 0x1f, 0x0000 }, in rtl8168f_1_hw_phy_config()
3309 { 0x1f, 0x0007 }, in rtl8168f_1_hw_phy_config()
3310 { 0x1e, 0x0078 }, in rtl8168f_1_hw_phy_config()
3311 { 0x17, 0x0000 }, in rtl8168f_1_hw_phy_config()
3312 { 0x19, 0x00fb }, in rtl8168f_1_hw_phy_config()
3313 { 0x1f, 0x0000 }, in rtl8168f_1_hw_phy_config()
3316 { 0x1f, 0x0005 }, in rtl8168f_1_hw_phy_config()
3317 { 0x05, 0x8b79 }, in rtl8168f_1_hw_phy_config()
3318 { 0x06, 0xaa00 }, in rtl8168f_1_hw_phy_config()
3319 { 0x1f, 0x0000 }, in rtl8168f_1_hw_phy_config()
3322 { 0x1f, 0x0003 }, in rtl8168f_1_hw_phy_config()
3323 { 0x01, 0x328a }, in rtl8168f_1_hw_phy_config()
3324 { 0x1f, 0x0000 } in rtl8168f_1_hw_phy_config()
3334 rtl_writephy(tp, 0x1f, 0x0005); in rtl8168f_1_hw_phy_config()
3335 rtl_writephy(tp, 0x05, 0x8b85); in rtl8168f_1_hw_phy_config()
3336 rtl_w0w1_phy(tp, 0x06, 0x4000, 0x0000); in rtl8168f_1_hw_phy_config()
3337 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168f_1_hw_phy_config()
3351 { 0x1f, 0x0003 }, in rtl8411_hw_phy_config()
3352 { 0x09, 0xa20f }, in rtl8411_hw_phy_config()
3353 { 0x1f, 0x0000 }, in rtl8411_hw_phy_config()
3356 { 0x1f, 0x0005 }, in rtl8411_hw_phy_config()
3357 { 0x05, 0x8b55 }, in rtl8411_hw_phy_config()
3358 { 0x06, 0x0000 }, in rtl8411_hw_phy_config()
3359 { 0x05, 0x8b5e }, in rtl8411_hw_phy_config()
3360 { 0x06, 0x0000 }, in rtl8411_hw_phy_config()
3361 { 0x05, 0x8b67 }, in rtl8411_hw_phy_config()
3362 { 0x06, 0x0000 }, in rtl8411_hw_phy_config()
3363 { 0x05, 0x8b70 }, in rtl8411_hw_phy_config()
3364 { 0x06, 0x0000 }, in rtl8411_hw_phy_config()
3365 { 0x1f, 0x0000 }, in rtl8411_hw_phy_config()
3366 { 0x1f, 0x0007 }, in rtl8411_hw_phy_config()
3367 { 0x1e, 0x0078 }, in rtl8411_hw_phy_config()
3368 { 0x17, 0x0000 }, in rtl8411_hw_phy_config()
3369 { 0x19, 0x00aa }, in rtl8411_hw_phy_config()
3370 { 0x1f, 0x0000 }, in rtl8411_hw_phy_config()
3373 { 0x1f, 0x0005 }, in rtl8411_hw_phy_config()
3374 { 0x05, 0x8b79 }, in rtl8411_hw_phy_config()
3375 { 0x06, 0xaa00 }, in rtl8411_hw_phy_config()
3376 { 0x1f, 0x0000 }, in rtl8411_hw_phy_config()
3379 { 0x1f, 0x0003 }, in rtl8411_hw_phy_config()
3380 { 0x01, 0x328a }, in rtl8411_hw_phy_config()
3381 { 0x1f, 0x0000 } in rtl8411_hw_phy_config()
3390 rtl_writephy(tp, 0x1f, 0x0005); in rtl8411_hw_phy_config()
3391 rtl_writephy(tp, 0x05, 0x8b85); in rtl8411_hw_phy_config()
3392 rtl_w0w1_phy(tp, 0x06, 0x4000, 0x0000); in rtl8411_hw_phy_config()
3393 rtl_writephy(tp, 0x1f, 0x0000); in rtl8411_hw_phy_config()
3398 rtl_writephy(tp, 0x1f, 0x0005); in rtl8411_hw_phy_config()
3399 rtl_writephy(tp, 0x05, 0x8b54); in rtl8411_hw_phy_config()
3400 rtl_w0w1_phy(tp, 0x06, 0x0000, 0x0800); in rtl8411_hw_phy_config()
3401 rtl_writephy(tp, 0x05, 0x8b5d); in rtl8411_hw_phy_config()
3402 rtl_w0w1_phy(tp, 0x06, 0x0000, 0x0800); in rtl8411_hw_phy_config()
3403 rtl_writephy(tp, 0x05, 0x8a7c); in rtl8411_hw_phy_config()
3404 rtl_w0w1_phy(tp, 0x06, 0x0000, 0x0100); in rtl8411_hw_phy_config()
3405 rtl_writephy(tp, 0x05, 0x8a7f); in rtl8411_hw_phy_config()
3406 rtl_w0w1_phy(tp, 0x06, 0x0100, 0x0000); in rtl8411_hw_phy_config()
3407 rtl_writephy(tp, 0x05, 0x8a82); in rtl8411_hw_phy_config()
3408 rtl_w0w1_phy(tp, 0x06, 0x0000, 0x0100); in rtl8411_hw_phy_config()
3409 rtl_writephy(tp, 0x05, 0x8a85); in rtl8411_hw_phy_config()
3410 rtl_w0w1_phy(tp, 0x06, 0x0000, 0x0100); in rtl8411_hw_phy_config()
3411 rtl_writephy(tp, 0x05, 0x8a88); in rtl8411_hw_phy_config()
3412 rtl_w0w1_phy(tp, 0x06, 0x0000, 0x0100); in rtl8411_hw_phy_config()
3413 rtl_writephy(tp, 0x1f, 0x0000); in rtl8411_hw_phy_config()
3416 rtl_writephy(tp, 0x1f, 0x0005); in rtl8411_hw_phy_config()
3417 rtl_writephy(tp, 0x05, 0x8b85); in rtl8411_hw_phy_config()
3418 rtl_w0w1_phy(tp, 0x06, 0x8000, 0x0000); in rtl8411_hw_phy_config()
3419 rtl_writephy(tp, 0x1f, 0x0000); in rtl8411_hw_phy_config()
3422 rtl_w0w1_eri(tp, 0x1b0, ERIAR_MASK_0001, 0x00, 0x03, ERIAR_EXGMAC); in rtl8411_hw_phy_config()
3423 rtl_writephy(tp, 0x1f, 0x0005); in rtl8411_hw_phy_config()
3424 rtl_writephy(tp, 0x05, 0x8b85); in rtl8411_hw_phy_config()
3425 rtl_w0w1_phy(tp, 0x06, 0x0000, 0x2000); in rtl8411_hw_phy_config()
3426 rtl_writephy(tp, 0x1f, 0x0004); in rtl8411_hw_phy_config()
3427 rtl_writephy(tp, 0x1f, 0x0007); in rtl8411_hw_phy_config()
3428 rtl_writephy(tp, 0x1e, 0x0020); in rtl8411_hw_phy_config()
3429 rtl_w0w1_phy(tp, 0x15, 0x0000, 0x0100); in rtl8411_hw_phy_config()
3430 rtl_writephy(tp, 0x1f, 0x0000); in rtl8411_hw_phy_config()
3431 rtl_writephy(tp, 0x0d, 0x0007); in rtl8411_hw_phy_config()
3432 rtl_writephy(tp, 0x0e, 0x003c); in rtl8411_hw_phy_config()
3433 rtl_writephy(tp, 0x0d, 0x4007); in rtl8411_hw_phy_config()
3434 rtl_writephy(tp, 0x0e, 0x0000); in rtl8411_hw_phy_config()
3435 rtl_writephy(tp, 0x0d, 0x0000); in rtl8411_hw_phy_config()
3438 rtl_writephy(tp, 0x1f, 0x0003); in rtl8411_hw_phy_config()
3439 rtl_w0w1_phy(tp, 0x19, 0x0000, 0x0001); in rtl8411_hw_phy_config()
3440 rtl_w0w1_phy(tp, 0x10, 0x0000, 0x0400); in rtl8411_hw_phy_config()
3441 rtl_writephy(tp, 0x1f, 0x0000); in rtl8411_hw_phy_config()
3448 rtl_writephy(tp, 0x1f, 0x0a46); in rtl8168g_1_hw_phy_config()
3449 if (rtl_readphy(tp, 0x10) & 0x0100) { in rtl8168g_1_hw_phy_config()
3450 rtl_writephy(tp, 0x1f, 0x0bcc); in rtl8168g_1_hw_phy_config()
3451 rtl_w0w1_phy(tp, 0x12, 0x0000, 0x8000); in rtl8168g_1_hw_phy_config()
3453 rtl_writephy(tp, 0x1f, 0x0bcc); in rtl8168g_1_hw_phy_config()
3454 rtl_w0w1_phy(tp, 0x12, 0x8000, 0x0000); in rtl8168g_1_hw_phy_config()
3457 rtl_writephy(tp, 0x1f, 0x0a46); in rtl8168g_1_hw_phy_config()
3458 if (rtl_readphy(tp, 0x13) & 0x0100) { in rtl8168g_1_hw_phy_config()
3459 rtl_writephy(tp, 0x1f, 0x0c41); in rtl8168g_1_hw_phy_config()
3460 rtl_w0w1_phy(tp, 0x15, 0x0002, 0x0000); in rtl8168g_1_hw_phy_config()
3462 rtl_writephy(tp, 0x1f, 0x0c41); in rtl8168g_1_hw_phy_config()
3463 rtl_w0w1_phy(tp, 0x15, 0x0000, 0x0002); in rtl8168g_1_hw_phy_config()
3467 rtl_writephy(tp, 0x1f, 0x0a44); in rtl8168g_1_hw_phy_config()
3468 rtl_w0w1_phy(tp, 0x11, 0x000c, 0x0000); in rtl8168g_1_hw_phy_config()
3470 rtl_writephy(tp, 0x1f, 0x0bcc); in rtl8168g_1_hw_phy_config()
3471 rtl_w0w1_phy(tp, 0x14, 0x0100, 0x0000); in rtl8168g_1_hw_phy_config()
3472 rtl_writephy(tp, 0x1f, 0x0a44); in rtl8168g_1_hw_phy_config()
3473 rtl_w0w1_phy(tp, 0x11, 0x00c0, 0x0000); in rtl8168g_1_hw_phy_config()
3474 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168g_1_hw_phy_config()
3475 rtl_writephy(tp, 0x13, 0x8084); in rtl8168g_1_hw_phy_config()
3476 rtl_w0w1_phy(tp, 0x14, 0x0000, 0x6000); in rtl8168g_1_hw_phy_config()
3477 rtl_w0w1_phy(tp, 0x10, 0x1003, 0x0000); in rtl8168g_1_hw_phy_config()
3480 rtl_writephy(tp, 0x1f, 0x0a4b); in rtl8168g_1_hw_phy_config()
3481 rtl_w0w1_phy(tp, 0x11, 0x0004, 0x0000); in rtl8168g_1_hw_phy_config()
3484 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168g_1_hw_phy_config()
3485 rtl_writephy(tp, 0x13, 0x8012); in rtl8168g_1_hw_phy_config()
3486 rtl_w0w1_phy(tp, 0x14, 0x8000, 0x0000); in rtl8168g_1_hw_phy_config()
3488 rtl_writephy(tp, 0x1f, 0x0c42); in rtl8168g_1_hw_phy_config()
3489 rtl_w0w1_phy(tp, 0x11, 0x4000, 0x2000); in rtl8168g_1_hw_phy_config()
3492 rtl_writephy(tp, 0x1f, 0x0bcd); in rtl8168g_1_hw_phy_config()
3493 rtl_writephy(tp, 0x14, 0x5065); in rtl8168g_1_hw_phy_config()
3494 rtl_writephy(tp, 0x14, 0xd065); in rtl8168g_1_hw_phy_config()
3495 rtl_writephy(tp, 0x1f, 0x0bc8); in rtl8168g_1_hw_phy_config()
3496 rtl_writephy(tp, 0x11, 0x5655); in rtl8168g_1_hw_phy_config()
3497 rtl_writephy(tp, 0x1f, 0x0bcd); in rtl8168g_1_hw_phy_config()
3498 rtl_writephy(tp, 0x14, 0x1065); in rtl8168g_1_hw_phy_config()
3499 rtl_writephy(tp, 0x14, 0x9065); in rtl8168g_1_hw_phy_config()
3500 rtl_writephy(tp, 0x14, 0x1065); in rtl8168g_1_hw_phy_config()
3503 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168g_1_hw_phy_config()
3504 if (rtl_readphy(tp, 0x10) & 0x0004) in rtl8168g_1_hw_phy_config()
3505 rtl_w0w1_phy(tp, 0x10, 0x0000, 0x0004); in rtl8168g_1_hw_phy_config()
3507 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168g_1_hw_phy_config()
3523 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168h_1_hw_phy_config()
3524 rtl_writephy(tp, 0x13, 0x809b); in rtl8168h_1_hw_phy_config()
3525 rtl_w0w1_phy(tp, 0x14, 0x8000, 0xf800); in rtl8168h_1_hw_phy_config()
3526 rtl_writephy(tp, 0x13, 0x80a2); in rtl8168h_1_hw_phy_config()
3527 rtl_w0w1_phy(tp, 0x14, 0x8000, 0xff00); in rtl8168h_1_hw_phy_config()
3528 rtl_writephy(tp, 0x13, 0x80a4); in rtl8168h_1_hw_phy_config()
3529 rtl_w0w1_phy(tp, 0x14, 0x8500, 0xff00); in rtl8168h_1_hw_phy_config()
3530 rtl_writephy(tp, 0x13, 0x809c); in rtl8168h_1_hw_phy_config()
3531 rtl_w0w1_phy(tp, 0x14, 0xbd00, 0xff00); in rtl8168h_1_hw_phy_config()
3532 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_1_hw_phy_config()
3535 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168h_1_hw_phy_config()
3536 rtl_writephy(tp, 0x13, 0x80ad); in rtl8168h_1_hw_phy_config()
3537 rtl_w0w1_phy(tp, 0x14, 0x7000, 0xf800); in rtl8168h_1_hw_phy_config()
3538 rtl_writephy(tp, 0x13, 0x80b4); in rtl8168h_1_hw_phy_config()
3539 rtl_w0w1_phy(tp, 0x14, 0x5000, 0xff00); in rtl8168h_1_hw_phy_config()
3540 rtl_writephy(tp, 0x13, 0x80ac); in rtl8168h_1_hw_phy_config()
3541 rtl_w0w1_phy(tp, 0x14, 0x4000, 0xff00); in rtl8168h_1_hw_phy_config()
3542 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_1_hw_phy_config()
3545 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168h_1_hw_phy_config()
3546 rtl_writephy(tp, 0x13, 0x808e); in rtl8168h_1_hw_phy_config()
3547 rtl_w0w1_phy(tp, 0x14, 0x1200, 0xff00); in rtl8168h_1_hw_phy_config()
3548 rtl_writephy(tp, 0x13, 0x8090); in rtl8168h_1_hw_phy_config()
3549 rtl_w0w1_phy(tp, 0x14, 0xe500, 0xff00); in rtl8168h_1_hw_phy_config()
3550 rtl_writephy(tp, 0x13, 0x8092); in rtl8168h_1_hw_phy_config()
3551 rtl_w0w1_phy(tp, 0x14, 0x9f00, 0xff00); in rtl8168h_1_hw_phy_config()
3552 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_1_hw_phy_config()
3555 dout_tapbin = 0; in rtl8168h_1_hw_phy_config()
3556 rtl_writephy(tp, 0x1f, 0x0a46); in rtl8168h_1_hw_phy_config()
3557 data = rtl_readphy(tp, 0x13); in rtl8168h_1_hw_phy_config()
3561 data = rtl_readphy(tp, 0x12); in rtl8168h_1_hw_phy_config()
3562 data &= 0xc000; in rtl8168h_1_hw_phy_config()
3565 dout_tapbin = ~(dout_tapbin^0x08); in rtl8168h_1_hw_phy_config()
3567 dout_tapbin &= 0xf000; in rtl8168h_1_hw_phy_config()
3568 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168h_1_hw_phy_config()
3569 rtl_writephy(tp, 0x13, 0x827a); in rtl8168h_1_hw_phy_config()
3570 rtl_w0w1_phy(tp, 0x14, dout_tapbin, 0xf000); in rtl8168h_1_hw_phy_config()
3571 rtl_writephy(tp, 0x13, 0x827b); in rtl8168h_1_hw_phy_config()
3572 rtl_w0w1_phy(tp, 0x14, dout_tapbin, 0xf000); in rtl8168h_1_hw_phy_config()
3573 rtl_writephy(tp, 0x13, 0x827c); in rtl8168h_1_hw_phy_config()
3574 rtl_w0w1_phy(tp, 0x14, dout_tapbin, 0xf000); in rtl8168h_1_hw_phy_config()
3575 rtl_writephy(tp, 0x13, 0x827d); in rtl8168h_1_hw_phy_config()
3576 rtl_w0w1_phy(tp, 0x14, dout_tapbin, 0xf000); in rtl8168h_1_hw_phy_config()
3578 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168h_1_hw_phy_config()
3579 rtl_writephy(tp, 0x13, 0x0811); in rtl8168h_1_hw_phy_config()
3580 rtl_w0w1_phy(tp, 0x14, 0x0800, 0x0000); in rtl8168h_1_hw_phy_config()
3581 rtl_writephy(tp, 0x1f, 0x0a42); in rtl8168h_1_hw_phy_config()
3582 rtl_w0w1_phy(tp, 0x16, 0x0002, 0x0000); in rtl8168h_1_hw_phy_config()
3583 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_1_hw_phy_config()
3586 rtl_writephy(tp, 0x1f, 0x0a44); in rtl8168h_1_hw_phy_config()
3587 rtl_w0w1_phy(tp, 0x11, 0x0800, 0x0000); in rtl8168h_1_hw_phy_config()
3588 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_1_hw_phy_config()
3591 rtl_writephy(tp, 0x1f, 0x0bca); in rtl8168h_1_hw_phy_config()
3592 rtl_w0w1_phy(tp, 0x17, 0x4000, 0x3000); in rtl8168h_1_hw_phy_config()
3593 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_1_hw_phy_config()
3595 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168h_1_hw_phy_config()
3596 rtl_writephy(tp, 0x13, 0x803f); in rtl8168h_1_hw_phy_config()
3597 rtl_w0w1_phy(tp, 0x14, 0x0000, 0x3000); in rtl8168h_1_hw_phy_config()
3598 rtl_writephy(tp, 0x13, 0x8047); in rtl8168h_1_hw_phy_config()
3599 rtl_w0w1_phy(tp, 0x14, 0x0000, 0x3000); in rtl8168h_1_hw_phy_config()
3600 rtl_writephy(tp, 0x13, 0x804f); in rtl8168h_1_hw_phy_config()
3601 rtl_w0w1_phy(tp, 0x14, 0x0000, 0x3000); in rtl8168h_1_hw_phy_config()
3602 rtl_writephy(tp, 0x13, 0x8057); in rtl8168h_1_hw_phy_config()
3603 rtl_w0w1_phy(tp, 0x14, 0x0000, 0x3000); in rtl8168h_1_hw_phy_config()
3604 rtl_writephy(tp, 0x13, 0x805f); in rtl8168h_1_hw_phy_config()
3605 rtl_w0w1_phy(tp, 0x14, 0x0000, 0x3000); in rtl8168h_1_hw_phy_config()
3606 rtl_writephy(tp, 0x13, 0x8067); in rtl8168h_1_hw_phy_config()
3607 rtl_w0w1_phy(tp, 0x14, 0x0000, 0x3000); in rtl8168h_1_hw_phy_config()
3608 rtl_writephy(tp, 0x13, 0x806f); in rtl8168h_1_hw_phy_config()
3609 rtl_w0w1_phy(tp, 0x14, 0x0000, 0x3000); in rtl8168h_1_hw_phy_config()
3610 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_1_hw_phy_config()
3613 rtl_writephy(tp, 0x1f, 0x0a44); in rtl8168h_1_hw_phy_config()
3614 rtl_w0w1_phy(tp, 0x11, 0x0000, 0x0080); in rtl8168h_1_hw_phy_config()
3615 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_1_hw_phy_config()
3618 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168h_1_hw_phy_config()
3619 if (rtl_readphy(tp, 0x10) & 0x0004) in rtl8168h_1_hw_phy_config()
3620 rtl_w0w1_phy(tp, 0x10, 0x0000, 0x0004); in rtl8168h_1_hw_phy_config()
3622 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_1_hw_phy_config()
3634 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168h_2_hw_phy_config()
3635 rtl_writephy(tp, 0x13, 0x808a); in rtl8168h_2_hw_phy_config()
3636 rtl_w0w1_phy(tp, 0x14, 0x000a, 0x003f); in rtl8168h_2_hw_phy_config()
3637 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_2_hw_phy_config()
3640 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168h_2_hw_phy_config()
3641 rtl_writephy(tp, 0x13, 0x0811); in rtl8168h_2_hw_phy_config()
3642 rtl_w0w1_phy(tp, 0x14, 0x0800, 0x0000); in rtl8168h_2_hw_phy_config()
3643 rtl_writephy(tp, 0x1f, 0x0a42); in rtl8168h_2_hw_phy_config()
3644 rtl_w0w1_phy(tp, 0x16, 0x0002, 0x0000); in rtl8168h_2_hw_phy_config()
3645 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_2_hw_phy_config()
3648 rtl_writephy(tp, 0x1f, 0x0a44); in rtl8168h_2_hw_phy_config()
3649 rtl_w0w1_phy(tp, 0x11, 0x0800, 0x0000); in rtl8168h_2_hw_phy_config()
3650 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_2_hw_phy_config()
3652 r8168_mac_ocp_write(tp, 0xdd02, 0x807d); in rtl8168h_2_hw_phy_config()
3653 data = r8168_mac_ocp_read(tp, 0xdd02); in rtl8168h_2_hw_phy_config()
3654 ioffset_p3 = ((data & 0x80)>>7); in rtl8168h_2_hw_phy_config()
3657 data = r8168_mac_ocp_read(tp, 0xdd00); in rtl8168h_2_hw_phy_config()
3658 ioffset_p3 |= ((data & (0xe000))>>13); in rtl8168h_2_hw_phy_config()
3659 ioffset_p2 = ((data & (0x1e00))>>9); in rtl8168h_2_hw_phy_config()
3660 ioffset_p1 = ((data & (0x01e0))>>5); in rtl8168h_2_hw_phy_config()
3661 ioffset_p0 = ((data & 0x0010)>>4); in rtl8168h_2_hw_phy_config()
3663 ioffset_p0 |= (data & (0x07)); in rtl8168h_2_hw_phy_config()
3666 if ((ioffset_p3 != 0x0f) || (ioffset_p2 != 0x0f) || in rtl8168h_2_hw_phy_config()
3667 (ioffset_p1 != 0x0f) || (ioffset_p0 != 0x0f)) { in rtl8168h_2_hw_phy_config()
3668 rtl_writephy(tp, 0x1f, 0x0bcf); in rtl8168h_2_hw_phy_config()
3669 rtl_writephy(tp, 0x16, data); in rtl8168h_2_hw_phy_config()
3670 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_2_hw_phy_config()
3674 rtl_writephy(tp, 0x1f, 0x0bcd); in rtl8168h_2_hw_phy_config()
3675 data = rtl_readphy(tp, 0x16); in rtl8168h_2_hw_phy_config()
3676 data &= 0x000f; in rtl8168h_2_hw_phy_config()
3677 rlen = 0; in rtl8168h_2_hw_phy_config()
3681 rtl_writephy(tp, 0x17, data); in rtl8168h_2_hw_phy_config()
3682 rtl_writephy(tp, 0x1f, 0x0bcd); in rtl8168h_2_hw_phy_config()
3683 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_2_hw_phy_config()
3686 rtl_writephy(tp, 0x1f, 0x0a44); in rtl8168h_2_hw_phy_config()
3687 rtl_w0w1_phy(tp, 0x11, 0x0000, 0x0080); in rtl8168h_2_hw_phy_config()
3688 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_2_hw_phy_config()
3691 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168h_2_hw_phy_config()
3692 if (rtl_readphy(tp, 0x10) & 0x0004) in rtl8168h_2_hw_phy_config()
3693 rtl_w0w1_phy(tp, 0x10, 0x0000, 0x0004); in rtl8168h_2_hw_phy_config()
3695 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168h_2_hw_phy_config()
3701 rtl_writephy(tp, 0x1f, 0x0a44); in rtl8168ep_1_hw_phy_config()
3702 rtl_w0w1_phy(tp, 0x11, 0x000c, 0x0000); in rtl8168ep_1_hw_phy_config()
3703 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168ep_1_hw_phy_config()
3706 rtl_writephy(tp, 0x1f, 0x0bcc); in rtl8168ep_1_hw_phy_config()
3707 rtl_w0w1_phy(tp, 0x14, 0x0000, 0x0100); in rtl8168ep_1_hw_phy_config()
3708 rtl_writephy(tp, 0x1f, 0x0a44); in rtl8168ep_1_hw_phy_config()
3709 rtl_w0w1_phy(tp, 0x11, 0x00c0, 0x0000); in rtl8168ep_1_hw_phy_config()
3710 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168ep_1_hw_phy_config()
3711 rtl_writephy(tp, 0x13, 0x8084); in rtl8168ep_1_hw_phy_config()
3712 rtl_w0w1_phy(tp, 0x14, 0x0000, 0x6000); in rtl8168ep_1_hw_phy_config()
3713 rtl_w0w1_phy(tp, 0x10, 0x1003, 0x0000); in rtl8168ep_1_hw_phy_config()
3714 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168ep_1_hw_phy_config()
3717 rtl_writephy(tp, 0x1f, 0x0a4b); in rtl8168ep_1_hw_phy_config()
3718 rtl_w0w1_phy(tp, 0x11, 0x0004, 0x0000); in rtl8168ep_1_hw_phy_config()
3719 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168ep_1_hw_phy_config()
3722 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168ep_1_hw_phy_config()
3723 rtl_writephy(tp, 0x13, 0x8012); in rtl8168ep_1_hw_phy_config()
3724 rtl_w0w1_phy(tp, 0x14, 0x8000, 0x0000); in rtl8168ep_1_hw_phy_config()
3725 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168ep_1_hw_phy_config()
3728 rtl_writephy(tp, 0x1f, 0x0c42); in rtl8168ep_1_hw_phy_config()
3729 rtl_w0w1_phy(tp, 0x11, 0x4000, 0x2000); in rtl8168ep_1_hw_phy_config()
3730 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168ep_1_hw_phy_config()
3733 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168ep_1_hw_phy_config()
3734 if (rtl_readphy(tp, 0x10) & 0x0004) in rtl8168ep_1_hw_phy_config()
3735 rtl_w0w1_phy(tp, 0x10, 0x0000, 0x0004); in rtl8168ep_1_hw_phy_config()
3737 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168ep_1_hw_phy_config()
3743 rtl_writephy(tp, 0x1f, 0x0bcc); in rtl8168ep_2_hw_phy_config()
3744 rtl_w0w1_phy(tp, 0x14, 0x0000, 0x0100); in rtl8168ep_2_hw_phy_config()
3745 rtl_writephy(tp, 0x1f, 0x0a44); in rtl8168ep_2_hw_phy_config()
3746 rtl_w0w1_phy(tp, 0x11, 0x00c0, 0x0000); in rtl8168ep_2_hw_phy_config()
3747 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168ep_2_hw_phy_config()
3748 rtl_writephy(tp, 0x13, 0x8084); in rtl8168ep_2_hw_phy_config()
3749 rtl_w0w1_phy(tp, 0x14, 0x0000, 0x6000); in rtl8168ep_2_hw_phy_config()
3750 rtl_w0w1_phy(tp, 0x10, 0x1003, 0x0000); in rtl8168ep_2_hw_phy_config()
3751 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168ep_2_hw_phy_config()
3754 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168ep_2_hw_phy_config()
3755 rtl_writephy(tp, 0x13, 0x8012); in rtl8168ep_2_hw_phy_config()
3756 rtl_w0w1_phy(tp, 0x14, 0x8000, 0x0000); in rtl8168ep_2_hw_phy_config()
3757 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168ep_2_hw_phy_config()
3760 rtl_writephy(tp, 0x1f, 0x0c42); in rtl8168ep_2_hw_phy_config()
3761 rtl_w0w1_phy(tp, 0x11, 0x4000, 0x2000); in rtl8168ep_2_hw_phy_config()
3762 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168ep_2_hw_phy_config()
3765 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168ep_2_hw_phy_config()
3766 rtl_writephy(tp, 0x13, 0x80f3); in rtl8168ep_2_hw_phy_config()
3767 rtl_w0w1_phy(tp, 0x14, 0x8b00, ~0x8bff); in rtl8168ep_2_hw_phy_config()
3768 rtl_writephy(tp, 0x13, 0x80f0); in rtl8168ep_2_hw_phy_config()
3769 rtl_w0w1_phy(tp, 0x14, 0x3a00, ~0x3aff); in rtl8168ep_2_hw_phy_config()
3770 rtl_writephy(tp, 0x13, 0x80ef); in rtl8168ep_2_hw_phy_config()
3771 rtl_w0w1_phy(tp, 0x14, 0x0500, ~0x05ff); in rtl8168ep_2_hw_phy_config()
3772 rtl_writephy(tp, 0x13, 0x80f6); in rtl8168ep_2_hw_phy_config()
3773 rtl_w0w1_phy(tp, 0x14, 0x6e00, ~0x6eff); in rtl8168ep_2_hw_phy_config()
3774 rtl_writephy(tp, 0x13, 0x80ec); in rtl8168ep_2_hw_phy_config()
3775 rtl_w0w1_phy(tp, 0x14, 0x6800, ~0x68ff); in rtl8168ep_2_hw_phy_config()
3776 rtl_writephy(tp, 0x13, 0x80ed); in rtl8168ep_2_hw_phy_config()
3777 rtl_w0w1_phy(tp, 0x14, 0x7c00, ~0x7cff); in rtl8168ep_2_hw_phy_config()
3778 rtl_writephy(tp, 0x13, 0x80f2); in rtl8168ep_2_hw_phy_config()
3779 rtl_w0w1_phy(tp, 0x14, 0xf400, ~0xf4ff); in rtl8168ep_2_hw_phy_config()
3780 rtl_writephy(tp, 0x13, 0x80f4); in rtl8168ep_2_hw_phy_config()
3781 rtl_w0w1_phy(tp, 0x14, 0x8500, ~0x85ff); in rtl8168ep_2_hw_phy_config()
3782 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168ep_2_hw_phy_config()
3783 rtl_writephy(tp, 0x13, 0x8110); in rtl8168ep_2_hw_phy_config()
3784 rtl_w0w1_phy(tp, 0x14, 0xa800, ~0xa8ff); in rtl8168ep_2_hw_phy_config()
3785 rtl_writephy(tp, 0x13, 0x810f); in rtl8168ep_2_hw_phy_config()
3786 rtl_w0w1_phy(tp, 0x14, 0x1d00, ~0x1dff); in rtl8168ep_2_hw_phy_config()
3787 rtl_writephy(tp, 0x13, 0x8111); in rtl8168ep_2_hw_phy_config()
3788 rtl_w0w1_phy(tp, 0x14, 0xf500, ~0xf5ff); in rtl8168ep_2_hw_phy_config()
3789 rtl_writephy(tp, 0x13, 0x8113); in rtl8168ep_2_hw_phy_config()
3790 rtl_w0w1_phy(tp, 0x14, 0x6100, ~0x61ff); in rtl8168ep_2_hw_phy_config()
3791 rtl_writephy(tp, 0x13, 0x8115); in rtl8168ep_2_hw_phy_config()
3792 rtl_w0w1_phy(tp, 0x14, 0x9200, ~0x92ff); in rtl8168ep_2_hw_phy_config()
3793 rtl_writephy(tp, 0x13, 0x810e); in rtl8168ep_2_hw_phy_config()
3794 rtl_w0w1_phy(tp, 0x14, 0x0400, ~0x04ff); in rtl8168ep_2_hw_phy_config()
3795 rtl_writephy(tp, 0x13, 0x810c); in rtl8168ep_2_hw_phy_config()
3796 rtl_w0w1_phy(tp, 0x14, 0x7c00, ~0x7cff); in rtl8168ep_2_hw_phy_config()
3797 rtl_writephy(tp, 0x13, 0x810b); in rtl8168ep_2_hw_phy_config()
3798 rtl_w0w1_phy(tp, 0x14, 0x5a00, ~0x5aff); in rtl8168ep_2_hw_phy_config()
3799 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168ep_2_hw_phy_config()
3800 rtl_writephy(tp, 0x13, 0x80d1); in rtl8168ep_2_hw_phy_config()
3801 rtl_w0w1_phy(tp, 0x14, 0xff00, ~0xffff); in rtl8168ep_2_hw_phy_config()
3802 rtl_writephy(tp, 0x13, 0x80cd); in rtl8168ep_2_hw_phy_config()
3803 rtl_w0w1_phy(tp, 0x14, 0x9e00, ~0x9eff); in rtl8168ep_2_hw_phy_config()
3804 rtl_writephy(tp, 0x13, 0x80d3); in rtl8168ep_2_hw_phy_config()
3805 rtl_w0w1_phy(tp, 0x14, 0x0e00, ~0x0eff); in rtl8168ep_2_hw_phy_config()
3806 rtl_writephy(tp, 0x13, 0x80d5); in rtl8168ep_2_hw_phy_config()
3807 rtl_w0w1_phy(tp, 0x14, 0xca00, ~0xcaff); in rtl8168ep_2_hw_phy_config()
3808 rtl_writephy(tp, 0x13, 0x80d7); in rtl8168ep_2_hw_phy_config()
3809 rtl_w0w1_phy(tp, 0x14, 0x8400, ~0x84ff); in rtl8168ep_2_hw_phy_config()
3812 rtl_writephy(tp, 0x1f, 0x0bcd); in rtl8168ep_2_hw_phy_config()
3813 rtl_writephy(tp, 0x14, 0x5065); in rtl8168ep_2_hw_phy_config()
3814 rtl_writephy(tp, 0x14, 0xd065); in rtl8168ep_2_hw_phy_config()
3815 rtl_writephy(tp, 0x1f, 0x0bc8); in rtl8168ep_2_hw_phy_config()
3816 rtl_writephy(tp, 0x12, 0x00ed); in rtl8168ep_2_hw_phy_config()
3817 rtl_writephy(tp, 0x1f, 0x0bcd); in rtl8168ep_2_hw_phy_config()
3818 rtl_writephy(tp, 0x14, 0x1065); in rtl8168ep_2_hw_phy_config()
3819 rtl_writephy(tp, 0x14, 0x9065); in rtl8168ep_2_hw_phy_config()
3820 rtl_writephy(tp, 0x14, 0x1065); in rtl8168ep_2_hw_phy_config()
3821 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168ep_2_hw_phy_config()
3824 rtl_writephy(tp, 0x1f, 0x0a43); in rtl8168ep_2_hw_phy_config()
3825 if (rtl_readphy(tp, 0x10) & 0x0004) in rtl8168ep_2_hw_phy_config()
3826 rtl_w0w1_phy(tp, 0x10, 0x0000, 0x0004); in rtl8168ep_2_hw_phy_config()
3828 rtl_writephy(tp, 0x1f, 0x0000); in rtl8168ep_2_hw_phy_config()
3834 { 0x1f, 0x0003 }, in rtl8102e_hw_phy_config()
3835 { 0x08, 0x441d }, in rtl8102e_hw_phy_config()
3836 { 0x01, 0x9100 }, in rtl8102e_hw_phy_config()
3837 { 0x1f, 0x0000 } in rtl8102e_hw_phy_config()
3840 rtl_writephy(tp, 0x1f, 0x0000); in rtl8102e_hw_phy_config()
3841 rtl_patchphy(tp, 0x11, 1 << 12); in rtl8102e_hw_phy_config()
3842 rtl_patchphy(tp, 0x19, 1 << 13); in rtl8102e_hw_phy_config()
3843 rtl_patchphy(tp, 0x10, 1 << 15); in rtl8102e_hw_phy_config()
3851 { 0x1f, 0x0005 }, in rtl8105e_hw_phy_config()
3852 { 0x1a, 0x0000 }, in rtl8105e_hw_phy_config()
3853 { 0x1f, 0x0000 }, in rtl8105e_hw_phy_config()
3855 { 0x1f, 0x0004 }, in rtl8105e_hw_phy_config()
3856 { 0x1c, 0x0000 }, in rtl8105e_hw_phy_config()
3857 { 0x1f, 0x0000 }, in rtl8105e_hw_phy_config()
3859 { 0x1f, 0x0001 }, in rtl8105e_hw_phy_config()
3860 { 0x15, 0x7701 }, in rtl8105e_hw_phy_config()
3861 { 0x1f, 0x0000 } in rtl8105e_hw_phy_config()
3865 rtl_writephy(tp, 0x1f, 0x0000); in rtl8105e_hw_phy_config()
3866 rtl_writephy(tp, 0x18, 0x0310); in rtl8105e_hw_phy_config()
3877 rtl_writephy(tp, 0x1f, 0x0000); in rtl8402_hw_phy_config()
3878 rtl_writephy(tp, 0x18, 0x0310); in rtl8402_hw_phy_config()
3884 rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl8402_hw_phy_config()
3885 rtl_writephy(tp, 0x1f, 0x0004); in rtl8402_hw_phy_config()
3886 rtl_writephy(tp, 0x10, 0x401f); in rtl8402_hw_phy_config()
3887 rtl_writephy(tp, 0x19, 0x7030); in rtl8402_hw_phy_config()
3888 rtl_writephy(tp, 0x1f, 0x0000); in rtl8402_hw_phy_config()
3894 { 0x1f, 0x0004 }, in rtl8106e_hw_phy_config()
3895 { 0x10, 0xc07f }, in rtl8106e_hw_phy_config()
3896 { 0x19, 0x7030 }, in rtl8106e_hw_phy_config()
3897 { 0x1f, 0x0000 } in rtl8106e_hw_phy_config()
3901 rtl_writephy(tp, 0x1f, 0x0000); in rtl8106e_hw_phy_config()
3902 rtl_writephy(tp, 0x18, 0x0310); in rtl8106e_hw_phy_config()
3907 rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl8106e_hw_phy_config()
3910 rtl_eri_write(tp, 0x1d0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl8106e_hw_phy_config()
4062 "Set MAC Reg C+CR Offset 0x82h = 0x01h\n"); in rtl8169_init_phy()
4063 RTL_W8(tp, 0x82, 0x01); in rtl8169_init_phy()
4066 pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40); in rtl8169_init_phy()
4069 pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08); in rtl8169_init_phy()
4073 "Set MAC Reg C+CR Offset 0x82h = 0x01h\n"); in rtl8169_init_phy()
4074 RTL_W8(tp, 0x82, 0x01); in rtl8169_init_phy()
4076 "Set PHY Reg 0x0bh = 0x00h\n"); in rtl8169_init_phy()
4077 rtl_writephy(tp, 0x0b, 0x0000); //w 0x0b 15 0 0 in rtl8169_init_phy()
4103 RTL_W32(tp, MAC0, addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24); in rtl_rar_set()
4156 return 0; in rtl_set_mac_address()
4219 phydev = mdiobus_get_phy(tp->mii_bus, 0); in rtl_wol_pll_power_down()
4234 rtl_ephy_write(tp, 0x19, 0xff64); in r8168_pll_power_down()
4251 RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~0x80); in r8168_pll_power_down()
4256 rtl_w0w1_eri(tp, 0x1a8, ERIAR_MASK_1111, 0x00000000, in r8168_pll_power_down()
4257 0xfc000000, ERIAR_EXGMAC); in r8168_pll_power_down()
4258 RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~0x80); in r8168_pll_power_down()
4270 RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | 0x80); in r8168_pll_power_up()
4279 RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | 0xc0); in r8168_pll_power_up()
4284 RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | 0xc0); in r8168_pll_power_up()
4285 rtl_w0w1_eri(tp, 0x1a8, ERIAR_MASK_1111, 0xfc000000, in r8168_pll_power_up()
4286 0x00000000, ERIAR_EXGMAC); in r8168_pll_power_up()
4319 tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0; in rtl8169_init_ring_indexes()
4366 RTL_W8(tp, MaxTxPacketSize, 0x3f); in r8168e_hw_jumbo_enable()
4368 RTL_W8(tp, Config4, RTL_R8(tp, Config4) | 0x01); in r8168e_hw_jumbo_enable()
4374 RTL_W8(tp, MaxTxPacketSize, 0x0c); in r8168e_hw_jumbo_disable()
4376 RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~0x01); in r8168e_hw_jumbo_disable()
4396 RTL_W8(tp, Config4, RTL_R8(tp, Config4) | (1 << 0)); in r8168b_1_hw_jumbo_enable()
4403 RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0)); in r8168b_1_hw_jumbo_disable()
4484 if (rc < 0) in rtl_request_uncached_firmware()
4488 if (rc < 0) in rtl_request_uncached_firmware()
4593 { RTL_GIGA_MAC_VER_05, PCI_Clock_33MHz, 0x000fff00 }, // 8110SCd in rtl8169_set_magic_reg()
4594 { RTL_GIGA_MAC_VER_05, PCI_Clock_66MHz, 0x000fffff }, in rtl8169_set_magic_reg()
4595 { RTL_GIGA_MAC_VER_06, PCI_Clock_33MHz, 0x00ffff00 }, // 8110SCe in rtl8169_set_magic_reg()
4596 { RTL_GIGA_MAC_VER_06, PCI_Clock_66MHz, 0x00ffffff } in rtl8169_set_magic_reg()
4603 for (i = 0; i < ARRAY_SIZE(cfg2_info); i++, p++) { in rtl8169_set_magic_reg()
4605 RTL_W32(tp, 0x7c, p->val); in rtl8169_set_magic_reg()
4616 u32 tmp = 0; in rtl_set_rx_mode()
4624 mc_filter[1] = mc_filter[0] = 0xffffffff; in rtl_set_rx_mode()
4629 mc_filter[1] = mc_filter[0] = 0xffffffff; in rtl_set_rx_mode()
4634 mc_filter[1] = mc_filter[0] = 0; in rtl_set_rx_mode()
4648 u32 data = mc_filter[0]; in rtl_set_rx_mode()
4650 mc_filter[0] = swab32(mc_filter[1]); in rtl_set_rx_mode()
4655 mc_filter[1] = mc_filter[0] = 0xffffffff; in rtl_set_rx_mode()
4658 RTL_W32(tp, MAR0 + 0, mc_filter[0]); in rtl_set_rx_mode()
4681 RTL_W16(tp, MultiIntr, RTL_R16(tp, MultiIntr) & 0xf000); in rtl_hw_start()
4688 pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08); in rtl_hw_start_8169()
4697 "Set MAC Reg C+CR Offset 0xe0. Bit 3 and Bit 14 MUST be 1\n"); in rtl_hw_start_8169()
4709 RTL_W16(tp, IntrMitigate, 0x0000); in rtl_hw_start_8169()
4711 RTL_W32(tp, RxMissed, 0); in rtl_hw_start_8169()
4738 RTL_R32(tp, CSIDR) : ~0; in rtl_csi_read()
4746 /* According to Realtek the value at config space address 0x070f in rtl_csi_access_enable()
4750 if (pdev->cfg_size > 0x070f && in rtl_csi_access_enable()
4751 pci_write_config_byte(pdev, 0x070f, val) == PCIBIOS_SUCCESSFUL) in rtl_csi_access_enable()
4756 csi = rtl_csi_read(tp, 0x070c) & 0x00ffffff; in rtl_csi_access_enable()
4757 rtl_csi_write(tp, 0x070c, csi | val << 24); in rtl_csi_access_enable()
4762 rtl_csi_access_enable(tp, 0x27); in rtl_set_def_aspm_entry_latency()
4776 while (len-- > 0) { in rtl_ephy_init()
4841 RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0)); in rtl_hw_start_8168bef()
4862 { 0x01, 0, 0x0001 }, in rtl_hw_start_8168cp_1()
4863 { 0x02, 0x0800, 0x1000 }, in rtl_hw_start_8168cp_1()
4864 { 0x03, 0, 0x0042 }, in rtl_hw_start_8168cp_1()
4865 { 0x06, 0x0080, 0x0000 }, in rtl_hw_start_8168cp_1()
4866 { 0x07, 0, 0x2000 } in rtl_hw_start_8168cp_1()
4896 RTL_W8(tp, DBG_REG, 0x20); in rtl_hw_start_8168cp_3()
4910 { 0x02, 0x0800, 0x1000 }, in rtl_hw_start_8168c_1()
4911 { 0x03, 0, 0x0002 }, in rtl_hw_start_8168c_1()
4912 { 0x06, 0x0080, 0x0000 } in rtl_hw_start_8168c_1()
4917 RTL_W8(tp, DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2); in rtl_hw_start_8168c_1()
4927 { 0x01, 0, 0x0001 }, in rtl_hw_start_8168c_2()
4928 { 0x03, 0x0400, 0x0220 } in rtl_hw_start_8168c_2()
4980 { 0x0b, 0x0000, 0x0048 }, in rtl_hw_start_8168d_4()
4981 { 0x19, 0x0020, 0x0050 }, in rtl_hw_start_8168d_4()
4982 { 0x0c, 0x0100, 0x0020 } in rtl_hw_start_8168d_4()
4999 { 0x00, 0x0200, 0x0100 }, in rtl_hw_start_8168e_1()
5000 { 0x00, 0x0000, 0x0004 }, in rtl_hw_start_8168e_1()
5001 { 0x06, 0x0002, 0x0001 }, in rtl_hw_start_8168e_1()
5002 { 0x06, 0x0000, 0x0030 }, in rtl_hw_start_8168e_1()
5003 { 0x07, 0x0000, 0x2000 }, in rtl_hw_start_8168e_1()
5004 { 0x00, 0x0000, 0x0020 }, in rtl_hw_start_8168e_1()
5005 { 0x03, 0x5800, 0x2000 }, in rtl_hw_start_8168e_1()
5006 { 0x03, 0x0000, 0x0001 }, in rtl_hw_start_8168e_1()
5007 { 0x01, 0x0800, 0x1000 }, in rtl_hw_start_8168e_1()
5008 { 0x07, 0x0000, 0x4000 }, in rtl_hw_start_8168e_1()
5009 { 0x1e, 0x0000, 0x2000 }, in rtl_hw_start_8168e_1()
5010 { 0x19, 0xffff, 0xfe6c }, in rtl_hw_start_8168e_1()
5011 { 0x0a, 0x0000, 0x0040 } in rtl_hw_start_8168e_1()
5035 { 0x09, 0x0000, 0x0080 }, in rtl_hw_start_8168e_2()
5036 { 0x19, 0x0000, 0x0224 } in rtl_hw_start_8168e_2()
5046 rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl_hw_start_8168e_2()
5047 rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl_hw_start_8168e_2()
5048 rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00100002, ERIAR_EXGMAC); in rtl_hw_start_8168e_2()
5049 rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC); in rtl_hw_start_8168e_2()
5050 rtl_eri_write(tp, 0xcc, ERIAR_MASK_1111, 0x00000050, ERIAR_EXGMAC); in rtl_hw_start_8168e_2()
5051 rtl_eri_write(tp, 0xd0, ERIAR_MASK_1111, 0x07ff0060, ERIAR_EXGMAC); in rtl_hw_start_8168e_2()
5052 rtl_w0w1_eri(tp, 0x1b0, ERIAR_MASK_0001, 0x10, 0x00, ERIAR_EXGMAC); in rtl_hw_start_8168e_2()
5053 rtl_w0w1_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0xff00, ERIAR_EXGMAC); in rtl_hw_start_8168e_2()
5062 RTL_W8(tp, EEE_LED, RTL_R8(tp, EEE_LED) & ~0x07); in rtl_hw_start_8168e_2()
5077 rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl_hw_start_8168f()
5078 rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl_hw_start_8168f()
5079 rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00100002, ERIAR_EXGMAC); in rtl_hw_start_8168f()
5080 rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC); in rtl_hw_start_8168f()
5081 rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC); in rtl_hw_start_8168f()
5082 rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC); in rtl_hw_start_8168f()
5083 rtl_w0w1_eri(tp, 0x1b0, ERIAR_MASK_0001, 0x10, 0x00, ERIAR_EXGMAC); in rtl_hw_start_8168f()
5084 rtl_w0w1_eri(tp, 0x1d0, ERIAR_MASK_0001, 0x10, 0x00, ERIAR_EXGMAC); in rtl_hw_start_8168f()
5085 rtl_eri_write(tp, 0xcc, ERIAR_MASK_1111, 0x00000050, ERIAR_EXGMAC); in rtl_hw_start_8168f()
5086 rtl_eri_write(tp, 0xd0, ERIAR_MASK_1111, 0x00000060, ERIAR_EXGMAC); in rtl_hw_start_8168f()
5101 { 0x06, 0x00c0, 0x0020 }, in rtl_hw_start_8168f_1()
5102 { 0x08, 0x0001, 0x0002 }, in rtl_hw_start_8168f_1()
5103 { 0x09, 0x0000, 0x0080 }, in rtl_hw_start_8168f_1()
5104 { 0x19, 0x0000, 0x0224 } in rtl_hw_start_8168f_1()
5111 rtl_w0w1_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0xff00, ERIAR_EXGMAC); in rtl_hw_start_8168f_1()
5114 RTL_W8(tp, EEE_LED, RTL_R8(tp, EEE_LED) & ~0x07); in rtl_hw_start_8168f_1()
5120 { 0x06, 0x00c0, 0x0020 }, in rtl_hw_start_8411()
5121 { 0x0f, 0xffff, 0x5200 }, in rtl_hw_start_8411()
5122 { 0x1e, 0x0000, 0x4000 }, in rtl_hw_start_8411()
5123 { 0x19, 0x0000, 0x0224 } in rtl_hw_start_8411()
5131 rtl_w0w1_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0x0000, ERIAR_EXGMAC); in rtl_hw_start_8411()
5136 rtl_eri_write(tp, 0xc8, ERIAR_MASK_0101, 0x080002, ERIAR_EXGMAC); in rtl_hw_start_8168g()
5137 rtl_eri_write(tp, 0xcc, ERIAR_MASK_0001, 0x38, ERIAR_EXGMAC); in rtl_hw_start_8168g()
5138 rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x48, ERIAR_EXGMAC); in rtl_hw_start_8168g()
5139 rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC); in rtl_hw_start_8168g()
5145 rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC); in rtl_hw_start_8168g()
5146 rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC); in rtl_hw_start_8168g()
5147 rtl_eri_write(tp, 0x2f8, ERIAR_MASK_0011, 0x1d8f, ERIAR_EXGMAC); in rtl_hw_start_8168g()
5152 rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl_hw_start_8168g()
5153 rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl_hw_start_8168g()
5156 RTL_W8(tp, EEE_LED, RTL_R8(tp, EEE_LED) & ~0x07); in rtl_hw_start_8168g()
5158 rtl_w0w1_eri(tp, 0x2fc, ERIAR_MASK_0001, 0x01, 0x06, ERIAR_EXGMAC); in rtl_hw_start_8168g()
5159 rtl_w0w1_eri(tp, 0x1b0, ERIAR_MASK_0011, 0x0000, 0x1000, ERIAR_EXGMAC); in rtl_hw_start_8168g()
5167 { 0x00, 0x0000, 0x0008 }, in rtl_hw_start_8168g_1()
5168 { 0x0c, 0x37d0, 0x0820 }, in rtl_hw_start_8168g_1()
5169 { 0x1e, 0x0000, 0x0001 }, in rtl_hw_start_8168g_1()
5170 { 0x19, 0x8000, 0x0000 } in rtl_hw_start_8168g_1()
5184 { 0x00, 0x0000, 0x0008 }, in rtl_hw_start_8168g_2()
5185 { 0x0c, 0x3df0, 0x0200 }, in rtl_hw_start_8168g_2()
5186 { 0x19, 0xffff, 0xfc00 }, in rtl_hw_start_8168g_2()
5187 { 0x1e, 0xffff, 0x20eb } in rtl_hw_start_8168g_2()
5201 { 0x00, 0x0000, 0x0008 }, in rtl_hw_start_8411_2()
5202 { 0x0c, 0x3df0, 0x0200 }, in rtl_hw_start_8411_2()
5203 { 0x0f, 0xffff, 0x5200 }, in rtl_hw_start_8411_2()
5204 { 0x19, 0x0020, 0x0000 }, in rtl_hw_start_8411_2()
5205 { 0x1e, 0x0000, 0x2000 } in rtl_hw_start_8411_2()
5217 r8168_mac_ocp_write(tp, 0xFC28, 0x0000); in rtl_hw_start_8411_2()
5218 r8168_mac_ocp_write(tp, 0xFC2A, 0x0000); in rtl_hw_start_8411_2()
5219 r8168_mac_ocp_write(tp, 0xFC2C, 0x0000); in rtl_hw_start_8411_2()
5220 r8168_mac_ocp_write(tp, 0xFC2E, 0x0000); in rtl_hw_start_8411_2()
5221 r8168_mac_ocp_write(tp, 0xFC30, 0x0000); in rtl_hw_start_8411_2()
5222 r8168_mac_ocp_write(tp, 0xFC32, 0x0000); in rtl_hw_start_8411_2()
5223 r8168_mac_ocp_write(tp, 0xFC34, 0x0000); in rtl_hw_start_8411_2()
5224 r8168_mac_ocp_write(tp, 0xFC36, 0x0000); in rtl_hw_start_8411_2()
5226 r8168_mac_ocp_write(tp, 0xFC26, 0x0000); in rtl_hw_start_8411_2()
5228 r8168_mac_ocp_write(tp, 0xF800, 0xE008); in rtl_hw_start_8411_2()
5229 r8168_mac_ocp_write(tp, 0xF802, 0xE00A); in rtl_hw_start_8411_2()
5230 r8168_mac_ocp_write(tp, 0xF804, 0xE00C); in rtl_hw_start_8411_2()
5231 r8168_mac_ocp_write(tp, 0xF806, 0xE00E); in rtl_hw_start_8411_2()
5232 r8168_mac_ocp_write(tp, 0xF808, 0xE027); in rtl_hw_start_8411_2()
5233 r8168_mac_ocp_write(tp, 0xF80A, 0xE04F); in rtl_hw_start_8411_2()
5234 r8168_mac_ocp_write(tp, 0xF80C, 0xE05E); in rtl_hw_start_8411_2()
5235 r8168_mac_ocp_write(tp, 0xF80E, 0xE065); in rtl_hw_start_8411_2()
5236 r8168_mac_ocp_write(tp, 0xF810, 0xC602); in rtl_hw_start_8411_2()
5237 r8168_mac_ocp_write(tp, 0xF812, 0xBE00); in rtl_hw_start_8411_2()
5238 r8168_mac_ocp_write(tp, 0xF814, 0x0000); in rtl_hw_start_8411_2()
5239 r8168_mac_ocp_write(tp, 0xF816, 0xC502); in rtl_hw_start_8411_2()
5240 r8168_mac_ocp_write(tp, 0xF818, 0xBD00); in rtl_hw_start_8411_2()
5241 r8168_mac_ocp_write(tp, 0xF81A, 0x074C); in rtl_hw_start_8411_2()
5242 r8168_mac_ocp_write(tp, 0xF81C, 0xC302); in rtl_hw_start_8411_2()
5243 r8168_mac_ocp_write(tp, 0xF81E, 0xBB00); in rtl_hw_start_8411_2()
5244 r8168_mac_ocp_write(tp, 0xF820, 0x080A); in rtl_hw_start_8411_2()
5245 r8168_mac_ocp_write(tp, 0xF822, 0x6420); in rtl_hw_start_8411_2()
5246 r8168_mac_ocp_write(tp, 0xF824, 0x48C2); in rtl_hw_start_8411_2()
5247 r8168_mac_ocp_write(tp, 0xF826, 0x8C20); in rtl_hw_start_8411_2()
5248 r8168_mac_ocp_write(tp, 0xF828, 0xC516); in rtl_hw_start_8411_2()
5249 r8168_mac_ocp_write(tp, 0xF82A, 0x64A4); in rtl_hw_start_8411_2()
5250 r8168_mac_ocp_write(tp, 0xF82C, 0x49C0); in rtl_hw_start_8411_2()
5251 r8168_mac_ocp_write(tp, 0xF82E, 0xF009); in rtl_hw_start_8411_2()
5252 r8168_mac_ocp_write(tp, 0xF830, 0x74A2); in rtl_hw_start_8411_2()
5253 r8168_mac_ocp_write(tp, 0xF832, 0x8CA5); in rtl_hw_start_8411_2()
5254 r8168_mac_ocp_write(tp, 0xF834, 0x74A0); in rtl_hw_start_8411_2()
5255 r8168_mac_ocp_write(tp, 0xF836, 0xC50E); in rtl_hw_start_8411_2()
5256 r8168_mac_ocp_write(tp, 0xF838, 0x9CA2); in rtl_hw_start_8411_2()
5257 r8168_mac_ocp_write(tp, 0xF83A, 0x1C11); in rtl_hw_start_8411_2()
5258 r8168_mac_ocp_write(tp, 0xF83C, 0x9CA0); in rtl_hw_start_8411_2()
5259 r8168_mac_ocp_write(tp, 0xF83E, 0xE006); in rtl_hw_start_8411_2()
5260 r8168_mac_ocp_write(tp, 0xF840, 0x74F8); in rtl_hw_start_8411_2()
5261 r8168_mac_ocp_write(tp, 0xF842, 0x48C4); in rtl_hw_start_8411_2()
5262 r8168_mac_ocp_write(tp, 0xF844, 0x8CF8); in rtl_hw_start_8411_2()
5263 r8168_mac_ocp_write(tp, 0xF846, 0xC404); in rtl_hw_start_8411_2()
5264 r8168_mac_ocp_write(tp, 0xF848, 0xBC00); in rtl_hw_start_8411_2()
5265 r8168_mac_ocp_write(tp, 0xF84A, 0xC403); in rtl_hw_start_8411_2()
5266 r8168_mac_ocp_write(tp, 0xF84C, 0xBC00); in rtl_hw_start_8411_2()
5267 r8168_mac_ocp_write(tp, 0xF84E, 0x0BF2); in rtl_hw_start_8411_2()
5268 r8168_mac_ocp_write(tp, 0xF850, 0x0C0A); in rtl_hw_start_8411_2()
5269 r8168_mac_ocp_write(tp, 0xF852, 0xE434); in rtl_hw_start_8411_2()
5270 r8168_mac_ocp_write(tp, 0xF854, 0xD3C0); in rtl_hw_start_8411_2()
5271 r8168_mac_ocp_write(tp, 0xF856, 0x49D9); in rtl_hw_start_8411_2()
5272 r8168_mac_ocp_write(tp, 0xF858, 0xF01F); in rtl_hw_start_8411_2()
5273 r8168_mac_ocp_write(tp, 0xF85A, 0xC526); in rtl_hw_start_8411_2()
5274 r8168_mac_ocp_write(tp, 0xF85C, 0x64A5); in rtl_hw_start_8411_2()
5275 r8168_mac_ocp_write(tp, 0xF85E, 0x1400); in rtl_hw_start_8411_2()
5276 r8168_mac_ocp_write(tp, 0xF860, 0xF007); in rtl_hw_start_8411_2()
5277 r8168_mac_ocp_write(tp, 0xF862, 0x0C01); in rtl_hw_start_8411_2()
5278 r8168_mac_ocp_write(tp, 0xF864, 0x8CA5); in rtl_hw_start_8411_2()
5279 r8168_mac_ocp_write(tp, 0xF866, 0x1C15); in rtl_hw_start_8411_2()
5280 r8168_mac_ocp_write(tp, 0xF868, 0xC51B); in rtl_hw_start_8411_2()
5281 r8168_mac_ocp_write(tp, 0xF86A, 0x9CA0); in rtl_hw_start_8411_2()
5282 r8168_mac_ocp_write(tp, 0xF86C, 0xE013); in rtl_hw_start_8411_2()
5283 r8168_mac_ocp_write(tp, 0xF86E, 0xC519); in rtl_hw_start_8411_2()
5284 r8168_mac_ocp_write(tp, 0xF870, 0x74A0); in rtl_hw_start_8411_2()
5285 r8168_mac_ocp_write(tp, 0xF872, 0x48C4); in rtl_hw_start_8411_2()
5286 r8168_mac_ocp_write(tp, 0xF874, 0x8CA0); in rtl_hw_start_8411_2()
5287 r8168_mac_ocp_write(tp, 0xF876, 0xC516); in rtl_hw_start_8411_2()
5288 r8168_mac_ocp_write(tp, 0xF878, 0x74A4); in rtl_hw_start_8411_2()
5289 r8168_mac_ocp_write(tp, 0xF87A, 0x48C8); in rtl_hw_start_8411_2()
5290 r8168_mac_ocp_write(tp, 0xF87C, 0x48CA); in rtl_hw_start_8411_2()
5291 r8168_mac_ocp_write(tp, 0xF87E, 0x9CA4); in rtl_hw_start_8411_2()
5292 r8168_mac_ocp_write(tp, 0xF880, 0xC512); in rtl_hw_start_8411_2()
5293 r8168_mac_ocp_write(tp, 0xF882, 0x1B00); in rtl_hw_start_8411_2()
5294 r8168_mac_ocp_write(tp, 0xF884, 0x9BA0); in rtl_hw_start_8411_2()
5295 r8168_mac_ocp_write(tp, 0xF886, 0x1B1C); in rtl_hw_start_8411_2()
5296 r8168_mac_ocp_write(tp, 0xF888, 0x483F); in rtl_hw_start_8411_2()
5297 r8168_mac_ocp_write(tp, 0xF88A, 0x9BA2); in rtl_hw_start_8411_2()
5298 r8168_mac_ocp_write(tp, 0xF88C, 0x1B04); in rtl_hw_start_8411_2()
5299 r8168_mac_ocp_write(tp, 0xF88E, 0xC508); in rtl_hw_start_8411_2()
5300 r8168_mac_ocp_write(tp, 0xF890, 0x9BA0); in rtl_hw_start_8411_2()
5301 r8168_mac_ocp_write(tp, 0xF892, 0xC505); in rtl_hw_start_8411_2()
5302 r8168_mac_ocp_write(tp, 0xF894, 0xBD00); in rtl_hw_start_8411_2()
5303 r8168_mac_ocp_write(tp, 0xF896, 0xC502); in rtl_hw_start_8411_2()
5304 r8168_mac_ocp_write(tp, 0xF898, 0xBD00); in rtl_hw_start_8411_2()
5305 r8168_mac_ocp_write(tp, 0xF89A, 0x0300); in rtl_hw_start_8411_2()
5306 r8168_mac_ocp_write(tp, 0xF89C, 0x051E); in rtl_hw_start_8411_2()
5307 r8168_mac_ocp_write(tp, 0xF89E, 0xE434); in rtl_hw_start_8411_2()
5308 r8168_mac_ocp_write(tp, 0xF8A0, 0xE018); in rtl_hw_start_8411_2()
5309 r8168_mac_ocp_write(tp, 0xF8A2, 0xE092); in rtl_hw_start_8411_2()
5310 r8168_mac_ocp_write(tp, 0xF8A4, 0xDE20); in rtl_hw_start_8411_2()
5311 r8168_mac_ocp_write(tp, 0xF8A6, 0xD3C0); in rtl_hw_start_8411_2()
5312 r8168_mac_ocp_write(tp, 0xF8A8, 0xC50F); in rtl_hw_start_8411_2()
5313 r8168_mac_ocp_write(tp, 0xF8AA, 0x76A4); in rtl_hw_start_8411_2()
5314 r8168_mac_ocp_write(tp, 0xF8AC, 0x49E3); in rtl_hw_start_8411_2()
5315 r8168_mac_ocp_write(tp, 0xF8AE, 0xF007); in rtl_hw_start_8411_2()
5316 r8168_mac_ocp_write(tp, 0xF8B0, 0x49C0); in rtl_hw_start_8411_2()
5317 r8168_mac_ocp_write(tp, 0xF8B2, 0xF103); in rtl_hw_start_8411_2()
5318 r8168_mac_ocp_write(tp, 0xF8B4, 0xC607); in rtl_hw_start_8411_2()
5319 r8168_mac_ocp_write(tp, 0xF8B6, 0xBE00); in rtl_hw_start_8411_2()
5320 r8168_mac_ocp_write(tp, 0xF8B8, 0xC606); in rtl_hw_start_8411_2()
5321 r8168_mac_ocp_write(tp, 0xF8BA, 0xBE00); in rtl_hw_start_8411_2()
5322 r8168_mac_ocp_write(tp, 0xF8BC, 0xC602); in rtl_hw_start_8411_2()
5323 r8168_mac_ocp_write(tp, 0xF8BE, 0xBE00); in rtl_hw_start_8411_2()
5324 r8168_mac_ocp_write(tp, 0xF8C0, 0x0C4C); in rtl_hw_start_8411_2()
5325 r8168_mac_ocp_write(tp, 0xF8C2, 0x0C28); in rtl_hw_start_8411_2()
5326 r8168_mac_ocp_write(tp, 0xF8C4, 0x0C2C); in rtl_hw_start_8411_2()
5327 r8168_mac_ocp_write(tp, 0xF8C6, 0xDC00); in rtl_hw_start_8411_2()
5328 r8168_mac_ocp_write(tp, 0xF8C8, 0xC707); in rtl_hw_start_8411_2()
5329 r8168_mac_ocp_write(tp, 0xF8CA, 0x1D00); in rtl_hw_start_8411_2()
5330 r8168_mac_ocp_write(tp, 0xF8CC, 0x8DE2); in rtl_hw_start_8411_2()
5331 r8168_mac_ocp_write(tp, 0xF8CE, 0x48C1); in rtl_hw_start_8411_2()
5332 r8168_mac_ocp_write(tp, 0xF8D0, 0xC502); in rtl_hw_start_8411_2()
5333 r8168_mac_ocp_write(tp, 0xF8D2, 0xBD00); in rtl_hw_start_8411_2()
5334 r8168_mac_ocp_write(tp, 0xF8D4, 0x00AA); in rtl_hw_start_8411_2()
5335 r8168_mac_ocp_write(tp, 0xF8D6, 0xE0C0); in rtl_hw_start_8411_2()
5336 r8168_mac_ocp_write(tp, 0xF8D8, 0xC502); in rtl_hw_start_8411_2()
5337 r8168_mac_ocp_write(tp, 0xF8DA, 0xBD00); in rtl_hw_start_8411_2()
5338 r8168_mac_ocp_write(tp, 0xF8DC, 0x0132); in rtl_hw_start_8411_2()
5340 r8168_mac_ocp_write(tp, 0xFC26, 0x8000); in rtl_hw_start_8411_2()
5342 r8168_mac_ocp_write(tp, 0xFC2A, 0x0743); in rtl_hw_start_8411_2()
5343 r8168_mac_ocp_write(tp, 0xFC2C, 0x0801); in rtl_hw_start_8411_2()
5344 r8168_mac_ocp_write(tp, 0xFC2E, 0x0BE9); in rtl_hw_start_8411_2()
5345 r8168_mac_ocp_write(tp, 0xFC30, 0x02FD); in rtl_hw_start_8411_2()
5346 r8168_mac_ocp_write(tp, 0xFC32, 0x0C25); in rtl_hw_start_8411_2()
5347 r8168_mac_ocp_write(tp, 0xFC34, 0x00A9); in rtl_hw_start_8411_2()
5348 r8168_mac_ocp_write(tp, 0xFC36, 0x012D); in rtl_hw_start_8411_2()
5358 { 0x1e, 0x0800, 0x0001 }, in rtl_hw_start_8168h_1()
5359 { 0x1d, 0x0000, 0x0800 }, in rtl_hw_start_8168h_1()
5360 { 0x05, 0xffff, 0x2089 }, in rtl_hw_start_8168h_1()
5361 { 0x06, 0xffff, 0x5881 }, in rtl_hw_start_8168h_1()
5362 { 0x04, 0xffff, 0x154a }, in rtl_hw_start_8168h_1()
5363 { 0x01, 0xffff, 0x068b } in rtl_hw_start_8168h_1()
5370 rtl_eri_write(tp, 0xc8, ERIAR_MASK_0101, 0x00080002, ERIAR_EXGMAC); in rtl_hw_start_8168h_1()
5371 rtl_eri_write(tp, 0xcc, ERIAR_MASK_0001, 0x38, ERIAR_EXGMAC); in rtl_hw_start_8168h_1()
5372 rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x48, ERIAR_EXGMAC); in rtl_hw_start_8168h_1()
5373 rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC); in rtl_hw_start_8168h_1()
5379 rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC); in rtl_hw_start_8168h_1()
5380 rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC); in rtl_hw_start_8168h_1()
5382 rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_1111, 0x0010, 0x00, ERIAR_EXGMAC); in rtl_hw_start_8168h_1()
5384 rtl_w0w1_eri(tp, 0xd4, ERIAR_MASK_1111, 0x1f00, 0x00, ERIAR_EXGMAC); in rtl_hw_start_8168h_1()
5386 rtl_eri_write(tp, 0x5f0, ERIAR_MASK_0011, 0x4f87, ERIAR_EXGMAC); in rtl_hw_start_8168h_1()
5391 rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl_hw_start_8168h_1()
5392 rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl_hw_start_8168h_1()
5395 RTL_W8(tp, EEE_LED, RTL_R8(tp, EEE_LED) & ~0x07); in rtl_hw_start_8168h_1()
5402 rtl_w0w1_eri(tp, 0x1b0, ERIAR_MASK_0011, 0x0000, 0x1000, ERIAR_EXGMAC); in rtl_hw_start_8168h_1()
5406 rtl_writephy(tp, 0x1f, 0x0c42); in rtl_hw_start_8168h_1()
5407 rg_saw_cnt = (rtl_readphy(tp, 0x13) & 0x3fff); in rtl_hw_start_8168h_1()
5408 rtl_writephy(tp, 0x1f, 0x0000); in rtl_hw_start_8168h_1()
5409 if (rg_saw_cnt > 0) { in rtl_hw_start_8168h_1()
5413 sw_cnt_1ms_ini &= 0x0fff; in rtl_hw_start_8168h_1()
5414 data = r8168_mac_ocp_read(tp, 0xd412); in rtl_hw_start_8168h_1()
5415 data &= ~0x0fff; in rtl_hw_start_8168h_1()
5417 r8168_mac_ocp_write(tp, 0xd412, data); in rtl_hw_start_8168h_1()
5420 data = r8168_mac_ocp_read(tp, 0xe056); in rtl_hw_start_8168h_1()
5421 data &= ~0xf0; in rtl_hw_start_8168h_1()
5422 data |= 0x70; in rtl_hw_start_8168h_1()
5423 r8168_mac_ocp_write(tp, 0xe056, data); in rtl_hw_start_8168h_1()
5425 data = r8168_mac_ocp_read(tp, 0xe052); in rtl_hw_start_8168h_1()
5426 data &= ~0x6000; in rtl_hw_start_8168h_1()
5427 data |= 0x8008; in rtl_hw_start_8168h_1()
5428 r8168_mac_ocp_write(tp, 0xe052, data); in rtl_hw_start_8168h_1()
5430 data = r8168_mac_ocp_read(tp, 0xe0d6); in rtl_hw_start_8168h_1()
5431 data &= ~0x01ff; in rtl_hw_start_8168h_1()
5432 data |= 0x017f; in rtl_hw_start_8168h_1()
5433 r8168_mac_ocp_write(tp, 0xe0d6, data); in rtl_hw_start_8168h_1()
5435 data = r8168_mac_ocp_read(tp, 0xd420); in rtl_hw_start_8168h_1()
5436 data &= ~0x0fff; in rtl_hw_start_8168h_1()
5437 data |= 0x047f; in rtl_hw_start_8168h_1()
5438 r8168_mac_ocp_write(tp, 0xd420, data); in rtl_hw_start_8168h_1()
5440 r8168_mac_ocp_write(tp, 0xe63e, 0x0001); in rtl_hw_start_8168h_1()
5441 r8168_mac_ocp_write(tp, 0xe63e, 0x0000); in rtl_hw_start_8168h_1()
5442 r8168_mac_ocp_write(tp, 0xc094, 0x0000); in rtl_hw_start_8168h_1()
5443 r8168_mac_ocp_write(tp, 0xc09e, 0x0000); in rtl_hw_start_8168h_1()
5452 rtl_eri_write(tp, 0xc8, ERIAR_MASK_0101, 0x00080002, ERIAR_EXGMAC); in rtl_hw_start_8168ep()
5453 rtl_eri_write(tp, 0xcc, ERIAR_MASK_0001, 0x2f, ERIAR_EXGMAC); in rtl_hw_start_8168ep()
5454 rtl_eri_write(tp, 0xd0, ERIAR_MASK_0001, 0x5f, ERIAR_EXGMAC); in rtl_hw_start_8168ep()
5455 rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00100006, ERIAR_EXGMAC); in rtl_hw_start_8168ep()
5461 rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC); in rtl_hw_start_8168ep()
5462 rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC); in rtl_hw_start_8168ep()
5464 rtl_w0w1_eri(tp, 0xd4, ERIAR_MASK_1111, 0x1f80, 0x00, ERIAR_EXGMAC); in rtl_hw_start_8168ep()
5466 rtl_eri_write(tp, 0x5f0, ERIAR_MASK_0011, 0x4f87, ERIAR_EXGMAC); in rtl_hw_start_8168ep()
5471 rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl_hw_start_8168ep()
5472 rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl_hw_start_8168ep()
5475 RTL_W8(tp, EEE_LED, RTL_R8(tp, EEE_LED) & ~0x07); in rtl_hw_start_8168ep()
5477 rtl_w0w1_eri(tp, 0x2fc, ERIAR_MASK_0001, 0x01, 0x06, ERIAR_EXGMAC); in rtl_hw_start_8168ep()
5487 { 0x00, 0xffff, 0x10ab }, in rtl_hw_start_8168ep_1()
5488 { 0x06, 0xffff, 0xf030 }, in rtl_hw_start_8168ep_1()
5489 { 0x08, 0xffff, 0x2006 }, in rtl_hw_start_8168ep_1()
5490 { 0x0d, 0xffff, 0x1666 }, in rtl_hw_start_8168ep_1()
5491 { 0x0c, 0x3ff0, 0x0000 } in rtl_hw_start_8168ep_1()
5506 { 0x00, 0xffff, 0x10a3 }, in rtl_hw_start_8168ep_2()
5507 { 0x19, 0xffff, 0xfc00 }, in rtl_hw_start_8168ep_2()
5508 { 0x1e, 0xffff, 0x20ea } in rtl_hw_start_8168ep_2()
5527 { 0x00, 0xffff, 0x10a3 }, in rtl_hw_start_8168ep_3()
5528 { 0x19, 0xffff, 0x7c00 }, in rtl_hw_start_8168ep_3()
5529 { 0x1e, 0xffff, 0x20eb }, in rtl_hw_start_8168ep_3()
5530 { 0x0d, 0xffff, 0x1666 } in rtl_hw_start_8168ep_3()
5542 data = r8168_mac_ocp_read(tp, 0xd3e2); in rtl_hw_start_8168ep_3()
5543 data &= 0xf000; in rtl_hw_start_8168ep_3()
5544 data |= 0x0271; in rtl_hw_start_8168ep_3()
5545 r8168_mac_ocp_write(tp, 0xd3e2, data); in rtl_hw_start_8168ep_3()
5547 data = r8168_mac_ocp_read(tp, 0xd3e4); in rtl_hw_start_8168ep_3()
5548 data &= 0xff00; in rtl_hw_start_8168ep_3()
5549 r8168_mac_ocp_write(tp, 0xd3e4, data); in rtl_hw_start_8168ep_3()
5551 data = r8168_mac_ocp_read(tp, 0xe860); in rtl_hw_start_8168ep_3()
5552 data |= 0x0080; in rtl_hw_start_8168ep_3()
5553 r8168_mac_ocp_write(tp, 0xe860, data); in rtl_hw_start_8168ep_3()
5566 RTL_W16(tp, IntrMitigate, 0x5100); in rtl_hw_start_8168()
5683 { 0x01, 0, 0x6e65 }, in rtl_hw_start_8102e_1()
5684 { 0x02, 0, 0x091f }, in rtl_hw_start_8102e_1()
5685 { 0x03, 0, 0xc2f9 }, in rtl_hw_start_8102e_1()
5686 { 0x06, 0, 0xafb5 }, in rtl_hw_start_8102e_1()
5687 { 0x07, 0, 0x0e00 }, in rtl_hw_start_8102e_1()
5688 { 0x19, 0, 0xec80 }, in rtl_hw_start_8102e_1()
5689 { 0x01, 0, 0x2e65 }, in rtl_hw_start_8102e_1()
5690 { 0x01, 0, 0x6e65 } in rtl_hw_start_8102e_1()
5725 rtl_ephy_write(tp, 0x03, 0xc2f9); in rtl_hw_start_8102e_3()
5731 { 0x07, 0, 0x4000 }, in rtl_hw_start_8105e_1()
5732 { 0x19, 0, 0x0200 }, in rtl_hw_start_8105e_1()
5733 { 0x19, 0, 0x0020 }, in rtl_hw_start_8105e_1()
5734 { 0x1e, 0, 0x2000 }, in rtl_hw_start_8105e_1()
5735 { 0x03, 0, 0x0001 }, in rtl_hw_start_8105e_1()
5736 { 0x19, 0, 0x0100 }, in rtl_hw_start_8105e_1()
5737 { 0x19, 0, 0x0004 }, in rtl_hw_start_8105e_1()
5738 { 0x0a, 0, 0x0020 } in rtl_hw_start_8105e_1()
5742 RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800); in rtl_hw_start_8105e_1()
5745 RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) & ~0x010000); in rtl_hw_start_8105e_1()
5758 rtl_ephy_write(tp, 0x1e, rtl_ephy_read(tp, 0x1e) | 0x8000); in rtl_hw_start_8105e_2()
5764 { 0x19, 0xffff, 0xff64 }, in rtl_hw_start_8402()
5765 { 0x1e, 0, 0x4000 } in rtl_hw_start_8402()
5771 RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800); in rtl_hw_start_8402()
5779 rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00000002, ERIAR_EXGMAC); in rtl_hw_start_8402()
5780 rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00000006, ERIAR_EXGMAC); in rtl_hw_start_8402()
5781 rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC); in rtl_hw_start_8402()
5782 rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC); in rtl_hw_start_8402()
5783 rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl_hw_start_8402()
5784 rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); in rtl_hw_start_8402()
5785 rtl_w0w1_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0e00, 0xff00, ERIAR_EXGMAC); in rtl_hw_start_8402()
5795 RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800); in rtl_hw_start_8106()
5856 RTL_W16(tp, IntrMitigate, 0x0000); in rtl_hw_start_8101()
5871 return 0; in rtl8169_change_mtu()
5876 desc->addr = cpu_to_le64(0x0badbadbadbadbadull); in rtl8169_make_unusable_by_asic()
5946 for (i = 0; i < NUM_RX_DESC; i++) { in rtl8169_rx_clear()
5963 for (i = 0; i < NUM_RX_DESC; i++) { in rtl8169_rx_fill()
5975 return 0; in rtl8169_rx_fill()
5986 memset(tp->tx_skb, 0, sizeof(tp->tx_skb)); in rtl8169_init_ring()
5987 memset(tp->Rx_databuff, 0, sizeof(tp->Rx_databuff)); in rtl8169_init_ring()
5999 desc->opts1 = 0x00; in rtl8169_unmap_tx_skb()
6000 desc->opts2 = 0x00; in rtl8169_unmap_tx_skb()
6001 desc->addr = 0x00; in rtl8169_unmap_tx_skb()
6002 tx_skb->len = 0; in rtl8169_unmap_tx_skb()
6010 for (i = 0; i < n; i++) { in rtl8169_tx_clear_range()
6031 tp->cur_tx = tp->dirty_tx = 0; in rtl8169_tx_clear()
6045 for (i = 0; i < NUM_RX_DESC; i++) in rtl_reset_work()
6072 for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) { in rtl8169_xmit_frags()
6092 status = opts[0] | len | in rtl8169_xmit_frags()
6146 if (skb_checksum_help(skb) < 0) in r8169_csum_workaround()
6170 ret = skb_cow_head(skb, 0); in msdn_giant_send_check()
6177 th->check = 0; in msdn_giant_send_check()
6178 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0); in msdn_giant_send_check()
6189 opts[0] |= TD_LSO; in rtl8169_tso_csum_v1()
6190 opts[0] |= min(mss, TD_MSS_MAX) << TD0_MSS_SHIFT; in rtl8169_tso_csum_v1()
6195 opts[0] |= TD0_IP_CS | TD0_TCP_CS; in rtl8169_tso_csum_v1()
6197 opts[0] |= TD0_IP_CS | TD0_UDP_CS; in rtl8169_tso_csum_v1()
6214 "Invalid transport offset 0x%x for TSO\n", in rtl8169_tso_csum_v2()
6221 opts[0] |= TD1_GTSENV4; in rtl8169_tso_csum_v2()
6228 opts[0] |= TD1_GTSENV6; in rtl8169_tso_csum_v2()
6236 opts[0] |= transport_offset << GTTCPHO_SHIFT; in rtl8169_tso_csum_v2()
6246 "Invalid transport offset 0x%x\n", in rtl8169_tso_csum_v2()
6304 opts[0] = DescOwn; in rtl8169_start_xmit()
6323 if (frags < 0) in rtl8169_start_xmit()
6326 opts[0] |= FirstFrag; in rtl8169_start_xmit()
6328 opts[0] |= FirstFrag | LastFrag; in rtl8169_start_xmit()
6340 status = opts[0] | len | (RingEnd * !((entry + 1) % NUM_TX_DESC)); in rtl8169_start_xmit()
6394 netif_err(tp, intr, dev, "PCI error (cmd = 0x%04x, status = 0x%04x)\n", in rtl8169_pcierr_interrupt()
6438 while (tx_left > 0) { in rtl_tx()
6534 for (rx_left = min(budget, NUM_RX_DESC); rx_left > 0; rx_left--, cur_rx++) { in rtl_rx()
6575 pkt_size = (status & 0x00003fff) - 4; in rtl_rx()
6577 pkt_size = status & 0x00003fff; in rtl_rx()
6614 desc->opts2 = 0; in rtl_rx()
6629 if (status == 0xffff || !(status & (RTL_EVENT_NAPI | tp->event_slow))) in rtl8169_interrupt()
6691 for (i = 0; i < ARRAY_SIZE(rtl_work); i++) { in rtl_task()
6741 dev->stats.rx_missed_errors += RTL_R32(tp, RxMissed) & 0xffffff; in rtl8169_rx_missed()
6742 RTL_W32(tp, RxMissed, 0); in rtl8169_rx_missed()
6762 struct phy_device *phydev = mdiobus_get_phy(tp->mii_bus, 0); in r8169_phy_connect()
6782 return 0; in r8169_phy_connect()
6833 free_irq(pci_irq_vector(pdev, 0), tp); in rtl8169_close()
6844 return 0; in rtl8169_close()
6852 rtl8169_interrupt(pci_irq_vector(tp->pci_dev, 0), tp); in rtl8169_netpoll()
6879 if (retval < 0) in rtl_open()
6888 retval = request_irq(pci_irq_vector(pdev, 0), rtl8169_interrupt, in rtl_open()
6890 if (retval < 0) in rtl_open()
6922 free_irq(pci_irq_vector(pdev, 0), tp); in rtl_open()
7026 return 0; in rtl8169_suspend()
7059 return 0; in rtl8169_resume()
7069 return 0; in rtl8169_runtime_suspend()
7081 return 0; in rtl8169_runtime_suspend()
7092 return 0; in rtl8169_runtime_resume()
7100 return 0; in rtl8169_runtime_resume()
7281 if (phyaddr > 0) in r8169_mdio_read_reg()
7292 if (phyaddr > 0) in r8169_mdio_write_reg()
7297 return 0; in r8169_mdio_write_reg()
7314 new_bus->irq[0] = PHY_IGNORE_INTERRUPT; in r8169_mdio_register()
7325 phydev = mdiobus_get_phy(new_bus, 0); in r8169_mdio_register()
7336 return 0; in r8169_mdio_register()
7357 data = r8168_mac_ocp_read(tp, 0xe8de); in rtl_hw_init_8168g()
7359 r8168_mac_ocp_write(tp, 0xe8de, data); in rtl_hw_init_8168g()
7364 data = r8168_mac_ocp_read(tp, 0xe8de); in rtl_hw_init_8168g()
7366 r8168_mac_ocp_write(tp, 0xe8de, data); in rtl_hw_init_8168g()
7485 if (rc < 0) { in rtl_init_one()
7490 if (pcim_set_mwi(pdev) < 0) in rtl_init_one()
7495 if (region < 0) { in rtl_init_one()
7507 if (rc < 0) { in rtl_init_one()
7539 if (rc < 0) { in rtl_init_one()
7553 rtl_ack_events(tp, 0xffff); in rtl_init_one()
7565 if (rc < 0) { in rtl_init_one()
7581 *(u32 *)&mac_addr[0] = rtl_eri_read(tp, 0xe0, ERIAR_EXGMAC); in rtl_init_one()
7582 *(u16 *)&mac_addr[4] = rtl_eri_read(tp, 0xe4, ERIAR_EXGMAC); in rtl_init_one()
7590 for (i = 0; i < ETH_ALEN; i++) in rtl_init_one()
7662 (u32)(RTL_R32(tp, TxConfig) & 0xfcf0f8ff), in rtl_init_one()
7663 pci_irq_vector(pdev, 0)); in rtl_init_one()
7677 return 0; in rtl_init_one()