Lines Matching +full:ecam +full:- +full:based
5 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
27 #include <linux/dma-mapping.h>
31 #include <linux/pci-aspm.h>
37 #define FIRMWARE_8168D_1 "rtl_nic/rtl8168d-1.fw"
38 #define FIRMWARE_8168D_2 "rtl_nic/rtl8168d-2.fw"
39 #define FIRMWARE_8168E_1 "rtl_nic/rtl8168e-1.fw"
40 #define FIRMWARE_8168E_2 "rtl_nic/rtl8168e-2.fw"
41 #define FIRMWARE_8168E_3 "rtl_nic/rtl8168e-3.fw"
42 #define FIRMWARE_8168F_1 "rtl_nic/rtl8168f-1.fw"
43 #define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw"
44 #define FIRMWARE_8105E_1 "rtl_nic/rtl8105e-1.fw"
45 #define FIRMWARE_8402_1 "rtl_nic/rtl8402-1.fw"
46 #define FIRMWARE_8411_1 "rtl_nic/rtl8411-1.fw"
47 #define FIRMWARE_8411_2 "rtl_nic/rtl8411-2.fw"
48 #define FIRMWARE_8106E_1 "rtl_nic/rtl8106e-1.fw"
49 #define FIRMWARE_8106E_2 "rtl_nic/rtl8106e-2.fw"
50 #define FIRMWARE_8168G_2 "rtl_nic/rtl8168g-2.fw"
51 #define FIRMWARE_8168G_3 "rtl_nic/rtl8168g-3.fw"
52 #define FIRMWARE_8168H_1 "rtl_nic/rtl8168h-1.fw"
53 #define FIRMWARE_8168H_2 "rtl_nic/rtl8168h-2.fw"
54 #define FIRMWARE_8107E_1 "rtl_nic/rtl8107e-1.fw"
55 #define FIRMWARE_8107E_2 "rtl_nic/rtl8107e-2.fw"
61 (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx)
67 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
68 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
75 #define R8169_RX_BUF_SIZE (SZ_16K - 1)
84 #define RTL_W8(tp, reg, val8) writeb((val8), tp->mmio_addr + (reg))
85 #define RTL_W16(tp, reg, val16) writew((val16), tp->mmio_addr + (reg))
86 #define RTL_W32(tp, reg, val32) writel((val32), tp->mmio_addr + (reg))
87 #define RTL_R8(tp, reg) readb(tp->mmio_addr + (reg))
88 #define RTL_R16(tp, reg) readw(tp->mmio_addr + (reg))
89 #define RTL_R32(tp, reg) readl(tp->mmio_addr + (reg))
147 #define JUMBO_4K (4*1024 - ETH_HLEN - 2)
148 #define JUMBO_6K (6*1024 - ETH_HLEN - 2)
149 #define JUMBO_7K (7*1024 - ETH_HLEN - 2)
150 #define JUMBO_9K (9*1024 - ETH_HLEN - 2)
163 /* PCI-E devices. */
242 static int use_dac = -1;
245 } debug = { -1 };
265 #define TXCFG_AUTO_FIFO (1 << 7) /* 8111e-vl */
266 #define TXCFG_EMPTY (1 << 11) /* 8111e-vl */
452 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
471 LinkUp = (1 << 4), /* Wake up when the cable connection is re-established */
611 u8 __pad[sizeof(void *) - sizeof(u32)];
662 struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
663 struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
712 #define RTL_FIRMWARE_UNKNOWN ERR_PTR(-EAGAIN)
718 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
747 return &tp->pci_dev->dev; in tp_to_dev()
752 mutex_lock(&tp->wk.mutex); in rtl_lock_work()
757 mutex_unlock(&tp->wk.mutex); in rtl_unlock_work()
762 pcie_capability_clear_and_set_word(tp->pci_dev, PCI_EXP_DEVCTL, in rtl_tx_performance_tweak()
784 if (c->check(tp) == high) in rtl_loop_wait()
787 netif_err(tp, drv, tp->dev, "%s == %d (loop: %d, delay: %d).\n", in rtl_loop_wait()
788 c->msg, !high, n, d); in rtl_loop_wait()
833 netif_err(tp, drv, tp->dev, "Invalid ocp reg %x!\n", reg); in rtl_ocp_reg_failure()
888 tp->ocp_base = value ? value << 4 : OCP_STD_PHY_BASE; in r8168g_mdio_write()
892 if (tp->ocp_base != OCP_STD_PHY_BASE) in r8168g_mdio_write()
893 reg -= 0x10; in r8168g_mdio_write()
895 r8168_phy_ocp_write(tp, tp->ocp_base + reg * 2, value); in r8168g_mdio_write()
900 if (tp->ocp_base != OCP_STD_PHY_BASE) in r8168g_mdio_read()
901 reg -= 0x10; in r8168g_mdio_read()
903 return r8168_phy_ocp_read(tp, tp->ocp_base + reg * 2); in r8168g_mdio_read()
909 tp->ocp_base = value << 4; in mac_mcu_write()
913 r8168_mac_ocp_write(tp, tp->ocp_base + reg, value); in mac_mcu_write()
918 return r8168_mac_ocp_read(tp, tp->ocp_base + reg); in mac_mcu_read()
1028 tp->mdio_ops.write(tp, location, val); in rtl_writephy()
1033 return tp->mdio_ops.read(tp, location); in rtl_readphy()
1118 switch (tp->mac_version) { in ocp_read()
1150 switch (tp->mac_version) { in ocp_write()
1180 return (tp->mac_version == RTL_GIGA_MAC_VER_31) ? 0xb8 : 0x10; in rtl8168_get_ocp_reg()
1225 switch (tp->mac_version) { in rtl8168_driver_start()
1258 switch (tp->mac_version) { in rtl8168_driver_stop()
1289 switch (tp->mac_version) { in r8168_check_dash()
1312 while (len-- > 0) { in rtl_write_exgmac_batch()
1313 rtl_eri_write(tp, r->addr, r->mask, r->val, ERIAR_EXGMAC); in rtl_write_exgmac_batch()
1359 rtl_irq_enable(tp, RTL_EVENT_NAPI | tp->event_slow); in rtl_irq_enable_all()
1365 rtl_ack_events(tp, RTL_EVENT_NAPI | tp->event_slow); in rtl8169_irq_mask_and_ack()
1371 struct net_device *dev = tp->dev; in rtl_link_chg_patch()
1372 struct phy_device *phydev = dev->phydev; in rtl_link_chg_patch()
1377 if (tp->mac_version == RTL_GIGA_MAC_VER_34 || in rtl_link_chg_patch()
1378 tp->mac_version == RTL_GIGA_MAC_VER_38) { in rtl_link_chg_patch()
1379 if (phydev->speed == SPEED_1000) { in rtl_link_chg_patch()
1384 } else if (phydev->speed == SPEED_100) { in rtl_link_chg_patch()
1400 } else if (tp->mac_version == RTL_GIGA_MAC_VER_35 || in rtl_link_chg_patch()
1401 tp->mac_version == RTL_GIGA_MAC_VER_36) { in rtl_link_chg_patch()
1402 if (phydev->speed == SPEED_1000) { in rtl_link_chg_patch()
1413 } else if (tp->mac_version == RTL_GIGA_MAC_VER_37) { in rtl_link_chg_patch()
1414 if (phydev->speed == SPEED_10) { in rtl_link_chg_patch()
1440 switch (tp->mac_version) { in __rtl8169_get_wol()
1468 wol->supported = WAKE_ANY; in rtl8169_get_wol()
1469 wol->wolopts = tp->saved_wolopts; in rtl8169_get_wol()
1492 switch (tp->mac_version) { in __rtl8169_set_wol()
1495 tmp = ARRAY_SIZE(cfg) - 1; in __rtl8169_set_wol()
1523 switch (tp->mac_version) { in __rtl8169_set_wol()
1548 if (wol->wolopts & ~WAKE_ANY) in rtl8169_set_wol()
1549 return -EINVAL; in rtl8169_set_wol()
1555 tp->saved_wolopts = wol->wolopts; in rtl8169_set_wol()
1558 __rtl8169_set_wol(tp, tp->saved_wolopts); in rtl8169_set_wol()
1569 return rtl_chip_infos[tp->mac_version].fw_name; in rtl_lookup_firmware_name()
1576 struct rtl_fw *rtl_fw = tp->rtl_fw; in rtl8169_get_drvinfo()
1578 strlcpy(info->driver, MODULENAME, sizeof(info->driver)); in rtl8169_get_drvinfo()
1579 strlcpy(info->bus_info, pci_name(tp->pci_dev), sizeof(info->bus_info)); in rtl8169_get_drvinfo()
1580 BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version)); in rtl8169_get_drvinfo()
1582 strlcpy(info->fw_version, rtl_fw->version, in rtl8169_get_drvinfo()
1583 sizeof(info->fw_version)); in rtl8169_get_drvinfo()
1596 if (dev->mtu > TD_MSS_MAX) in rtl8169_fix_features()
1599 if (dev->mtu > JUMBO_1K && in rtl8169_fix_features()
1600 tp->mac_version > RTL_GIGA_MAC_VER_06) in rtl8169_fix_features()
1623 tp->cp_cmd |= RxChkSum; in rtl8169_set_features()
1625 tp->cp_cmd &= ~RxChkSum; in rtl8169_set_features()
1628 tp->cp_cmd |= RxVlan; in rtl8169_set_features()
1630 tp->cp_cmd &= ~RxVlan; in rtl8169_set_features()
1632 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl8169_set_features()
1648 u32 opts2 = le32_to_cpu(desc->opts2); in rtl8169_rx_vlan_tag()
1658 u32 __iomem *data = tp->mmio_addr; in rtl8169_get_regs()
1672 return tp->msg_enable; in rtl8169_get_msglevel()
1679 tp->msg_enable = value; in rtl8169_set_msglevel()
1704 return -EOPNOTSUPP; in rtl8169_get_sset_count()
1715 dma_addr_t paddr = tp->counters_phys_addr; in rtl8169_do_counters()
1733 if (tp->mac_version < RTL_GIGA_MAC_VER_19) in rtl8169_reset_counters()
1745 * is disabled. If 0xff chip may be in a PCI power-save state. in rtl8169_update_counters()
1755 struct rtl8169_counters *counters = tp->counters; in rtl8169_init_counter_offsets()
1773 if (tp->tc_offset.inited) in rtl8169_init_counter_offsets()
1783 tp->tc_offset.tx_errors = counters->tx_errors; in rtl8169_init_counter_offsets()
1784 tp->tc_offset.tx_multi_collision = counters->tx_multi_collision; in rtl8169_init_counter_offsets()
1785 tp->tc_offset.tx_aborted = counters->tx_aborted; in rtl8169_init_counter_offsets()
1786 tp->tc_offset.inited = true; in rtl8169_init_counter_offsets()
1796 struct rtl8169_counters *counters = tp->counters; in rtl8169_get_ethtool_stats()
1807 data[0] = le64_to_cpu(counters->tx_packets); in rtl8169_get_ethtool_stats()
1808 data[1] = le64_to_cpu(counters->rx_packets); in rtl8169_get_ethtool_stats()
1809 data[2] = le64_to_cpu(counters->tx_errors); in rtl8169_get_ethtool_stats()
1810 data[3] = le32_to_cpu(counters->rx_errors); in rtl8169_get_ethtool_stats()
1811 data[4] = le16_to_cpu(counters->rx_missed); in rtl8169_get_ethtool_stats()
1812 data[5] = le16_to_cpu(counters->align_errors); in rtl8169_get_ethtool_stats()
1813 data[6] = le32_to_cpu(counters->tx_one_collision); in rtl8169_get_ethtool_stats()
1814 data[7] = le32_to_cpu(counters->tx_multi_collision); in rtl8169_get_ethtool_stats()
1815 data[8] = le64_to_cpu(counters->rx_unicast); in rtl8169_get_ethtool_stats()
1816 data[9] = le64_to_cpu(counters->rx_broadcast); in rtl8169_get_ethtool_stats()
1817 data[10] = le32_to_cpu(counters->rx_multicast); in rtl8169_get_ethtool_stats()
1818 data[11] = le16_to_cpu(counters->tx_aborted); in rtl8169_get_ethtool_stats()
1819 data[12] = le16_to_cpu(counters->tx_underun); in rtl8169_get_ethtool_stats()
1834 * > 1 - the availability of the IntrMitigate (0xe2) register through the
1839 * > 2 - the Tx timer unit at gigabit speed
1907 for (ci = tp->coalesce_info; ci->speed != 0; ci++) { in rtl_coalesce_info()
1908 if (ecmd.base.speed == ci->speed) { in rtl_coalesce_info()
1913 return ERR_PTR(-ELNRNG); in rtl_coalesce_info()
1925 { &ec->rx_max_coalesced_frames, &ec->rx_coalesce_usecs }, in rtl_get_coalesce()
1926 { &ec->tx_max_coalesced_frames, &ec->tx_coalesce_usecs } in rtl_get_coalesce()
1938 scale = &ci->scalev[tp->cp_cmd & INTT_MASK]; in rtl_get_coalesce()
1942 *p->max_frames = (w & RTL_COALESCE_MASK) << 2; in rtl_get_coalesce()
1944 *p->usecs = w & RTL_COALESCE_MASK; in rtl_get_coalesce()
1949 *p->usecs = (*p->usecs * scale->nsecs[i]) / 1000; in rtl_get_coalesce()
1955 if (!*p->usecs && !*p->max_frames) in rtl_get_coalesce()
1956 *p->max_frames = 1; in rtl_get_coalesce()
1974 u32 rxtx_maxscale = max(ci->scalev[i].nsecs[0], in rtl_coalesce_choose_scale()
1975 ci->scalev[i].nsecs[1]); in rtl_coalesce_choose_scale()
1978 return &ci->scalev[i]; in rtl_coalesce_choose_scale()
1982 return ERR_PTR(-EINVAL); in rtl_coalesce_choose_scale()
1993 { ec->rx_max_coalesced_frames, ec->rx_coalesce_usecs }, in rtl_set_coalesce()
1994 { ec->tx_max_coalesced_frames, ec->tx_coalesce_usecs } in rtl_set_coalesce()
2011 * - both rx_usecs=0 & rx_frames=0 in hardware (no delay on RX) in rtl_set_coalesce()
2012 * - rtl_get_coalesce returns rx_usecs=0, rx_frames=1 in rtl_set_coalesce()
2013 * - then user does `ethtool -C eth0 rx-usecs 100` in rtl_set_coalesce()
2019 if (p->frames == 1) { in rtl_set_coalesce()
2020 p->frames = 0; in rtl_set_coalesce()
2023 units = p->usecs * 1000 / scale->nsecs[i]; in rtl_set_coalesce()
2024 if (p->frames > RTL_COALESCE_FRAME_MAX || p->frames % 4) in rtl_set_coalesce()
2025 return -EINVAL; in rtl_set_coalesce()
2030 w |= p->frames >> 2; in rtl_set_coalesce()
2037 tp->cp_cmd = (tp->cp_cmd & ~INTT_MASK) | cp01; in rtl_set_coalesce()
2038 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_set_coalesce()
2148 /* FIXME: where did these entries come from ? -- FR */ in rtl8169_get_mac_version()
2160 /* Catch-all */ in rtl8169_get_mac_version()
2167 while ((reg & p->mask) != p->val) in rtl8169_get_mac_version()
2169 tp->mac_version = p->mac_version; in rtl8169_get_mac_version()
2171 if (tp->mac_version == RTL_GIGA_MAC_NONE) { in rtl8169_get_mac_version()
2174 tp->mac_version = default_version; in rtl8169_get_mac_version()
2175 } else if (tp->mac_version == RTL_GIGA_MAC_VER_42) { in rtl8169_get_mac_version()
2176 tp->mac_version = tp->supports_gmii ? in rtl8169_get_mac_version()
2179 } else if (tp->mac_version == RTL_GIGA_MAC_VER_45) { in rtl8169_get_mac_version()
2180 tp->mac_version = tp->supports_gmii ? in rtl8169_get_mac_version()
2183 } else if (tp->mac_version == RTL_GIGA_MAC_VER_46) { in rtl8169_get_mac_version()
2184 tp->mac_version = tp->supports_gmii ? in rtl8169_get_mac_version()
2192 netif_dbg(tp, drv, tp->dev, "mac_version = 0x%02x\n", tp->mac_version); in rtl8169_print_mac_version()
2203 while (len-- > 0) { in rtl_writephy_batch()
2204 rtl_writephy(tp, regs->reg, regs->val); in rtl_writephy_batch()
2231 #define FW_OPCODE_SIZE sizeof(typeof(*((struct rtl_fw_phy_action *)0)->code))
2235 const struct firmware *fw = rtl_fw->fw; in rtl_fw_format_ok()
2236 struct fw_info *fw_info = (struct fw_info *)fw->data; in rtl_fw_format_ok()
2237 struct rtl_fw_phy_action *pa = &rtl_fw->phy_action; in rtl_fw_format_ok()
2238 char *version = rtl_fw->version; in rtl_fw_format_ok()
2241 if (fw->size < FW_OPCODE_SIZE) in rtl_fw_format_ok()
2244 if (!fw_info->magic) { in rtl_fw_format_ok()
2248 if (fw->size < sizeof(*fw_info)) in rtl_fw_format_ok()
2251 for (i = 0; i < fw->size; i++) in rtl_fw_format_ok()
2252 checksum += fw->data[i]; in rtl_fw_format_ok()
2256 start = le32_to_cpu(fw_info->fw_start); in rtl_fw_format_ok()
2257 if (start > fw->size) in rtl_fw_format_ok()
2260 size = le32_to_cpu(fw_info->fw_len); in rtl_fw_format_ok()
2261 if (size > (fw->size - start) / FW_OPCODE_SIZE) in rtl_fw_format_ok()
2264 memcpy(version, fw_info->version, RTL_VER_SIZE); in rtl_fw_format_ok()
2266 pa->code = (__le32 *)(fw->data + start); in rtl_fw_format_ok()
2267 pa->size = size; in rtl_fw_format_ok()
2269 if (fw->size % FW_OPCODE_SIZE) in rtl_fw_format_ok()
2274 pa->code = (__le32 *)fw->data; in rtl_fw_format_ok()
2275 pa->size = fw->size / FW_OPCODE_SIZE; in rtl_fw_format_ok()
2277 version[RTL_VER_SIZE - 1] = 0; in rtl_fw_format_ok()
2290 for (index = 0; index < pa->size; index++) { in rtl_fw_data_ok()
2291 u32 action = le32_to_cpu(pa->code[index]); in rtl_fw_data_ok()
2307 netif_err(tp, ifup, tp->dev, in rtl_fw_data_ok()
2313 if (index + 2 >= pa->size) { in rtl_fw_data_ok()
2314 netif_err(tp, ifup, tp->dev, in rtl_fw_data_ok()
2322 if (index + 1 + regno >= pa->size) { in rtl_fw_data_ok()
2323 netif_err(tp, ifup, tp->dev, in rtl_fw_data_ok()
2330 netif_err(tp, ifup, tp->dev, in rtl_fw_data_ok()
2342 struct net_device *dev = tp->dev; in rtl_check_firmware()
2343 int rc = -EINVAL; in rtl_check_firmware()
2350 if (rtl_fw_data_ok(tp, dev, &rtl_fw->phy_action)) in rtl_check_firmware()
2358 struct rtl_fw_phy_action *pa = &rtl_fw->phy_action; in rtl_phy_write_fw()
2359 struct mdio_ops org, *ops = &tp->mdio_ops; in rtl_phy_write_fw()
2364 org.write = ops->write; in rtl_phy_write_fw()
2365 org.read = ops->read; in rtl_phy_write_fw()
2367 for (index = 0; index < pa->size; ) { in rtl_phy_write_fw()
2368 u32 action = le32_to_cpu(pa->code[index]); in rtl_phy_write_fw()
2390 index -= regno; in rtl_phy_write_fw()
2394 ops->write = org.write; in rtl_phy_write_fw()
2395 ops->read = org.read; in rtl_phy_write_fw()
2397 ops->write = mac_mcu_write; in rtl_phy_write_fw()
2398 ops->read = mac_mcu_read; in rtl_phy_write_fw()
2441 ops->write = org.write; in rtl_phy_write_fw()
2442 ops->read = org.read; in rtl_phy_write_fw()
2447 if (!IS_ERR_OR_NULL(tp->rtl_fw)) { in rtl_release_firmware()
2448 release_firmware(tp->rtl_fw->fw); in rtl_release_firmware()
2449 kfree(tp->rtl_fw); in rtl_release_firmware()
2451 tp->rtl_fw = RTL_FIRMWARE_UNKNOWN; in rtl_release_firmware()
2456 struct rtl_fw *rtl_fw = tp->rtl_fw; in rtl_apply_firmware()
2466 netif_warn(tp, hw, tp->dev, "chipset not ready for firmware\n"); in rtl_apply_firmware_cond()
2551 struct pci_dev *pdev = tp->pci_dev; in rtl8169scd_hw_phy_config_quirk()
2553 if ((pdev->subsystem_vendor != PCI_VENDOR_ID_GIGABYTE) || in rtl8169scd_hw_phy_config_quirk()
2554 (pdev->subsystem_device != 0xe000)) in rtl8169scd_hw_phy_config_quirk()
3211 /* For 4-corner performance improve */ in rtl8168e_2_hw_phy_config()
3232 /* Improve 2-pair detection performance */ in rtl8168e_2_hw_phy_config()
3265 rtl_rar_exgmac_set(tp, tp->dev->dev_addr); in rtl8168e_2_hw_phy_config()
3270 /* For 4-corner performance improve */ in rtl8168f_hw_phy_config()
3333 /* Improve 2-pair detection performance */ in rtl8168f_1_hw_phy_config()
3389 /* Improve 2-pair detection performance */ in rtl8411_hw_phy_config()
3415 /* uc same-seed solution */ in rtl8411_hw_phy_config()
3479 /* EEE auto-fallback function */ in rtl8168g_1_hw_phy_config()
3522 /* CHN EST parameters adjust - giga master */ in rtl8168h_1_hw_phy_config()
3534 /* CHN EST parameters adjust - giga slave */ in rtl8168h_1_hw_phy_config()
3544 /* CHN EST parameters adjust - fnet */ in rtl8168h_1_hw_phy_config()
3554 /* enable R-tune & PGA-retune function */ in rtl8168h_1_hw_phy_config()
3639 /* enable R-tune & PGA-retune function */ in rtl8168h_2_hw_phy_config()
3679 rlen = data - 3; in rtl8168h_2_hw_phy_config()
3716 /* Enable EEE auto-fallback function */ in rtl8168ep_1_hw_phy_config()
3811 /* Force PWM-mode */ in rtl8168ep_2_hw_phy_config()
3919 switch (tp->mac_version) { in rtl_hw_phy_config()
4046 if (!test_and_set_bit(flag, tp->wk.flags)) in rtl_schedule_task()
4047 schedule_work(&tp->wk.work); in rtl_schedule_task()
4052 return (tp->mac_version == RTL_GIGA_MAC_VER_01) && in rtl_tbi_enabled()
4060 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) { in rtl8169_init_phy()
4066 pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40); in rtl8169_init_phy()
4068 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) in rtl8169_init_phy()
4069 pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08); in rtl8169_init_phy()
4071 if (tp->mac_version == RTL_GIGA_MAC_VER_02) { in rtl8169_init_phy()
4081 phy_speed_up(dev->phydev); in rtl8169_init_phy()
4083 genphy_soft_reset(dev->phydev); in rtl8169_init_phy()
4087 * these chips doesn't properly start a renegotiation when soft-reset. in rtl8169_init_phy()
4090 if (dev->phydev->autoneg == AUTONEG_ENABLE) in rtl8169_init_phy()
4091 phy_restart_aneg(dev->phydev); in rtl8169_init_phy()
4106 if (tp->mac_version == RTL_GIGA_MAC_VER_34) in rtl_rar_set()
4116 switch (tp->mac_version) { in rtl_init_rxcfg()
4148 rtl_rar_set(tp, dev->dev_addr); in rtl_set_mac_address()
4153 if (tp->mac_version == RTL_GIGA_MAC_VER_37) in rtl_set_mac_address()
4162 return -ENODEV; in rtl8169_ioctl()
4164 return phy_mii_ioctl(dev->phydev, ifr, cmd); in rtl8169_ioctl()
4169 struct mdio_ops *ops = &tp->mdio_ops; in rtl_init_mdio_ops()
4171 switch (tp->mac_version) { in rtl_init_mdio_ops()
4173 ops->write = r8168dp_1_mdio_write; in rtl_init_mdio_ops()
4174 ops->read = r8168dp_1_mdio_read; in rtl_init_mdio_ops()
4178 ops->write = r8168dp_2_mdio_write; in rtl_init_mdio_ops()
4179 ops->read = r8168dp_2_mdio_read; in rtl_init_mdio_ops()
4182 ops->write = r8168g_mdio_write; in rtl_init_mdio_ops()
4183 ops->read = r8168g_mdio_read; in rtl_init_mdio_ops()
4186 ops->write = r8169_mdio_write; in rtl_init_mdio_ops()
4187 ops->read = r8169_mdio_read; in rtl_init_mdio_ops()
4194 switch (tp->mac_version) { in rtl_wol_suspend_quirk()
4219 phydev = mdiobus_get_phy(tp->mii_bus, 0); in rtl_wol_pll_power_down()
4232 if (tp->mac_version == RTL_GIGA_MAC_VER_32 || in r8168_pll_power_down()
4233 tp->mac_version == RTL_GIGA_MAC_VER_33) in r8168_pll_power_down()
4239 switch (tp->mac_version) { in r8168_pll_power_down()
4265 switch (tp->mac_version) { in r8168_pll_power_up()
4290 phy_resume(tp->dev->phydev); in r8168_pll_power_up()
4297 switch (tp->mac_version) { in rtl_pll_power_down()
4308 switch (tp->mac_version) { in rtl_pll_power_up()
4319 tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0; in rtl8169_init_ring_indexes()
4324 if (tp->jumbo_ops.enable) { in rtl_hw_jumbo_enable()
4326 tp->jumbo_ops.enable(tp); in rtl_hw_jumbo_enable()
4333 if (tp->jumbo_ops.disable) { in rtl_hw_jumbo_disable()
4335 tp->jumbo_ops.disable(tp); in rtl_hw_jumbo_disable()
4408 struct jumbo_ops *ops = &tp->jumbo_ops; in rtl_init_jumbo_ops()
4410 switch (tp->mac_version) { in rtl_init_jumbo_ops()
4412 ops->disable = r8168b_0_hw_jumbo_disable; in rtl_init_jumbo_ops()
4413 ops->enable = r8168b_0_hw_jumbo_enable; in rtl_init_jumbo_ops()
4417 ops->disable = r8168b_1_hw_jumbo_disable; in rtl_init_jumbo_ops()
4418 ops->enable = r8168b_1_hw_jumbo_enable; in rtl_init_jumbo_ops()
4429 ops->disable = r8168c_hw_jumbo_disable; in rtl_init_jumbo_ops()
4430 ops->enable = r8168c_hw_jumbo_enable; in rtl_init_jumbo_ops()
4434 ops->disable = r8168dp_hw_jumbo_disable; in rtl_init_jumbo_ops()
4435 ops->enable = r8168dp_hw_jumbo_enable; in rtl_init_jumbo_ops()
4441 ops->disable = r8168e_hw_jumbo_disable; in rtl_init_jumbo_ops()
4442 ops->enable = r8168e_hw_jumbo_enable; in rtl_init_jumbo_ops()
4451 ops->disable = NULL; in rtl_init_jumbo_ops()
4452 ops->enable = NULL; in rtl_init_jumbo_ops()
4473 int rc = -ENOMEM; in rtl_request_uncached_firmware()
4483 rc = request_firmware(&rtl_fw->fw, name, tp_to_dev(tp)); in rtl_request_uncached_firmware()
4491 tp->rtl_fw = rtl_fw; in rtl_request_uncached_firmware()
4496 release_firmware(rtl_fw->fw); in rtl_request_uncached_firmware()
4500 netif_warn(tp, ifup, tp->dev, "unable to load firmware patch %s (%d)\n", in rtl_request_uncached_firmware()
4503 tp->rtl_fw = NULL; in rtl_request_uncached_firmware()
4509 if (IS_ERR(tp->rtl_fw)) in rtl_request_firmware()
4535 switch (tp->mac_version) { in rtl8169_hw_reset()
4560 if (tp->mac_version >= RTL_GIGA_MAC_VER_34 && in rtl_set_tx_config_registers()
4561 tp->mac_version != RTL_GIGA_MAC_VER_39) in rtl_set_tx_config_registers()
4580 RTL_W32(tp, TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32); in rtl_set_rx_tx_desc_registers()
4581 RTL_W32(tp, TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_BIT_MASK(32)); in rtl_set_rx_tx_desc_registers()
4582 RTL_W32(tp, RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32); in rtl_set_rx_tx_desc_registers()
4583 RTL_W32(tp, RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_BIT_MASK(32)); in rtl_set_rx_tx_desc_registers()
4604 if ((p->mac_version == mac_version) && (p->clk == clk)) { in rtl8169_set_magic_reg()
4605 RTL_W32(tp, 0x7c, p->val); in rtl8169_set_magic_reg()
4618 if (dev->flags & IFF_PROMISC) { in rtl_set_rx_mode()
4626 (dev->flags & IFF_ALLMULTI)) { in rtl_set_rx_mode()
4627 /* Too many to filter perfectly -- accept all multicasts. */ in rtl_set_rx_mode()
4636 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26; in rtl_set_rx_mode()
4642 if (dev->features & NETIF_F_RXALL) in rtl_set_rx_mode()
4647 if (tp->mac_version > RTL_GIGA_MAC_VER_06) { in rtl_set_rx_mode()
4654 if (tp->mac_version == RTL_GIGA_MAC_VER_35) in rtl_set_rx_mode()
4667 tp->hw_start(tp); in rtl_hw_start()
4673 /* Initially a 10 us delay. Turned it into a PCI commit. - FR */ in rtl_hw_start()
4679 rtl_set_rx_mode(tp->dev); in rtl_hw_start()
4680 /* no early-rx interrupts */ in rtl_hw_start()
4687 if (tp->mac_version == RTL_GIGA_MAC_VER_05) in rtl_hw_start_8169()
4688 pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08); in rtl_hw_start_8169()
4692 tp->cp_cmd |= PCIMulRW; in rtl_hw_start_8169()
4694 if (tp->mac_version == RTL_GIGA_MAC_VER_02 || in rtl_hw_start_8169()
4695 tp->mac_version == RTL_GIGA_MAC_VER_03) { in rtl_hw_start_8169()
4696 netif_dbg(tp, drv, tp->dev, in rtl_hw_start_8169()
4698 tp->cp_cmd |= (1 << 14); in rtl_hw_start_8169()
4701 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start_8169()
4703 rtl8169_set_magic_reg(tp, tp->mac_version); in rtl_hw_start_8169()
4721 u32 func = PCI_FUNC(tp->pci_dev->devfn); in rtl_csi_write()
4732 u32 func = PCI_FUNC(tp->pci_dev->devfn); in rtl_csi_read()
4743 struct pci_dev *pdev = tp->pci_dev; in rtl_csi_access_enable()
4747 * controls the L0s/L1 entrance latency. We try standard ECAM access in rtl_csi_access_enable()
4750 if (pdev->cfg_size > 0x070f && in rtl_csi_access_enable()
4754 netdev_notice_once(tp->dev, in rtl_csi_access_enable()
4776 while (len-- > 0) { in rtl_ephy_init()
4777 w = (rtl_ephy_read(tp, e->offset) & ~e->mask) | e->bits; in rtl_ephy_init()
4778 rtl_ephy_write(tp, e->offset, w); in rtl_ephy_init()
4785 pcie_capability_clear_word(tp->pci_dev, PCI_EXP_LNKCTL, in rtl_disable_clock_request()
4791 pcie_capability_set_word(tp->pci_dev, PCI_EXP_LNKCTL, in rtl_enable_clock_request()
4826 tp->cp_cmd &= CPCMD_QUIRK_MASK; in rtl_hw_start_8168bb()
4827 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start_8168bb()
4829 if (tp->dev->mtu <= ETH_DATA_LEN) { in rtl_hw_start_8168bb()
4850 if (tp->dev->mtu <= ETH_DATA_LEN) in __rtl_hw_start_8168cp()
4855 tp->cp_cmd &= CPCMD_QUIRK_MASK; in __rtl_hw_start_8168cp()
4856 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in __rtl_hw_start_8168cp()
4882 if (tp->dev->mtu <= ETH_DATA_LEN) in rtl_hw_start_8168cp_2()
4885 tp->cp_cmd &= CPCMD_QUIRK_MASK; in rtl_hw_start_8168cp_2()
4886 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start_8168cp_2()
4900 if (tp->dev->mtu <= ETH_DATA_LEN) in rtl_hw_start_8168cp_3()
4903 tp->cp_cmd &= CPCMD_QUIRK_MASK; in rtl_hw_start_8168cp_3()
4904 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start_8168cp_3()
4958 if (tp->dev->mtu <= ETH_DATA_LEN) in rtl_hw_start_8168d()
4961 tp->cp_cmd &= CPCMD_QUIRK_MASK; in rtl_hw_start_8168d()
4962 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start_8168d()
4969 if (tp->dev->mtu <= ETH_DATA_LEN) in rtl_hw_start_8168dp()
5018 if (tp->dev->mtu <= ETH_DATA_LEN) in rtl_hw_start_8168e_1()
5043 if (tp->dev->mtu <= ETH_DATA_LEN) in rtl_hw_start_8168e_2()
5214 /* The following Realtek-provided magic fixes an issue with the RX unit in rtl_hw_start_8411_2()
5215 * getting confused after the PHY having been powered-down. in rtl_hw_start_8411_2()
5562 tp->cp_cmd &= ~INTT_MASK; in rtl_hw_start_8168()
5563 tp->cp_cmd |= PktCntrDisable | INTT_1; in rtl_hw_start_8168()
5564 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start_8168()
5569 if (tp->mac_version == RTL_GIGA_MAC_VER_11) { in rtl_hw_start_8168()
5570 tp->event_slow |= RxFIFOOver | PCSTimeout; in rtl_hw_start_8168()
5571 tp->event_slow &= ~RxOverflow; in rtl_hw_start_8168()
5574 switch (tp->mac_version) { in rtl_hw_start_8168()
5673 netif_err(tp, drv, tp->dev, in rtl_hw_start_8168()
5675 tp->mac_version); in rtl_hw_start_8168()
5807 if (tp->mac_version >= RTL_GIGA_MAC_VER_30) in rtl_hw_start_8101()
5808 tp->event_slow &= ~RxFIFOOver; in rtl_hw_start_8101()
5810 if (tp->mac_version == RTL_GIGA_MAC_VER_13 || in rtl_hw_start_8101()
5811 tp->mac_version == RTL_GIGA_MAC_VER_16) in rtl_hw_start_8101()
5812 pcie_capability_set_word(tp->pci_dev, PCI_EXP_DEVCTL, in rtl_hw_start_8101()
5817 tp->cp_cmd &= CPCMD_QUIRK_MASK; in rtl_hw_start_8101()
5818 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start_8101()
5820 switch (tp->mac_version) { in rtl_hw_start_8101()
5868 dev->mtu = new_mtu; in rtl8169_change_mtu()
5876 desc->addr = cpu_to_le64(0x0badbadbadbadbadull); in rtl8169_make_unusable_by_asic()
5877 desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask); in rtl8169_make_unusable_by_asic()
5883 dma_unmap_single(tp_to_dev(tp), le64_to_cpu(desc->addr), in rtl8169_free_rx_databuff()
5893 u32 eor = le32_to_cpu(desc->opts1) & RingEnd; in rtl8169_mark_to_asic()
5898 desc->opts1 = cpu_to_le32(DescOwn | eor | R8169_RX_BUF_SIZE); in rtl8169_mark_to_asic()
5929 netif_err(tp, drv, tp->dev, "Failed to map RX DMA!\n"); in rtl8169_alloc_rx_data()
5933 desc->addr = cpu_to_le64(mapping); in rtl8169_alloc_rx_data()
5947 if (tp->Rx_databuff[i]) { in rtl8169_rx_clear()
5948 rtl8169_free_rx_databuff(tp, tp->Rx_databuff + i, in rtl8169_rx_clear()
5949 tp->RxDescArray + i); in rtl8169_rx_clear()
5956 desc->opts1 |= cpu_to_le32(RingEnd); in rtl8169_mark_as_last_descriptor()
5966 data = rtl8169_alloc_rx_data(tp, tp->RxDescArray + i); in rtl8169_rx_fill()
5968 rtl8169_make_unusable_by_asic(tp->RxDescArray + i); in rtl8169_rx_fill()
5971 tp->Rx_databuff[i] = data; in rtl8169_rx_fill()
5974 rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1); in rtl8169_rx_fill()
5979 return -ENOMEM; in rtl8169_rx_fill()
5986 memset(tp->tx_skb, 0, sizeof(tp->tx_skb)); in rtl8169_init_ring()
5987 memset(tp->Rx_databuff, 0, sizeof(tp->Rx_databuff)); in rtl8169_init_ring()
5995 unsigned int len = tx_skb->len; in rtl8169_unmap_tx_skb()
5997 dma_unmap_single(d, le64_to_cpu(desc->addr), len, DMA_TO_DEVICE); in rtl8169_unmap_tx_skb()
5999 desc->opts1 = 0x00; in rtl8169_unmap_tx_skb()
6000 desc->opts2 = 0x00; in rtl8169_unmap_tx_skb()
6001 desc->addr = 0x00; in rtl8169_unmap_tx_skb()
6002 tx_skb->len = 0; in rtl8169_unmap_tx_skb()
6012 struct ring_info *tx_skb = tp->tx_skb + entry; in rtl8169_tx_clear_range()
6013 unsigned int len = tx_skb->len; in rtl8169_tx_clear_range()
6016 struct sk_buff *skb = tx_skb->skb; in rtl8169_tx_clear_range()
6019 tp->TxDescArray + entry); in rtl8169_tx_clear_range()
6022 tx_skb->skb = NULL; in rtl8169_tx_clear_range()
6030 rtl8169_tx_clear_range(tp, tp->dirty_tx, NUM_TX_DESC); in rtl8169_tx_clear()
6031 tp->cur_tx = tp->dirty_tx = 0; in rtl8169_tx_clear()
6036 struct net_device *dev = tp->dev; in rtl_reset_work()
6039 napi_disable(&tp->napi); in rtl_reset_work()
6046 rtl8169_mark_to_asic(tp->RxDescArray + i); in rtl_reset_work()
6051 napi_enable(&tp->napi); in rtl_reset_work()
6071 entry = tp->cur_tx; in rtl8169_xmit_frags()
6072 for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) { in rtl8169_xmit_frags()
6073 const skb_frag_t *frag = info->frags + cur_frag; in rtl8169_xmit_frags()
6080 txd = tp->TxDescArray + entry; in rtl8169_xmit_frags()
6086 netif_err(tp, drv, tp->dev, in rtl8169_xmit_frags()
6095 txd->opts1 = cpu_to_le32(status); in rtl8169_xmit_frags()
6096 txd->opts2 = cpu_to_le32(opts[1]); in rtl8169_xmit_frags()
6097 txd->addr = cpu_to_le64(mapping); in rtl8169_xmit_frags()
6099 tp->tx_skb[entry].len = len; in rtl8169_xmit_frags()
6103 tp->tx_skb[entry].skb = skb; in rtl8169_xmit_frags()
6104 txd->opts1 |= cpu_to_le32(LastFrag); in rtl8169_xmit_frags()
6110 rtl8169_tx_clear_range(tp, tp->cur_tx + 1, cur_frag); in rtl8169_xmit_frags()
6111 return -EIO; in rtl8169_xmit_frags()
6116 return skb->len < ETH_ZLEN && tp->mac_version == RTL_GIGA_MAC_VER_34; in rtl_test_hw_pad_bug()
6128 if (skb_shinfo(skb)->gso_size) { in r8169_csum_workaround()
6129 netdev_features_t features = tp->dev->features; in r8169_csum_workaround()
6139 segs = segs->next; in r8169_csum_workaround()
6140 nskb->next = NULL; in r8169_csum_workaround()
6141 rtl8169_start_xmit(nskb, tp->dev); in r8169_csum_workaround()
6145 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in r8169_csum_workaround()
6149 rtl8169_start_xmit(skb, tp->dev); in r8169_csum_workaround()
6154 stats = &tp->dev->stats; in r8169_csum_workaround()
6155 stats->tx_dropped++; in r8169_csum_workaround()
6177 th->check = 0; in msdn_giant_send_check()
6178 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0); in msdn_giant_send_check()
6186 u32 mss = skb_shinfo(skb)->gso_size; in rtl8169_tso_csum_v1()
6191 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_tso_csum_v1()
6194 if (ip->protocol == IPPROTO_TCP) in rtl8169_tso_csum_v1()
6196 else if (ip->protocol == IPPROTO_UDP) in rtl8169_tso_csum_v1()
6209 u32 mss = skb_shinfo(skb)->gso_size; in rtl8169_tso_csum_v2()
6213 netif_warn(tp, tx_err, tp->dev, in rtl8169_tso_csum_v2()
6238 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_tso_csum_v2()
6245 netif_warn(tp, tx_err, tp->dev, in rtl8169_tso_csum_v2()
6254 ip_protocol = ip_hdr(skb)->protocol; in rtl8169_tso_csum_v2()
6259 ip_protocol = ipv6_hdr(skb)->nexthdr; in rtl8169_tso_csum_v2()
6287 unsigned int entry = tp->cur_tx % NUM_TX_DESC; in rtl8169_start_xmit()
6288 struct TxDesc *txd = tp->TxDescArray + entry; in rtl8169_start_xmit()
6295 if (unlikely(!TX_FRAGS_READY_FOR(tp, skb_shinfo(skb)->nr_frags))) { in rtl8169_start_xmit()
6300 if (unlikely(le32_to_cpu(txd->opts1) & DescOwn)) in rtl8169_start_xmit()
6306 if (!tp->tso_csum(tp, skb, opts)) { in rtl8169_start_xmit()
6312 mapping = dma_map_single(d, skb->data, len, DMA_TO_DEVICE); in rtl8169_start_xmit()
6319 tp->tx_skb[entry].len = len; in rtl8169_start_xmit()
6320 txd->addr = cpu_to_le64(mapping); in rtl8169_start_xmit()
6329 tp->tx_skb[entry].skb = skb; in rtl8169_start_xmit()
6332 txd->opts2 = cpu_to_le32(opts[1]); in rtl8169_start_xmit()
6341 txd->opts1 = cpu_to_le32(status); in rtl8169_start_xmit()
6346 tp->cur_tx += frags + 1; in rtl8169_start_xmit()
6353 /* Avoid wrongly optimistic queue wake-up: rtl_tx thread must in rtl8169_start_xmit()
6359 * - publish queue status and cur_tx ring index (write barrier) in rtl8169_start_xmit()
6360 * - refresh dirty_tx ring index (read barrier). in rtl8169_start_xmit()
6373 rtl8169_unmap_tx_skb(d, tp->tx_skb + entry, txd); in rtl8169_start_xmit()
6376 dev->stats.tx_dropped++; in rtl8169_start_xmit()
6381 dev->stats.tx_dropped++; in rtl8169_start_xmit()
6388 struct pci_dev *pdev = tp->pci_dev; in rtl8169_pcierr_interrupt()
6399 * - it seems to work; in rtl8169_pcierr_interrupt()
6400 * - I did not see what else could be done; in rtl8169_pcierr_interrupt()
6401 * - it makes iop3xx happy. in rtl8169_pcierr_interrupt()
6405 if (pdev->broken_parity_status) in rtl8169_pcierr_interrupt()
6418 if ((tp->cp_cmd & PCIDAC) && !tp->cur_rx) { in rtl8169_pcierr_interrupt()
6420 tp->cp_cmd &= ~PCIDAC; in rtl8169_pcierr_interrupt()
6421 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl8169_pcierr_interrupt()
6422 dev->features &= ~NETIF_F_HIGHDMA; in rtl8169_pcierr_interrupt()
6434 dirty_tx = tp->dirty_tx; in rtl_tx()
6436 tx_left = tp->cur_tx - dirty_tx; in rtl_tx()
6440 struct ring_info *tx_skb = tp->tx_skb + entry; in rtl_tx()
6443 status = le32_to_cpu(tp->TxDescArray[entry].opts1); in rtl_tx()
6454 tp->TxDescArray + entry); in rtl_tx()
6456 u64_stats_update_begin(&tp->tx_stats.syncp); in rtl_tx()
6457 tp->tx_stats.packets++; in rtl_tx()
6458 tp->tx_stats.bytes += tx_skb->skb->len; in rtl_tx()
6459 u64_stats_update_end(&tp->tx_stats.syncp); in rtl_tx()
6460 dev_consume_skb_any(tx_skb->skb); in rtl_tx()
6461 tx_skb->skb = NULL; in rtl_tx()
6464 tx_left--; in rtl_tx()
6467 if (tp->dirty_tx != dirty_tx) { in rtl_tx()
6468 tp->dirty_tx = dirty_tx; in rtl_tx()
6470 * - publish dirty_tx ring index (write barrier) in rtl_tx()
6471 * - refresh cur_tx ring index and queue status (read barrier) in rtl_tx()
6485 * it is slow enough). -- FR in rtl_tx()
6487 if (tp->cur_tx != dirty_tx) in rtl_tx()
6503 skb->ip_summed = CHECKSUM_UNNECESSARY; in rtl8169_rx_csum()
6519 skb = napi_alloc_skb(&tp->napi, pkt_size); in rtl8169_try_rx_copy()
6532 cur_rx = tp->cur_rx; in rtl_rx()
6534 for (rx_left = min(budget, NUM_RX_DESC); rx_left > 0; rx_left--, cur_rx++) { in rtl_rx()
6536 struct RxDesc *desc = tp->RxDescArray + entry; in rtl_rx()
6539 status = le32_to_cpu(desc->opts1); in rtl_rx()
6552 dev->stats.rx_errors++; in rtl_rx()
6554 dev->stats.rx_length_errors++; in rtl_rx()
6556 dev->stats.rx_crc_errors++; in rtl_rx()
6558 if (tp->mac_version == RTL_GIGA_MAC_VER_01 && in rtl_rx()
6561 dev->stats.rx_fifo_errors++; in rtl_rx()
6564 dev->features & NETIF_F_RXALL) { in rtl_rx()
6573 addr = le64_to_cpu(desc->addr); in rtl_rx()
6574 if (likely(!(dev->features & NETIF_F_RXFCS))) in rtl_rx()
6575 pkt_size = (status & 0x00003fff) - 4; in rtl_rx()
6581 * frames. They are seen as a symptom of over-mtu in rtl_rx()
6585 dev->stats.rx_dropped++; in rtl_rx()
6586 dev->stats.rx_length_errors++; in rtl_rx()
6590 skb = rtl8169_try_rx_copy(tp->Rx_databuff[entry], in rtl_rx()
6593 dev->stats.rx_dropped++; in rtl_rx()
6599 skb->protocol = eth_type_trans(skb, dev); in rtl_rx()
6603 if (skb->pkt_type == PACKET_MULTICAST) in rtl_rx()
6604 dev->stats.multicast++; in rtl_rx()
6606 napi_gro_receive(&tp->napi, skb); in rtl_rx()
6608 u64_stats_update_begin(&tp->rx_stats.syncp); in rtl_rx()
6609 tp->rx_stats.packets++; in rtl_rx()
6610 tp->rx_stats.bytes += pkt_size; in rtl_rx()
6611 u64_stats_update_end(&tp->rx_stats.syncp); in rtl_rx()
6614 desc->opts2 = 0; in rtl_rx()
6618 count = cur_rx - tp->cur_rx; in rtl_rx()
6619 tp->cur_rx = cur_rx; in rtl_rx()
6629 if (status == 0xffff || !(status & (RTL_EVENT_NAPI | tp->event_slow))) in rtl8169_interrupt()
6633 napi_schedule(&tp->napi); in rtl8169_interrupt()
6643 struct net_device *dev = tp->dev; in rtl_slow_event_work()
6646 status = rtl_get_events(tp) & tp->event_slow; in rtl_slow_event_work()
6650 switch (tp->mac_version) { in rtl_slow_event_work()
6654 /* XXX - Hack alert. See rtl_task(). */ in rtl_slow_event_work()
6655 set_bit(RTL_FLAG_TASK_RESET_PENDING, tp->wk.flags); in rtl_slow_event_work()
6665 phy_mac_interrupt(dev->phydev); in rtl_slow_event_work()
6676 /* XXX - keep rtl_slow_event_work() as first element. */ in rtl_task()
6682 struct net_device *dev = tp->dev; in rtl_task()
6688 !test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags)) in rtl_task()
6694 pending = test_and_clear_bit(rtl_work[i].bitnr, tp->wk.flags); in rtl_task()
6706 struct net_device *dev = tp->dev; in rtl8169_poll()
6707 u16 enable_mask = RTL_EVENT_NAPI | tp->event_slow; in rtl8169_poll()
6712 rtl_ack_events(tp, status & ~tp->event_slow); in rtl8169_poll()
6718 if (status & tp->event_slow) { in rtl8169_poll()
6719 enable_mask &= ~tp->event_slow; in rtl8169_poll()
6738 if (tp->mac_version > RTL_GIGA_MAC_VER_06) in rtl8169_rx_missed()
6741 dev->stats.rx_missed_errors += RTL_R32(tp, RxMissed) & 0xffffff; in rtl8169_rx_missed()
6751 pm_request_resume(&tp->pci_dev->dev); in r8169_phylink_handler()
6753 pm_runtime_idle(&tp->pci_dev->dev); in r8169_phylink_handler()
6757 phy_print_status(ndev->phydev); in r8169_phylink_handler()
6762 struct phy_device *phydev = mdiobus_get_phy(tp->mii_bus, 0); in r8169_phy_connect()
6766 phy_mode = tp->supports_gmii ? PHY_INTERFACE_MODE_GMII : in r8169_phy_connect()
6769 ret = phy_connect_direct(tp->dev, phydev, r8169_phylink_handler, in r8169_phy_connect()
6774 if (!tp->supports_gmii) in r8169_phy_connect()
6778 phydev->advertising = phydev->supported; in r8169_phy_connect()
6789 phy_stop(dev->phydev); in rtl8169_down()
6791 napi_disable(&tp->napi); in rtl8169_down()
6815 struct pci_dev *pdev = tp->pci_dev; in rtl8169_close()
6817 pm_runtime_get_sync(&pdev->dev); in rtl8169_close()
6824 bitmap_zero(tp->wk.flags, RTL_FLAG_MAX); in rtl8169_close()
6829 cancel_work_sync(&tp->wk.work); in rtl8169_close()
6831 phy_disconnect(dev->phydev); in rtl8169_close()
6835 dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray, in rtl8169_close()
6836 tp->RxPhyAddr); in rtl8169_close()
6837 dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray, in rtl8169_close()
6838 tp->TxPhyAddr); in rtl8169_close()
6839 tp->TxDescArray = NULL; in rtl8169_close()
6840 tp->RxDescArray = NULL; in rtl8169_close()
6842 pm_runtime_put_sync(&pdev->dev); in rtl8169_close()
6852 rtl8169_interrupt(pci_irq_vector(tp->pci_dev, 0), tp); in rtl8169_netpoll()
6859 struct pci_dev *pdev = tp->pci_dev; in rtl_open()
6860 int retval = -ENOMEM; in rtl_open()
6862 pm_runtime_get_sync(&pdev->dev); in rtl_open()
6868 tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8169_TX_RING_BYTES, in rtl_open()
6869 &tp->TxPhyAddr, GFP_KERNEL); in rtl_open()
6870 if (!tp->TxDescArray) in rtl_open()
6873 tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8169_RX_RING_BYTES, in rtl_open()
6874 &tp->RxPhyAddr, GFP_KERNEL); in rtl_open()
6875 if (!tp->RxDescArray) in rtl_open()
6882 INIT_WORK(&tp->wk.work, rtl_task); in rtl_open()
6889 IRQF_SHARED, dev->name, tp); in rtl_open()
6899 set_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags); in rtl_open()
6901 napi_enable(&tp->napi); in rtl_open()
6912 phy_start(dev->phydev); in rtl_open()
6917 pm_runtime_put_sync(&pdev->dev); in rtl_open()
6927 dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray, in rtl_open()
6928 tp->RxPhyAddr); in rtl_open()
6929 tp->RxDescArray = NULL; in rtl_open()
6931 dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray, in rtl_open()
6932 tp->TxPhyAddr); in rtl_open()
6933 tp->TxDescArray = NULL; in rtl_open()
6935 pm_runtime_put_noidle(&pdev->dev); in rtl_open()
6943 struct pci_dev *pdev = tp->pci_dev; in rtl8169_get_stats64()
6944 struct rtl8169_counters *counters = tp->counters; in rtl8169_get_stats64()
6947 pm_runtime_get_noresume(&pdev->dev); in rtl8169_get_stats64()
6949 if (netif_running(dev) && pm_runtime_active(&pdev->dev)) in rtl8169_get_stats64()
6953 start = u64_stats_fetch_begin_irq(&tp->rx_stats.syncp); in rtl8169_get_stats64()
6954 stats->rx_packets = tp->rx_stats.packets; in rtl8169_get_stats64()
6955 stats->rx_bytes = tp->rx_stats.bytes; in rtl8169_get_stats64()
6956 } while (u64_stats_fetch_retry_irq(&tp->rx_stats.syncp, start)); in rtl8169_get_stats64()
6959 start = u64_stats_fetch_begin_irq(&tp->tx_stats.syncp); in rtl8169_get_stats64()
6960 stats->tx_packets = tp->tx_stats.packets; in rtl8169_get_stats64()
6961 stats->tx_bytes = tp->tx_stats.bytes; in rtl8169_get_stats64()
6962 } while (u64_stats_fetch_retry_irq(&tp->tx_stats.syncp, start)); in rtl8169_get_stats64()
6964 stats->rx_dropped = dev->stats.rx_dropped; in rtl8169_get_stats64()
6965 stats->tx_dropped = dev->stats.tx_dropped; in rtl8169_get_stats64()
6966 stats->rx_length_errors = dev->stats.rx_length_errors; in rtl8169_get_stats64()
6967 stats->rx_errors = dev->stats.rx_errors; in rtl8169_get_stats64()
6968 stats->rx_crc_errors = dev->stats.rx_crc_errors; in rtl8169_get_stats64()
6969 stats->rx_fifo_errors = dev->stats.rx_fifo_errors; in rtl8169_get_stats64()
6970 stats->rx_missed_errors = dev->stats.rx_missed_errors; in rtl8169_get_stats64()
6971 stats->multicast = dev->stats.multicast; in rtl8169_get_stats64()
6977 if (pm_runtime_active(&pdev->dev)) in rtl8169_get_stats64()
6984 stats->tx_errors = le64_to_cpu(counters->tx_errors) - in rtl8169_get_stats64()
6985 le64_to_cpu(tp->tc_offset.tx_errors); in rtl8169_get_stats64()
6986 stats->collisions = le32_to_cpu(counters->tx_multi_collision) - in rtl8169_get_stats64()
6987 le32_to_cpu(tp->tc_offset.tx_multi_collision); in rtl8169_get_stats64()
6988 stats->tx_aborted_errors = le16_to_cpu(counters->tx_aborted) - in rtl8169_get_stats64()
6989 le16_to_cpu(tp->tc_offset.tx_aborted); in rtl8169_get_stats64()
6991 pm_runtime_put_noidle(&pdev->dev); in rtl8169_get_stats64()
7001 phy_stop(dev->phydev); in rtl8169_net_suspend()
7006 napi_disable(&tp->napi); in rtl8169_net_suspend()
7008 bitmap_zero(tp->wk.flags, RTL_FLAG_MAX); in rtl8169_net_suspend()
7024 clk_disable_unprepare(tp->clk); in rtl8169_suspend()
7038 phy_start(tp->dev->phydev); in __rtl8169_resume()
7041 napi_enable(&tp->napi); in __rtl8169_resume()
7042 set_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags); in __rtl8169_resume()
7054 clk_prepare_enable(tp->clk); in rtl8169_resume()
7068 if (!tp->TxDescArray) in rtl8169_runtime_suspend()
7089 rtl_rar_set(tp, dev->dev_addr); in rtl8169_runtime_resume()
7091 if (!tp->TxDescArray) in rtl8169_runtime_resume()
7095 __rtl8169_set_wol(tp, tp->saved_wolopts); in rtl8169_runtime_resume()
7111 return -EBUSY; in rtl8169_runtime_idle()
7137 switch (tp->mac_version) { in rtl_wol_shutdown_quirk()
7141 pci_clear_master(tp->pci_dev); in rtl_wol_shutdown_quirk()
7160 rtl_rar_set(tp, dev->perm_addr); in rtl_shutdown()
7165 if (tp->saved_wolopts) { in rtl_shutdown()
7183 netif_napi_del(&tp->napi); in rtl_remove_one()
7186 mdiobus_unregister(tp->mii_bus); in rtl_remove_one()
7191 pm_runtime_get_noresume(&pdev->dev); in rtl_remove_one()
7194 rtl_rar_set(tp, dev->perm_addr); in rtl_remove_one()
7250 switch (tp->mac_version) { in rtl_alloc_irq()
7264 return pci_alloc_irq_vectors(tp->pci_dev, 1, 1, flags); in rtl_alloc_irq()
7279 struct rtl8169_private *tp = mii_bus->priv; in r8169_mdio_read_reg()
7282 return -ENODEV; in r8169_mdio_read_reg()
7290 struct rtl8169_private *tp = mii_bus->priv; in r8169_mdio_write_reg()
7293 return -ENODEV; in r8169_mdio_write_reg()
7302 struct pci_dev *pdev = tp->pci_dev; in r8169_mdio_register()
7307 new_bus = devm_mdiobus_alloc(&pdev->dev); in r8169_mdio_register()
7309 return -ENOMEM; in r8169_mdio_register()
7311 new_bus->name = "r8169"; in r8169_mdio_register()
7312 new_bus->priv = tp; in r8169_mdio_register()
7313 new_bus->parent = &pdev->dev; in r8169_mdio_register()
7314 new_bus->irq[0] = PHY_IGNORE_INTERRUPT; in r8169_mdio_register()
7315 snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x", in r8169_mdio_register()
7316 PCI_DEVID(pdev->bus->number, pdev->devfn)); in r8169_mdio_register()
7318 new_bus->read = r8169_mdio_read_reg; in r8169_mdio_register()
7319 new_bus->write = r8169_mdio_write_reg; in r8169_mdio_register()
7328 return -ENODEV; in r8169_mdio_register()
7334 tp->mii_bus = new_bus; in r8169_mdio_register()
7343 tp->ocp_base = OCP_STD_PHY_BASE; in rtl_hw_init_8168g()
7380 switch (tp->mac_version) { in rtl_hw_initialize()
7395 switch (tp->mac_version) { in rtl_chip_supports_csum_v2()
7406 /* Non-GBit versions don't support jumbo frames */ in rtl_jumbo_max()
7407 if (!tp->supports_gmii) in rtl_jumbo_max()
7410 switch (tp->mac_version) { in rtl_jumbo_max()
7434 const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data; in rtl_init_one()
7440 dev = devm_alloc_etherdev(&pdev->dev, sizeof (*tp)); in rtl_init_one()
7442 return -ENOMEM; in rtl_init_one()
7444 SET_NETDEV_DEV(dev, &pdev->dev); in rtl_init_one()
7445 dev->netdev_ops = &rtl_netdev_ops; in rtl_init_one()
7447 tp->dev = dev; in rtl_init_one()
7448 tp->pci_dev = pdev; in rtl_init_one()
7449 tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT); in rtl_init_one()
7450 tp->supports_gmii = cfg->has_gmii; in rtl_init_one()
7453 tp->clk = devm_clk_get(&pdev->dev, "ether_clk"); in rtl_init_one()
7454 if (IS_ERR(tp->clk)) { in rtl_init_one()
7455 rc = PTR_ERR(tp->clk); in rtl_init_one()
7456 if (rc == -ENOENT) { in rtl_init_one()
7457 /* clk-core allows NULL (for suspend / resume) */ in rtl_init_one()
7458 tp->clk = NULL; in rtl_init_one()
7459 } else if (rc == -EPROBE_DEFER) { in rtl_init_one()
7462 dev_err(&pdev->dev, "failed to get clk: %d\n", rc); in rtl_init_one()
7466 rc = clk_prepare_enable(tp->clk); in rtl_init_one()
7468 dev_err(&pdev->dev, "failed to enable clk: %d\n", rc); in rtl_init_one()
7472 rc = devm_add_action_or_reset(&pdev->dev, rtl_disable_clk, in rtl_init_one()
7473 tp->clk); in rtl_init_one()
7486 dev_err(&pdev->dev, "enable failure\n"); in rtl_init_one()
7491 dev_info(&pdev->dev, "Mem-Wr-Inval unavailable\n"); in rtl_init_one()
7494 region = ffs(pci_select_bars(pdev, IORESOURCE_MEM)) - 1; in rtl_init_one()
7496 dev_err(&pdev->dev, "no MMIO resource found\n"); in rtl_init_one()
7497 return -ENODEV; in rtl_init_one()
7502 dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n"); in rtl_init_one()
7503 return -ENODEV; in rtl_init_one()
7508 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); in rtl_init_one()
7512 tp->mmio_addr = pcim_iomap_table(pdev)[region]; in rtl_init_one()
7515 dev_info(&pdev->dev, "not PCI Express\n"); in rtl_init_one()
7518 rtl8169_get_mac_version(tp, cfg->default_ver); in rtl_init_one()
7521 dev_err(&pdev->dev, "TBI fiber mode not supported\n"); in rtl_init_one()
7522 return -ENODEV; in rtl_init_one()
7525 tp->cp_cmd = RTL_R16(tp, CPlusCmd); in rtl_init_one()
7528 (use_dac == 1 || (use_dac == -1 && pci_is_pcie(pdev) && in rtl_init_one()
7529 tp->mac_version >= RTL_GIGA_MAC_VER_18)) && in rtl_init_one()
7533 /* CPlusCmd Dual Access Cycle is only needed for non-PCIe */ in rtl_init_one()
7535 tp->cp_cmd |= PCIDAC; in rtl_init_one()
7536 dev->features |= NETIF_F_HIGHDMA; in rtl_init_one()
7540 dev_err(&pdev->dev, "DMA configuration failed\n"); in rtl_init_one()
7562 chipset = tp->mac_version; in rtl_init_one()
7566 dev_err(&pdev->dev, "Can't allocate interrupt\n"); in rtl_init_one()
7570 tp->saved_wolopts = __rtl8169_get_wol(tp); in rtl_init_one()
7572 mutex_init(&tp->wk.mutex); in rtl_init_one()
7573 u64_stats_init(&tp->rx_stats.syncp); in rtl_init_one()
7574 u64_stats_init(&tp->tx_stats.syncp); in rtl_init_one()
7577 switch (tp->mac_version) { in rtl_init_one()
7591 dev->dev_addr[i] = RTL_R8(tp, MAC0 + i); in rtl_init_one()
7593 dev->ethtool_ops = &rtl8169_ethtool_ops; in rtl_init_one()
7594 dev->watchdog_timeo = RTL8169_TX_TIMEOUT; in rtl_init_one()
7596 netif_napi_add(dev, &tp->napi, rtl8169_poll, NAPI_POLL_WEIGHT); in rtl_init_one()
7598 /* don't enable SG, IP_CSUM and TSO by default - it might not work in rtl_init_one()
7600 dev->features |= NETIF_F_RXCSUM | in rtl_init_one()
7603 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO | in rtl_init_one()
7606 dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO | in rtl_init_one()
7608 dev->priv_flags |= IFF_LIVE_ADDR_CHANGE; in rtl_init_one()
7610 tp->cp_cmd |= RxChkSum | RxVlan; in rtl_init_one()
7616 if (tp->mac_version == RTL_GIGA_MAC_VER_05) in rtl_init_one()
7618 dev->hw_features &= ~NETIF_F_HW_VLAN_CTAG_RX; in rtl_init_one()
7621 tp->tso_csum = rtl8169_tso_csum_v2; in rtl_init_one()
7622 dev->hw_features |= NETIF_F_IPV6_CSUM | NETIF_F_TSO6; in rtl_init_one()
7624 tp->tso_csum = rtl8169_tso_csum_v1; in rtl_init_one()
7627 dev->hw_features |= NETIF_F_RXALL; in rtl_init_one()
7628 dev->hw_features |= NETIF_F_RXFCS; in rtl_init_one()
7630 /* MTU range: 60 - hw-specific max */ in rtl_init_one()
7631 dev->min_mtu = ETH_ZLEN; in rtl_init_one()
7633 dev->max_mtu = jumbo_max; in rtl_init_one()
7635 tp->hw_start = cfg->hw_start; in rtl_init_one()
7636 tp->event_slow = cfg->event_slow; in rtl_init_one()
7637 tp->coalesce_info = cfg->coalesce_info; in rtl_init_one()
7639 tp->rtl_fw = RTL_FIRMWARE_UNKNOWN; in rtl_init_one()
7641 tp->counters = dmam_alloc_coherent (&pdev->dev, sizeof(*tp->counters), in rtl_init_one()
7642 &tp->counters_phys_addr, in rtl_init_one()
7644 if (!tp->counters) in rtl_init_one()
7645 return -ENOMEM; in rtl_init_one()
7661 rtl_chip_infos[chipset].name, dev->dev_addr, in rtl_init_one()
7668 jumbo_max, tp->mac_version <= RTL_GIGA_MAC_VER_06 ? in rtl_init_one()
7675 pm_runtime_put_sync(&pdev->dev); in rtl_init_one()
7680 mdiobus_unregister(tp->mii_bus); in rtl_init_one()