Lines Matching full:axi
3 * Definitions for Xilinx Axi Ethernet device driver.
71 /* Axi DMA Register definitions */
141 /* Axi Ethernet registers definition */
182 /* Bit Masks for Axi Ethernet RAF register */
201 /* Bit Masks for Axi Ethernet TPF and IFGP registers */
206 /* Bit Masks for Axi Ethernet IS, IE and IP registers, Same masks apply
226 /* Bit masks for Axi Ethernet VLAN TPID Word 0 register */
230 /* Bit masks for Axi Ethernet VLAN TPID Word 1 register */
234 /* Bit masks for Axi Ethernet RCW1 register */
250 /* Bit masks for Axi Ethernet TC register */
260 /* Bit masks for Axi Ethernet FCC register */
264 /* Bit masks for Axi Ethernet EMMC register */
276 /* Bit masks for Axi Ethernet PHYC register */
288 /* Bit masks for Axi Ethernet MDIO interface MC register */
292 /* Bit masks for Axi Ethernet MDIO interface MCR register */
304 /* Bit masks for Axi Ethernet MDIO interface MIS, MIP, MIE, MIC registers */
307 /* Bit masks for Axi Ethernet UAW1 register */
313 /* Bit masks for Axi Ethernet FMI register */
319 /* Defines for different options for C_PHY_TYPE parameter in Axi Ethernet IP */
330 /* Axi Ethernet Synthesis features */
345 * struct axidma_bd - Axi Dma buffer descriptor layout
390 * @dma_err_tasklet: Tasklet structure to process Axi DMA errors
462 * struct axiethernet_option - Used to set axi ethernet hardware options
474 * axienet_ior - Memory mapped Axi Ethernet register read
476 * @offset: Address offset from the base address of Axi Ethernet core
478 * Return: The contents of the Axi Ethernet register
488 * axienet_iow - Memory mapped Axi Ethernet register write
490 * @offset: Address offset from the base address of Axi Ethernet core
491 * @value: Value to be written into the Axi Ethernet register
493 * This function writes the desired value into the corresponding Axi Ethernet