Lines Matching +full:dte +full:- +full:mode
12 * - Only DTE (external clock) support with NRZ and NRZI encodings
13 * - wanXL100 will require minor driver modifications, no access to hw
32 #include <linux/dma-mapping.h>
45 /* MAILBOX #1 - PUTS COMMANDS */
48 #define MBX1_CMD_BSWAP 0x8C000001 /* little-endian Byte Swap Mode */
50 #define MBX1_CMD_BSWAP 0x8C000000 /* big-endian Byte Swap Mode */
53 /* MAILBOX #2 - DRAM SIZE */
61 int node; /* physical port #0 - 3 */
84 struct port ports[0]; /* 1 - 4 port structures follow */
91 return (struct port *)dev_to_hdlc(dev)->priv; in dev_to_port()
97 return &port->card->status->port_status[port->node]; in get_status()
120 u32 value = get_status(port)->cable; in wanxl_cable_intr()
122 const char *cable, *pm, *dte = "", *dsr = "", *dcd = ""; in wanxl_cable_intr() local
149 dte = (value & STATUS_CABLE_DCE) ? " DCE" : " DTE"; in wanxl_cable_intr()
151 netdev_info(port->dev, "%s%s module, %s cable%s%s\n", in wanxl_cable_intr()
152 pm, dte, cable, dsr, dcd); in wanxl_cable_intr()
155 netif_carrier_on(port->dev); in wanxl_cable_intr()
157 netif_carrier_off(port->dev); in wanxl_cable_intr()
165 struct net_device *dev = port->dev; in wanxl_tx_intr()
167 desc_t *desc = &get_status(port)->tx_descs[port->tx_in]; in wanxl_tx_intr()
168 struct sk_buff *skb = port->tx_skbs[port->tx_in]; in wanxl_tx_intr()
170 switch (desc->stat) { in wanxl_tx_intr()
177 dev->stats.tx_errors++; in wanxl_tx_intr()
178 dev->stats.tx_fifo_errors++; in wanxl_tx_intr()
182 dev->stats.tx_packets++; in wanxl_tx_intr()
183 dev->stats.tx_bytes += skb->len; in wanxl_tx_intr()
185 desc->stat = PACKET_EMPTY; /* Free descriptor */ in wanxl_tx_intr()
186 pci_unmap_single(port->card->pdev, desc->address, skb->len, in wanxl_tx_intr()
189 port->tx_in = (port->tx_in + 1) % TX_BUFFERS; in wanxl_tx_intr()
199 while (desc = &card->status->rx_descs[card->rx_in], in wanxl_rx_intr()
200 desc->stat != PACKET_EMPTY) { in wanxl_rx_intr()
201 if ((desc->stat & PACKET_PORT_MASK) > card->n_ports) in wanxl_rx_intr()
203 pci_name(card->pdev)); in wanxl_rx_intr()
205 struct sk_buff *skb = card->rx_skbs[card->rx_in]; in wanxl_rx_intr()
206 struct port *port = &card->ports[desc->stat & in wanxl_rx_intr()
208 struct net_device *dev = port->dev; in wanxl_rx_intr()
211 dev->stats.rx_dropped++; in wanxl_rx_intr()
213 pci_unmap_single(card->pdev, desc->address, in wanxl_rx_intr()
216 skb_put(skb, desc->length); in wanxl_rx_intr()
219 printk(KERN_DEBUG "%s RX(%i):", dev->name, in wanxl_rx_intr()
220 skb->len); in wanxl_rx_intr()
223 dev->stats.rx_packets++; in wanxl_rx_intr()
224 dev->stats.rx_bytes += skb->len; in wanxl_rx_intr()
225 skb->protocol = hdlc_type_trans(skb, dev); in wanxl_rx_intr()
232 desc->address = skb ? in wanxl_rx_intr()
233 pci_map_single(card->pdev, skb->data, in wanxl_rx_intr()
236 card->rx_skbs[card->rx_in] = skb; in wanxl_rx_intr()
239 desc->stat = PACKET_EMPTY; /* Free descriptor */ in wanxl_rx_intr()
240 card->rx_in = (card->rx_in + 1) % RX_QUEUE_LENGTH; in wanxl_rx_intr()
254 while((stat = readl(card->plx + PLX_DOORBELL_FROM_CARD)) != 0) { in wanxl_intr()
256 writel(stat, card->plx + PLX_DOORBELL_FROM_CARD); in wanxl_intr()
258 for (i = 0; i < card->n_ports; i++) { in wanxl_intr()
260 wanxl_tx_intr(&card->ports[i]); in wanxl_intr()
262 wanxl_cable_intr(&card->ports[i]); in wanxl_intr()
278 spin_lock(&port->lock); in wanxl_xmit()
280 desc = &get_status(port)->tx_descs[port->tx_out]; in wanxl_xmit()
281 if (desc->stat != PACKET_EMPTY) { in wanxl_xmit()
282 /* should never happen - previous xmit should stop queue */ in wanxl_xmit()
284 printk(KERN_DEBUG "%s: transmitter buffer full\n", dev->name); in wanxl_xmit()
287 spin_unlock(&port->lock); in wanxl_xmit()
292 printk(KERN_DEBUG "%s TX(%i):", dev->name, skb->len); in wanxl_xmit()
296 port->tx_skbs[port->tx_out] = skb; in wanxl_xmit()
297 desc->address = pci_map_single(port->card->pdev, skb->data, skb->len, in wanxl_xmit()
299 desc->length = skb->len; in wanxl_xmit()
300 desc->stat = PACKET_FULL; in wanxl_xmit()
301 writel(1 << (DOORBELL_TO_CARD_TX_0 + port->node), in wanxl_xmit()
302 port->card->plx + PLX_DOORBELL_TO_CARD); in wanxl_xmit()
304 port->tx_out = (port->tx_out + 1) % TX_BUFFERS; in wanxl_xmit()
306 if (get_status(port)->tx_descs[port->tx_out].stat != PACKET_EMPTY) { in wanxl_xmit()
309 printk(KERN_DEBUG "%s: transmitter buffer full\n", dev->name); in wanxl_xmit()
313 spin_unlock(&port->lock); in wanxl_xmit()
326 return -EINVAL; in wanxl_attach()
333 return -EINVAL; in wanxl_attach()
335 get_status(port)->encoding = encoding; in wanxl_attach()
336 get_status(port)->parity = parity; in wanxl_attach()
351 switch (ifr->ifr_settings.type) { in wanxl_ioctl()
353 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL; in wanxl_ioctl()
354 if (ifr->ifr_settings.size < size) { in wanxl_ioctl()
355 ifr->ifr_settings.size = size; /* data size wanted */ in wanxl_ioctl()
356 return -ENOBUFS; in wanxl_ioctl()
359 line.clock_type = get_status(port)->clocking; in wanxl_ioctl()
363 if (copy_to_user(ifr->ifr_settings.ifs_ifsu.sync, &line, size)) in wanxl_ioctl()
364 return -EFAULT; in wanxl_ioctl()
369 return -EPERM; in wanxl_ioctl()
370 if (dev->flags & IFF_UP) in wanxl_ioctl()
371 return -EBUSY; in wanxl_ioctl()
373 if (copy_from_user(&line, ifr->ifr_settings.ifs_ifsu.sync, in wanxl_ioctl()
375 return -EFAULT; in wanxl_ioctl()
379 return -EINVAL; /* No such clock setting */ in wanxl_ioctl()
382 return -EINVAL; in wanxl_ioctl()
384 get_status(port)->clocking = line.clock_type; in wanxl_ioctl()
397 u8 __iomem *dbr = port->card->plx + PLX_DOORBELL_TO_CARD; in wanxl_open()
401 if (get_status(port)->open) { in wanxl_open()
403 return -EIO; in wanxl_open()
408 port->tx_in = port->tx_out = 0; in wanxl_open()
410 get_status(port)->tx_descs[i].stat = PACKET_EMPTY; in wanxl_open()
412 writel(1 << (DOORBELL_TO_CARD_OPEN_0 + port->node), dbr); in wanxl_open()
416 if (get_status(port)->open) { in wanxl_open()
424 writel(1 << (DOORBELL_TO_CARD_CLOSE_0 + port->node), dbr); in wanxl_open()
425 return -EFAULT; in wanxl_open()
438 writel(1 << (DOORBELL_TO_CARD_CLOSE_0 + port->node), in wanxl_close()
439 port->card->plx + PLX_DOORBELL_TO_CARD); in wanxl_close()
443 if (!get_status(port)->open) in wanxl_close()
447 if (get_status(port)->open) in wanxl_close()
453 desc_t *desc = &get_status(port)->tx_descs[i]; in wanxl_close()
455 if (desc->stat != PACKET_EMPTY) { in wanxl_close()
456 desc->stat = PACKET_EMPTY; in wanxl_close()
457 pci_unmap_single(port->card->pdev, desc->address, in wanxl_close()
458 port->tx_skbs[i]->len, in wanxl_close()
460 dev_kfree_skb(port->tx_skbs[i]); in wanxl_close()
472 dev->stats.rx_over_errors = get_status(port)->rx_overruns; in wanxl_get_stats()
473 dev->stats.rx_frame_errors = get_status(port)->rx_frame_errors; in wanxl_get_stats()
474 dev->stats.rx_errors = dev->stats.rx_over_errors + in wanxl_get_stats()
475 dev->stats.rx_frame_errors; in wanxl_get_stats()
476 return &dev->stats; in wanxl_get_stats()
485 writel(cmd, card->plx + PLX_MAILBOX_1); in wanxl_puts_command()
487 if (readl(card->plx + PLX_MAILBOX_1) == 0) in wanxl_puts_command()
493 return -1; in wanxl_puts_command()
500 u32 old_value = readl(card->plx + PLX_CONTROL) & ~PLX_CTL_RESET; in wanxl_reset()
502 writel(0x80, card->plx + PLX_MAILBOX_0); in wanxl_reset()
503 writel(old_value | PLX_CTL_RESET, card->plx + PLX_CONTROL); in wanxl_reset()
504 readl(card->plx + PLX_CONTROL); /* wait for posted write */ in wanxl_reset()
506 writel(old_value, card->plx + PLX_CONTROL); in wanxl_reset()
507 readl(card->plx + PLX_CONTROL); /* wait for posted write */ in wanxl_reset()
517 for (i = 0; i < card->n_ports; i++) { in wanxl_pci_remove_one()
518 unregister_hdlc_device(card->ports[i].dev); in wanxl_pci_remove_one()
519 free_netdev(card->ports[i].dev); in wanxl_pci_remove_one()
523 if (card->irq) in wanxl_pci_remove_one()
524 free_irq(card->irq, card); in wanxl_pci_remove_one()
529 if (card->rx_skbs[i]) { in wanxl_pci_remove_one()
530 pci_unmap_single(card->pdev, in wanxl_pci_remove_one()
531 card->status->rx_descs[i].address, in wanxl_pci_remove_one()
533 dev_kfree_skb(card->rx_skbs[i]); in wanxl_pci_remove_one()
536 if (card->plx) in wanxl_pci_remove_one()
537 iounmap(card->plx); in wanxl_pci_remove_one()
539 if (card->status) in wanxl_pci_remove_one()
541 card->status, card->status_address); in wanxl_pci_remove_one()
579 but PLX9060 DMA does 32-bits for actual packet data transfers */ in wanxl_pci_init_one()
589 return -EIO; in wanxl_pci_init_one()
598 switch (pdev->device) { in wanxl_pci_init_one()
609 return -ENOBUFS; in wanxl_pci_init_one()
613 card->pdev = pdev; in wanxl_pci_init_one()
615 card->status = pci_alloc_consistent(pdev, in wanxl_pci_init_one()
617 &card->status_address); in wanxl_pci_init_one()
618 if (card->status == NULL) { in wanxl_pci_init_one()
620 return -ENOBUFS; in wanxl_pci_init_one()
626 (unsigned long long)card->status_address); in wanxl_pci_init_one()
631 to indicate the card can do 32-bit DMA addressing */ in wanxl_pci_init_one()
636 return -EIO; in wanxl_pci_init_one()
642 card->plx = ioremap_nocache(plx_phy, 0x70); in wanxl_pci_init_one()
643 if (!card->plx) { in wanxl_pci_init_one()
646 return -EFAULT; in wanxl_pci_init_one()
654 while ((stat = readl(card->plx + PLX_MAILBOX_0)) != 0) { in wanxl_pci_init_one()
659 return -ENODEV; in wanxl_pci_init_one()
663 case 0x00: /* hmm - PUTS completed with non-zero code? */ in wanxl_pci_init_one()
671 return -ENODEV; in wanxl_pci_init_one()
677 /* get on-board memory size (PUTS detects no more than 4 MB) */ in wanxl_pci_init_one()
678 ramsize = readl(card->plx + PLX_MAILBOX_2) & MBX2_MEMSZ_MASK; in wanxl_pci_init_one()
680 /* set up on-board RAM mapping */ in wanxl_pci_init_one()
687 pr_warn("%s: no enough on-board RAM (%u bytes detected, %u bytes required)\n", in wanxl_pci_init_one()
692 return -ENODEV; in wanxl_pci_init_one()
696 pr_warn("%s: unable to Set Byte Swap Mode\n", pci_name(pdev)); in wanxl_pci_init_one()
698 return -ENODEV; in wanxl_pci_init_one()
703 card->rx_skbs[i] = skb; in wanxl_pci_init_one()
705 card->status->rx_descs[i].address = in wanxl_pci_init_one()
706 pci_map_single(card->pdev, skb->data, in wanxl_pci_init_one()
715 return -EFAULT; in wanxl_pci_init_one()
722 writel(card->status_address + in wanxl_pci_init_one()
723 (void *)&card->status->port_status[i] - in wanxl_pci_init_one()
724 (void *)card->status, mem + PDM_OFFSET + 4 + i * 4); in wanxl_pci_init_one()
725 writel(card->status_address, mem + PDM_OFFSET + 20); in wanxl_pci_init_one()
729 writel(0, card->plx + PLX_MAILBOX_5); in wanxl_pci_init_one()
734 return -ENODEV; in wanxl_pci_init_one()
739 if ((stat = readl(card->plx + PLX_MAILBOX_5)) != 0) in wanxl_pci_init_one()
748 return -ENODEV; in wanxl_pci_init_one()
756 pci_name(pdev), plx_phy, ramsize / 1024, mem_phy, pdev->irq); in wanxl_pci_init_one()
759 if (request_irq(pdev->irq, wanxl_intr, IRQF_SHARED, "wanXL", card)) { in wanxl_pci_init_one()
761 pci_name(pdev), pdev->irq); in wanxl_pci_init_one()
763 return -EBUSY; in wanxl_pci_init_one()
765 card->irq = pdev->irq; in wanxl_pci_init_one()
769 struct port *port = &card->ports[i]; in wanxl_pci_init_one()
775 return -ENOMEM; in wanxl_pci_init_one()
778 port->dev = dev; in wanxl_pci_init_one()
780 spin_lock_init(&port->lock); in wanxl_pci_init_one()
781 dev->tx_queue_len = 50; in wanxl_pci_init_one()
782 dev->netdev_ops = &wanxl_ops; in wanxl_pci_init_one()
783 hdlc->attach = wanxl_attach; in wanxl_pci_init_one()
784 hdlc->xmit = wanxl_xmit; in wanxl_pci_init_one()
785 port->card = card; in wanxl_pci_init_one()
786 port->node = i; in wanxl_pci_init_one()
787 get_status(port)->clocking = CLOCK_EXT; in wanxl_pci_init_one()
793 return -ENOBUFS; in wanxl_pci_init_one()
795 card->n_ports++; in wanxl_pci_init_one()
801 i ? "," : "", i, card->ports[i].dev->name); in wanxl_pci_init_one()
805 wanxl_cable_intr(&card->ports[i]); /* get carrier status etc.*/ in wanxl_pci_init_one()