Lines Matching +full:max +full:- +full:channels +full:- +full:clocked
30 * 512Kbit->1Mbit depending on motherboard.
63 * z8530_read_port - Architecture specific interface function
87 * z8530_write_port - Architecture specific interface function
116 * read_zsreg - Read a register from a Z85230
129 z8530_write_port(c->ctrlio, reg); in read_zsreg()
130 return z8530_read_port(c->ctrlio); in read_zsreg()
134 * read_zsdata - Read the data port of a Z8530 channel
144 r=z8530_read_port(c->dataio); in read_zsdata()
149 * write_zsreg - Write to a Z8530 channel register
158 * Assumes c->lock is held.
163 z8530_write_port(c->ctrlio, reg); in write_zsreg()
164 z8530_write_port(c->ctrlio, val); in write_zsreg()
169 * write_zsctrl - Write to a Z8530 control register
178 z8530_write_port(c->ctrlio, val); in write_zsctrl()
182 * write_zsdata - Write to a Z8530 control register
192 z8530_write_port(c->dataio, val); in write_zsdata()
212 * Data clocked by telco end. This is the correct data for the UK
265 * z8530_flush_fifo - Flush on chip RX FIFO
282 if(c->dev->type==Z85230) in z8530_flush_fifo()
292 * z8530_rtsdtr - Control the outgoing DTS/RTS line
305 c->regs[5] |= (RTS | DTR); in z8530_rtsdtr()
307 c->regs[5] &= ~(RTS | DTR); in z8530_rtsdtr()
308 write_zsreg(c, R5, c->regs[5]); in z8530_rtsdtr()
312 * z8530_rx - Handle a PIO receive event
323 * by them as short as possible in all circumstances - clocks cost
325 * other code - this is true in the RT case too.
350 if(c->count < c->max) in z8530_rx()
352 *c->dptr++=ch; in z8530_rx()
353 c->count++; in z8530_rx()
365 if(c->skb) in z8530_rx()
366 c->dptr=c->skb->data; in z8530_rx()
367 c->count=0; in z8530_rx()
370 pr_warn("%s: overrun\n", c->dev->name); in z8530_rx()
371 c->rx_overrun++; in z8530_rx()
375 c->rx_crc_err++; in z8530_rx()
400 * z8530_tx - Handle a PIO transmit event
411 while(c->txcount) { in z8530_tx()
415 c->txcount--; in z8530_tx()
419 write_zsreg(c, R8, *c->tx_ptr++); in z8530_tx()
422 if(c->txcount==0) in z8530_tx()
425 write_zsreg(c, R10, c->regs[10]&~ABUNDER); in z8530_tx()
431 * End of frame TX - fire another one in z8530_tx()
441 * z8530_status - Handle a PIO status exception
455 altered = chan->status ^ status; in z8530_status()
457 chan->status = status; in z8530_status()
460 /* printk("%s: Tx underrun.\n", chan->dev->name); */ in z8530_status()
461 chan->netdevice->stats.tx_fifo_errors++; in z8530_status()
466 if (altered & chan->dcdcheck) in z8530_status()
468 if (status & chan->dcdcheck) { in z8530_status()
469 pr_info("%s: DCD raised\n", chan->dev->name); in z8530_status()
470 write_zsreg(chan, R3, chan->regs[3] | RxENABLE); in z8530_status()
471 if (chan->netdevice) in z8530_status()
472 netif_carrier_on(chan->netdevice); in z8530_status()
474 pr_info("%s: DCD lost\n", chan->dev->name); in z8530_status()
475 write_zsreg(chan, R3, chan->regs[3] & ~RxENABLE); in z8530_status()
477 if (chan->netdevice) in z8530_status()
478 netif_carrier_off(chan->netdevice); in z8530_status()
495 * z8530_dma_rx - Handle a DMA RX event
506 if(chan->rxdma_on) in z8530_dma_rx()
531 * z8530_dma_tx - Handle a DMA TX event
540 if(!chan->dma_tx) in z8530_dma_tx()
547 pr_err("DMA tx - bogus event!\n"); in z8530_dma_tx()
552 * z8530_dma_status - Handle a DMA status exception
566 altered=chan->status^status; in z8530_dma_status()
568 chan->status=status; in z8530_dma_status()
571 if(chan->dma_tx) in z8530_dma_status()
578 disable_dma(chan->txdma); in z8530_dma_status()
579 clear_dma_ff(chan->txdma); in z8530_dma_status()
580 chan->txdma_on=0; in z8530_dma_status()
586 if (altered & chan->dcdcheck) in z8530_dma_status()
588 if (status & chan->dcdcheck) { in z8530_dma_status()
589 pr_info("%s: DCD raised\n", chan->dev->name); in z8530_dma_status()
590 write_zsreg(chan, R3, chan->regs[3] | RxENABLE); in z8530_dma_status()
591 if (chan->netdevice) in z8530_dma_status()
592 netif_carrier_on(chan->netdevice); in z8530_dma_status()
594 pr_info("%s: DCD lost\n", chan->dev->name); in z8530_dma_status()
595 write_zsreg(chan, R3, chan->regs[3] & ~RxENABLE); in z8530_dma_status()
597 if (chan->netdevice) in z8530_dma_status()
598 netif_carrier_off(chan->netdevice); in z8530_dma_status()
619 * z8530_rx_clear - Handle RX events from a stopped chip
648 * z8530_tx_clear - Handle TX events from a stopped chip
663 * z8530_status_clear - Handle status events from a stopped chip
690 * z8530_interrupt - Handle an interrupt from a Z8530
695 * We scan both the channels on the chip for events and then call
697 * We have to use callback functions because the two channels can be
702 * channel). c->lock for both channels points to dev->lock
715 pr_err("IRQ re-enter\n"); in z8530_interrupt()
720 spin_lock(&dev->lock); in z8530_interrupt()
725 intr = read_zsreg(&dev->chanA, R3); in z8530_interrupt()
732 /* Now walk the chip and see what it is wanting - it may be in z8530_interrupt()
735 irqs=dev->chanA.irqs; in z8530_interrupt()
740 irqs->rx(&dev->chanA); in z8530_interrupt()
742 irqs->tx(&dev->chanA); in z8530_interrupt()
744 irqs->status(&dev->chanA); in z8530_interrupt()
747 irqs=dev->chanB.irqs; in z8530_interrupt()
752 irqs->rx(&dev->chanB); in z8530_interrupt()
754 irqs->tx(&dev->chanB); in z8530_interrupt()
756 irqs->status(&dev->chanB); in z8530_interrupt()
759 spin_unlock(&dev->lock); in z8530_interrupt()
761 pr_err("%s: interrupt jammed - abort(0x%X)!\n", in z8530_interrupt()
762 dev->name, intr); in z8530_interrupt()
780 * z8530_sync_open - Open a Z8530 channel for PIO
792 spin_lock_irqsave(c->lock, flags); in z8530_sync_open()
794 c->sync = 1; in z8530_sync_open()
795 c->mtu = dev->mtu+64; in z8530_sync_open()
796 c->count = 0; in z8530_sync_open()
797 c->skb = NULL; in z8530_sync_open()
798 c->skb2 = NULL; in z8530_sync_open()
799 c->irqs = &z8530_sync; in z8530_sync_open()
805 c->dma_tx = 0; in z8530_sync_open()
806 c->regs[R1]|=TxINT_ENAB; in z8530_sync_open()
807 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_open()
808 write_zsreg(c, R3, c->regs[R3]|RxENABLE); in z8530_sync_open()
810 spin_unlock_irqrestore(c->lock, flags); in z8530_sync_open()
818 * z8530_sync_close - Close a PIO Z8530 channel
831 spin_lock_irqsave(c->lock, flags); in z8530_sync_close()
832 c->irqs = &z8530_nop; in z8530_sync_close()
833 c->max = 0; in z8530_sync_close()
834 c->sync = 0; in z8530_sync_close()
837 write_zsreg(c, R3, c->regs[R3]); in z8530_sync_close()
840 spin_unlock_irqrestore(c->lock, flags); in z8530_sync_close()
847 * z8530_sync_dma_open - Open a Z8530 for DMA I/O
852 * ISA DMA channels must be available for this to work. We assume ISA
860 c->sync = 1; in z8530_sync_dma_open()
861 c->mtu = dev->mtu+64; in z8530_sync_dma_open()
862 c->count = 0; in z8530_sync_dma_open()
863 c->skb = NULL; in z8530_sync_dma_open()
864 c->skb2 = NULL; in z8530_sync_dma_open()
868 c->rxdma_on = 0; in z8530_sync_dma_open()
869 c->txdma_on = 0; in z8530_sync_dma_open()
877 if(c->mtu > PAGE_SIZE/2) in z8530_sync_dma_open()
878 return -EMSGSIZE; in z8530_sync_dma_open()
880 c->rx_buf[0]=(void *)get_zeroed_page(GFP_KERNEL|GFP_DMA); in z8530_sync_dma_open()
881 if(c->rx_buf[0]==NULL) in z8530_sync_dma_open()
882 return -ENOBUFS; in z8530_sync_dma_open()
883 c->rx_buf[1]=c->rx_buf[0]+PAGE_SIZE/2; in z8530_sync_dma_open()
885 c->tx_dma_buf[0]=(void *)get_zeroed_page(GFP_KERNEL|GFP_DMA); in z8530_sync_dma_open()
886 if(c->tx_dma_buf[0]==NULL) in z8530_sync_dma_open()
888 free_page((unsigned long)c->rx_buf[0]); in z8530_sync_dma_open()
889 c->rx_buf[0]=NULL; in z8530_sync_dma_open()
890 return -ENOBUFS; in z8530_sync_dma_open()
892 c->tx_dma_buf[1]=c->tx_dma_buf[0]+PAGE_SIZE/2; in z8530_sync_dma_open()
894 c->tx_dma_used=0; in z8530_sync_dma_open()
895 c->dma_tx = 1; in z8530_sync_dma_open()
896 c->dma_num=0; in z8530_sync_dma_open()
897 c->dma_ready=1; in z8530_sync_dma_open()
903 spin_lock_irqsave(c->lock, cflags); in z8530_sync_dma_open()
909 c->regs[R14]|= DTRREQ; in z8530_sync_dma_open()
910 write_zsreg(c, R14, c->regs[R14]); in z8530_sync_dma_open()
912 c->regs[R1]&= ~TxINT_ENAB; in z8530_sync_dma_open()
913 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_dma_open()
919 c->regs[R1]|= WT_FN_RDYFN; in z8530_sync_dma_open()
920 c->regs[R1]|= WT_RDY_RT; in z8530_sync_dma_open()
921 c->regs[R1]|= INT_ERR_Rx; in z8530_sync_dma_open()
922 c->regs[R1]&= ~TxINT_ENAB; in z8530_sync_dma_open()
923 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_dma_open()
924 c->regs[R1]|= WT_RDY_ENAB; in z8530_sync_dma_open()
925 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_dma_open()
937 disable_dma(c->rxdma); in z8530_sync_dma_open()
938 clear_dma_ff(c->rxdma); in z8530_sync_dma_open()
939 set_dma_mode(c->rxdma, DMA_MODE_READ|0x10); in z8530_sync_dma_open()
940 set_dma_addr(c->rxdma, virt_to_bus(c->rx_buf[0])); in z8530_sync_dma_open()
941 set_dma_count(c->rxdma, c->mtu); in z8530_sync_dma_open()
942 enable_dma(c->rxdma); in z8530_sync_dma_open()
944 disable_dma(c->txdma); in z8530_sync_dma_open()
945 clear_dma_ff(c->txdma); in z8530_sync_dma_open()
946 set_dma_mode(c->txdma, DMA_MODE_WRITE); in z8530_sync_dma_open()
947 disable_dma(c->txdma); in z8530_sync_dma_open()
955 c->rxdma_on = 1; in z8530_sync_dma_open()
956 c->txdma_on = 1; in z8530_sync_dma_open()
957 c->tx_dma_used = 1; in z8530_sync_dma_open()
959 c->irqs = &z8530_dma_sync; in z8530_sync_dma_open()
961 write_zsreg(c, R3, c->regs[R3]|RxENABLE); in z8530_sync_dma_open()
963 spin_unlock_irqrestore(c->lock, cflags); in z8530_sync_dma_open()
971 * z8530_sync_dma_close - Close down DMA I/O
984 c->irqs = &z8530_nop; in z8530_sync_dma_close()
985 c->max = 0; in z8530_sync_dma_close()
986 c->sync = 0; in z8530_sync_dma_close()
989 * Disable the PC DMA channels in z8530_sync_dma_close()
993 disable_dma(c->rxdma); in z8530_sync_dma_close()
994 clear_dma_ff(c->rxdma); in z8530_sync_dma_close()
996 c->rxdma_on = 0; in z8530_sync_dma_close()
998 disable_dma(c->txdma); in z8530_sync_dma_close()
999 clear_dma_ff(c->txdma); in z8530_sync_dma_close()
1002 c->txdma_on = 0; in z8530_sync_dma_close()
1003 c->tx_dma_used = 0; in z8530_sync_dma_close()
1005 spin_lock_irqsave(c->lock, flags); in z8530_sync_dma_close()
1011 c->regs[R1]&= ~WT_RDY_ENAB; in z8530_sync_dma_close()
1012 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_dma_close()
1013 c->regs[R1]&= ~(WT_RDY_RT|WT_FN_RDYFN|INT_ERR_Rx); in z8530_sync_dma_close()
1014 c->regs[R1]|= INT_ALL_Rx; in z8530_sync_dma_close()
1015 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_dma_close()
1016 c->regs[R14]&= ~DTRREQ; in z8530_sync_dma_close()
1017 write_zsreg(c, R14, c->regs[R14]); in z8530_sync_dma_close()
1019 if(c->rx_buf[0]) in z8530_sync_dma_close()
1021 free_page((unsigned long)c->rx_buf[0]); in z8530_sync_dma_close()
1022 c->rx_buf[0]=NULL; in z8530_sync_dma_close()
1024 if(c->tx_dma_buf[0]) in z8530_sync_dma_close()
1026 free_page((unsigned long)c->tx_dma_buf[0]); in z8530_sync_dma_close()
1027 c->tx_dma_buf[0]=NULL; in z8530_sync_dma_close()
1030 write_zsreg(c, R3, c->regs[R3]); in z8530_sync_dma_close()
1033 spin_unlock_irqrestore(c->lock, flags); in z8530_sync_dma_close()
1041 * z8530_sync_txdma_open - Open a Z8530 for TX driven DMA
1054 printk("Opening sync interface for TX-DMA\n"); in z8530_sync_txdma_open()
1055 c->sync = 1; in z8530_sync_txdma_open()
1056 c->mtu = dev->mtu+64; in z8530_sync_txdma_open()
1057 c->count = 0; in z8530_sync_txdma_open()
1058 c->skb = NULL; in z8530_sync_txdma_open()
1059 c->skb2 = NULL; in z8530_sync_txdma_open()
1067 if(c->mtu > PAGE_SIZE/2) in z8530_sync_txdma_open()
1068 return -EMSGSIZE; in z8530_sync_txdma_open()
1070 c->tx_dma_buf[0]=(void *)get_zeroed_page(GFP_KERNEL|GFP_DMA); in z8530_sync_txdma_open()
1071 if(c->tx_dma_buf[0]==NULL) in z8530_sync_txdma_open()
1072 return -ENOBUFS; in z8530_sync_txdma_open()
1074 c->tx_dma_buf[1] = c->tx_dma_buf[0] + PAGE_SIZE/2; in z8530_sync_txdma_open()
1077 spin_lock_irqsave(c->lock, cflags); in z8530_sync_txdma_open()
1090 c->rxdma_on = 0; in z8530_sync_txdma_open()
1091 c->txdma_on = 0; in z8530_sync_txdma_open()
1093 c->tx_dma_used=0; in z8530_sync_txdma_open()
1094 c->dma_num=0; in z8530_sync_txdma_open()
1095 c->dma_ready=1; in z8530_sync_txdma_open()
1096 c->dma_tx = 1; in z8530_sync_txdma_open()
1105 c->regs[R14]|= DTRREQ; in z8530_sync_txdma_open()
1106 write_zsreg(c, R14, c->regs[R14]); in z8530_sync_txdma_open()
1108 c->regs[R1]&= ~TxINT_ENAB; in z8530_sync_txdma_open()
1109 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_txdma_open()
1117 disable_dma(c->txdma); in z8530_sync_txdma_open()
1118 clear_dma_ff(c->txdma); in z8530_sync_txdma_open()
1119 set_dma_mode(c->txdma, DMA_MODE_WRITE); in z8530_sync_txdma_open()
1120 disable_dma(c->txdma); in z8530_sync_txdma_open()
1128 c->rxdma_on = 0; in z8530_sync_txdma_open()
1129 c->txdma_on = 1; in z8530_sync_txdma_open()
1130 c->tx_dma_used = 1; in z8530_sync_txdma_open()
1132 c->irqs = &z8530_txdma_sync; in z8530_sync_txdma_open()
1134 write_zsreg(c, R3, c->regs[R3]|RxENABLE); in z8530_sync_txdma_open()
1135 spin_unlock_irqrestore(c->lock, cflags); in z8530_sync_txdma_open()
1143 * z8530_sync_txdma_close - Close down a TX driven DMA channel
1157 spin_lock_irqsave(c->lock, cflags); in z8530_sync_txdma_close()
1159 c->irqs = &z8530_nop; in z8530_sync_txdma_close()
1160 c->max = 0; in z8530_sync_txdma_close()
1161 c->sync = 0; in z8530_sync_txdma_close()
1164 * Disable the PC DMA channels in z8530_sync_txdma_close()
1169 disable_dma(c->txdma); in z8530_sync_txdma_close()
1170 clear_dma_ff(c->txdma); in z8530_sync_txdma_close()
1171 c->txdma_on = 0; in z8530_sync_txdma_close()
1172 c->tx_dma_used = 0; in z8530_sync_txdma_close()
1180 c->regs[R1]&= ~WT_RDY_ENAB; in z8530_sync_txdma_close()
1181 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_txdma_close()
1182 c->regs[R1]&= ~(WT_RDY_RT|WT_FN_RDYFN|INT_ERR_Rx); in z8530_sync_txdma_close()
1183 c->regs[R1]|= INT_ALL_Rx; in z8530_sync_txdma_close()
1184 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_txdma_close()
1185 c->regs[R14]&= ~DTRREQ; in z8530_sync_txdma_close()
1186 write_zsreg(c, R14, c->regs[R14]); in z8530_sync_txdma_close()
1188 if(c->tx_dma_buf[0]) in z8530_sync_txdma_close()
1190 free_page((unsigned long)c->tx_dma_buf[0]); in z8530_sync_txdma_close()
1191 c->tx_dma_buf[0]=NULL; in z8530_sync_txdma_close()
1194 write_zsreg(c, R3, c->regs[R3]); in z8530_sync_txdma_close()
1197 spin_unlock_irqrestore(c->lock, cflags); in z8530_sync_txdma_close()
1217 * z8530_describe - Uniformly describe a Z8530 port
1230 dev->name, in z8530_describe()
1231 z8530_type_name[dev->type], in z8530_describe()
1234 dev->irq); in z8530_describe()
1245 /* NOP the interrupt handlers first - we might get a in do_z8530_init()
1247 dev->chanA.irqs=&z8530_nop; in do_z8530_init()
1248 dev->chanB.irqs=&z8530_nop; in do_z8530_init()
1249 dev->chanA.dcdcheck=DCD; in do_z8530_init()
1250 dev->chanB.dcdcheck=DCD; in do_z8530_init()
1253 write_zsreg(&dev->chanA, R9, 0xC0); in do_z8530_init()
1256 write_zsreg(&dev->chanA, R12, 0xAA); in do_z8530_init()
1257 if(read_zsreg(&dev->chanA, R12)!=0xAA) in do_z8530_init()
1258 return -ENODEV; in do_z8530_init()
1259 write_zsreg(&dev->chanA, R12, 0x55); in do_z8530_init()
1260 if(read_zsreg(&dev->chanA, R12)!=0x55) in do_z8530_init()
1261 return -ENODEV; in do_z8530_init()
1263 dev->type=Z8530; in do_z8530_init()
1269 write_zsreg(&dev->chanA, R15, 0x01); in do_z8530_init()
1276 if(read_zsreg(&dev->chanA, R15)==0x01) in do_z8530_init()
1280 write_zsreg(&dev->chanA, R8, 0); in do_z8530_init()
1281 if(read_zsreg(&dev->chanA, R0)&Tx_BUF_EMP) in do_z8530_init()
1282 dev->type = Z85230; /* Has a FIFO */ in do_z8530_init()
1284 dev->type = Z85C30; /* Z85C30, 1 byte FIFO */ in do_z8530_init()
1293 write_zsreg(&dev->chanA, R15, 0); in do_z8530_init()
1299 memcpy(dev->chanA.regs, reg_init, 16); in do_z8530_init()
1300 memcpy(dev->chanB.regs, reg_init ,16); in do_z8530_init()
1306 * z8530_init - Initialise a Z8530 device
1328 spin_lock_init(&dev->lock); in z8530_init()
1329 dev->chanA.lock = &dev->lock; in z8530_init()
1330 dev->chanB.lock = &dev->lock; in z8530_init()
1332 spin_lock_irqsave(&dev->lock, flags); in z8530_init()
1334 spin_unlock_irqrestore(&dev->lock, flags); in z8530_init()
1343 * z8530_shutdown - Shutdown a Z8530 device
1358 spin_lock_irqsave(&dev->lock, flags); in z8530_shutdown()
1359 dev->chanA.irqs=&z8530_nop; in z8530_shutdown()
1360 dev->chanB.irqs=&z8530_nop; in z8530_shutdown()
1361 write_zsreg(&dev->chanA, R9, 0xC0); in z8530_shutdown()
1364 spin_unlock_irqrestore(&dev->lock, flags); in z8530_shutdown()
1371 * z8530_channel_load - Load channel data
1385 spin_lock_irqsave(c->lock, flags); in z8530_channel_load()
1391 write_zsreg(c, R15, c->regs[15]|1); in z8530_channel_load()
1394 write_zsreg(c, R15, c->regs[15]&~1); in z8530_channel_load()
1395 c->regs[reg]=*rtable++; in z8530_channel_load()
1397 c->rx_function=z8530_null_rx; in z8530_channel_load()
1398 c->skb=NULL; in z8530_channel_load()
1399 c->tx_skb=NULL; in z8530_channel_load()
1400 c->tx_next_skb=NULL; in z8530_channel_load()
1401 c->mtu=1500; in z8530_channel_load()
1402 c->max=0; in z8530_channel_load()
1403 c->count=0; in z8530_channel_load()
1404 c->status=read_zsreg(c, R0); in z8530_channel_load()
1405 c->sync=1; in z8530_channel_load()
1406 write_zsreg(c, R3, c->regs[R3]|RxENABLE); in z8530_channel_load()
1408 spin_unlock_irqrestore(c->lock, flags); in z8530_channel_load()
1416 * z8530_tx_begin - Begin packet transmission
1432 if(c->tx_skb) in z8530_tx_begin()
1435 c->tx_skb=c->tx_next_skb; in z8530_tx_begin()
1436 c->tx_next_skb=NULL; in z8530_tx_begin()
1437 c->tx_ptr=c->tx_next_ptr; in z8530_tx_begin()
1439 if(c->tx_skb==NULL) in z8530_tx_begin()
1442 if(c->dma_tx) in z8530_tx_begin()
1445 disable_dma(c->txdma); in z8530_tx_begin()
1449 if (get_dma_residue(c->txdma)) in z8530_tx_begin()
1451 c->netdevice->stats.tx_dropped++; in z8530_tx_begin()
1452 c->netdevice->stats.tx_fifo_errors++; in z8530_tx_begin()
1456 c->txcount=0; in z8530_tx_begin()
1460 c->txcount=c->tx_skb->len; in z8530_tx_begin()
1463 if(c->dma_tx) in z8530_tx_begin()
1473 disable_dma(c->txdma); in z8530_tx_begin()
1480 if(c->dev->type!=Z85230) in z8530_tx_begin()
1485 write_zsreg(c, R10, c->regs[10]&~ABUNDER); in z8530_tx_begin()
1486 clear_dma_ff(c->txdma); in z8530_tx_begin()
1487 set_dma_addr(c->txdma, virt_to_bus(c->tx_ptr)); in z8530_tx_begin()
1488 set_dma_count(c->txdma, c->txcount); in z8530_tx_begin()
1489 enable_dma(c->txdma); in z8530_tx_begin()
1492 write_zsreg(c, R5, c->regs[R5]|TxENAB); in z8530_tx_begin()
1498 write_zsreg(c, R10, c->regs[10]); in z8530_tx_begin()
1501 while(c->txcount && (read_zsreg(c,R0)&Tx_BUF_EMP)) in z8530_tx_begin()
1503 write_zsreg(c, R8, *c->tx_ptr++); in z8530_tx_begin()
1504 c->txcount--; in z8530_tx_begin()
1512 netif_wake_queue(c->netdevice); in z8530_tx_begin()
1516 * z8530_tx_done - TX complete callback
1531 if (c->tx_skb == NULL) in z8530_tx_done()
1534 skb = c->tx_skb; in z8530_tx_done()
1535 c->tx_skb = NULL; in z8530_tx_done()
1537 c->netdevice->stats.tx_packets++; in z8530_tx_done()
1538 c->netdevice->stats.tx_bytes += skb->len; in z8530_tx_done()
1543 * z8530_null_rx - Discard a packet
1559 * z8530_rx_done - Receive completion callback
1580 if(c->rxdma_on) in z8530_rx_done()
1587 int ready=c->dma_ready; in z8530_rx_done()
1588 unsigned char *rxb=c->rx_buf[c->dma_num]; in z8530_rx_done()
1597 disable_dma(c->rxdma); in z8530_rx_done()
1598 clear_dma_ff(c->rxdma); in z8530_rx_done()
1599 c->rxdma_on=0; in z8530_rx_done()
1600 ct=c->mtu-get_dma_residue(c->rxdma); in z8530_rx_done()
1603 c->dma_ready=0; in z8530_rx_done()
1612 c->dma_num^=1; in z8530_rx_done()
1613 set_dma_mode(c->rxdma, DMA_MODE_READ|0x10); in z8530_rx_done()
1614 set_dma_addr(c->rxdma, virt_to_bus(c->rx_buf[c->dma_num])); in z8530_rx_done()
1615 set_dma_count(c->rxdma, c->mtu); in z8530_rx_done()
1616 c->rxdma_on = 1; in z8530_rx_done()
1617 enable_dma(c->rxdma); in z8530_rx_done()
1625 netdev_warn(c->netdevice, "DMA flip overrun!\n"); in z8530_rx_done()
1631 * directly into one on a PC - it might be above the 16Mb in z8530_rx_done()
1632 * boundary. Optimisation - we could check to see if we in z8530_rx_done()
1633 * can avoid the copy. Optimisation 2 - make the memcpy in z8530_rx_done()
1639 c->netdevice->stats.rx_dropped++; in z8530_rx_done()
1640 netdev_warn(c->netdevice, "Memory squeeze\n"); in z8530_rx_done()
1644 c->netdevice->stats.rx_packets++; in z8530_rx_done()
1645 c->netdevice->stats.rx_bytes += ct; in z8530_rx_done()
1647 c->dma_ready = 1; in z8530_rx_done()
1650 skb = c->skb; in z8530_rx_done()
1664 ct=c->count; in z8530_rx_done()
1666 c->skb = c->skb2; in z8530_rx_done()
1667 c->count = 0; in z8530_rx_done()
1668 c->max = c->mtu; in z8530_rx_done()
1669 if (c->skb) { in z8530_rx_done()
1670 c->dptr = c->skb->data; in z8530_rx_done()
1671 c->max = c->mtu; in z8530_rx_done()
1673 c->count = 0; in z8530_rx_done()
1674 c->max = 0; in z8530_rx_done()
1678 c->skb2 = dev_alloc_skb(c->mtu); in z8530_rx_done()
1679 if (c->skb2 == NULL) in z8530_rx_done()
1680 netdev_warn(c->netdevice, "memory squeeze\n"); in z8530_rx_done()
1682 skb_put(c->skb2, c->mtu); in z8530_rx_done()
1683 c->netdevice->stats.rx_packets++; in z8530_rx_done()
1684 c->netdevice->stats.rx_bytes += ct; in z8530_rx_done()
1691 c->rx_function(c, skb); in z8530_rx_done()
1693 c->netdevice->stats.rx_dropped++; in z8530_rx_done()
1694 netdev_err(c->netdevice, "Lost a frame\n"); in z8530_rx_done()
1699 * spans_boundary - Check a packet can be ISA DMA'd
1708 unsigned long a=(unsigned long)skb->data; in spans_boundary()
1709 a^=(a+skb->len); in spans_boundary()
1716 * z8530_queue_xmit - Queue a packet
1733 netif_stop_queue(c->netdevice); in z8530_queue_xmit()
1734 if(c->tx_next_skb) in z8530_queue_xmit()
1738 /* PC SPECIFIC - DMA limits */ in z8530_queue_xmit()
1745 …if(c->dma_tx && ((unsigned long)(virt_to_bus(skb->data+skb->len))>=16*1024*1024 || spans_boundary(… in z8530_queue_xmit()
1754 c->tx_next_ptr=c->tx_dma_buf[c->tx_dma_used]; in z8530_queue_xmit()
1755 c->tx_dma_used^=1; /* Flip temp buffer */ in z8530_queue_xmit()
1756 skb_copy_from_linear_data(skb, c->tx_next_ptr, skb->len); in z8530_queue_xmit()
1759 c->tx_next_ptr=skb->data; in z8530_queue_xmit()
1761 c->tx_next_skb=skb; in z8530_queue_xmit()
1764 spin_lock_irqsave(c->lock, flags); in z8530_queue_xmit()
1766 spin_unlock_irqrestore(c->lock, flags); in z8530_queue_xmit()