Lines Matching full:missing

937 #define MISSING 0  macro
944 #define RESET_CONTROL_MBOX_RST_MASK		MISSING
968 #define MBOX_BASE_ADDRESS			MISSING
969 #define INT_STATUS_ENABLE_ERROR_LSB		MISSING
970 #define INT_STATUS_ENABLE_ERROR_MASK		MISSING
971 #define INT_STATUS_ENABLE_CPU_LSB		MISSING
972 #define INT_STATUS_ENABLE_CPU_MASK		MISSING
973 #define INT_STATUS_ENABLE_COUNTER_LSB		MISSING
974 #define INT_STATUS_ENABLE_COUNTER_MASK		MISSING
975 #define INT_STATUS_ENABLE_MBOX_DATA_LSB		MISSING
976 #define INT_STATUS_ENABLE_MBOX_DATA_MASK	MISSING
977 #define ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB	MISSING
978 #define ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK	MISSING
979 #define ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB	MISSING
980 #define ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK	MISSING
981 #define COUNTER_INT_STATUS_ENABLE_BIT_LSB	MISSING
982 #define COUNTER_INT_STATUS_ENABLE_BIT_MASK	MISSING
983 #define INT_STATUS_ENABLE_ADDRESS		MISSING
984 #define CPU_INT_STATUS_ENABLE_BIT_LSB		MISSING
985 #define CPU_INT_STATUS_ENABLE_BIT_MASK		MISSING
986 #define HOST_INT_STATUS_ADDRESS			MISSING
987 #define CPU_INT_STATUS_ADDRESS			MISSING
988 #define ERROR_INT_STATUS_ADDRESS		MISSING
989 #define ERROR_INT_STATUS_WAKEUP_MASK		MISSING
990 #define ERROR_INT_STATUS_WAKEUP_LSB		MISSING
991 #define ERROR_INT_STATUS_RX_UNDERFLOW_MASK	MISSING
992 #define ERROR_INT_STATUS_RX_UNDERFLOW_LSB	MISSING
993 #define ERROR_INT_STATUS_TX_OVERFLOW_MASK	MISSING
994 #define ERROR_INT_STATUS_TX_OVERFLOW_LSB	MISSING
995 #define COUNT_DEC_ADDRESS			MISSING
996 #define HOST_INT_STATUS_CPU_MASK		MISSING
997 #define HOST_INT_STATUS_CPU_LSB			MISSING
998 #define HOST_INT_STATUS_ERROR_MASK		MISSING
999 #define HOST_INT_STATUS_ERROR_LSB		MISSING
1000 #define HOST_INT_STATUS_COUNTER_MASK		MISSING
1001 #define HOST_INT_STATUS_COUNTER_LSB		MISSING
1002 #define RX_LOOKAHEAD_VALID_ADDRESS		MISSING
1003 #define WINDOW_DATA_ADDRESS			MISSING
1004 #define WINDOW_READ_ADDR_ADDRESS		MISSING
1005 #define WINDOW_WRITE_ADDR_ADDRESS		MISSING