Lines Matching full:10
102 " %-30s %10u %10u %10u %10u\n", "ina_cnt:", in il3945_ucode_rx_stats_read()
107 " %-30s %10u %10u %10u %10u\n", "fina_cnt:", in il3945_ucode_rx_stats_read()
112 " %-30s %10u %10u %10u %10u\n", "plcp_err:", in il3945_ucode_rx_stats_read()
117 " %-30s %10u %10u %10u %10u\n", "crc32_err:", in il3945_ucode_rx_stats_read()
122 " %-30s %10u %10u %10u %10u\n", "overrun_err:", in il3945_ucode_rx_stats_read()
127 " %-30s %10u %10u %10u %10u\n", "early_overrun_err:", in il3945_ucode_rx_stats_read()
134 " %-30s %10u %10u %10u %10u\n", "crc32_good:", in il3945_ucode_rx_stats_read()
139 " %-30s %10u %10u %10u %10u\n", "false_alarm_cnt:", in il3945_ucode_rx_stats_read()
145 " %-30s %10u %10u %10u %10u\n", "fina_sync_err_cnt:", in il3945_ucode_rx_stats_read()
152 " %-30s %10u %10u %10u %10u\n", "sfd_timeout:", in il3945_ucode_rx_stats_read()
157 " %-30s %10u %10u %10u %10u\n", "fina_timeout:", in il3945_ucode_rx_stats_read()
162 " %-30s %10u %10u %10u %10u\n", "unresponded_rts:", in il3945_ucode_rx_stats_read()
168 " %-30s %10u %10u %10u %10u\n", in il3945_ucode_rx_stats_read()
176 " %-30s %10u %10u %10u %10u\n", "sent_ack_cnt:", in il3945_ucode_rx_stats_read()
181 " %-30s %10u %10u %10u %10u\n", "sent_cts_cnt:", in il3945_ucode_rx_stats_read()
192 " %-30s %10u %10u %10u %10u\n", "ina_cnt:", in il3945_ucode_rx_stats_read()
197 " %-30s %10u %10u %10u %10u\n", "fina_cnt:", in il3945_ucode_rx_stats_read()
202 " %-30s %10u %10u %10u %10u\n", "plcp_err:", in il3945_ucode_rx_stats_read()
207 " %-30s %10u %10u %10u %10u\n", "crc32_err:", in il3945_ucode_rx_stats_read()
212 " %-30s %10u %10u %10u %10u\n", "overrun_err:", in il3945_ucode_rx_stats_read()
217 " %-30s %10u %10u %10u %10u\n", "early_overrun_err:", in il3945_ucode_rx_stats_read()
223 " %-30s %10u %10u %10u %10u\n", "crc32_good:", in il3945_ucode_rx_stats_read()
228 " %-30s %10u %10u %10u %10u\n", "false_alarm_cnt:", in il3945_ucode_rx_stats_read()
234 " %-30s %10u %10u %10u %10u\n", "fina_sync_err_cnt:", in il3945_ucode_rx_stats_read()
240 " %-30s %10u %10u %10u %10u\n", "sfd_timeout:", in il3945_ucode_rx_stats_read()
245 " %-30s %10u %10u %10u %10u\n", "fina_timeout:", in il3945_ucode_rx_stats_read()
250 " %-30s %10u %10u %10u %10u\n", "unresponded_rts:", in il3945_ucode_rx_stats_read()
256 " %-30s %10u %10u %10u %10u\n", in il3945_ucode_rx_stats_read()
264 " %-30s %10u %10u %10u %10u\n", "sent_ack_cnt:", in il3945_ucode_rx_stats_read()
269 " %-30s %10u %10u %10u %10u\n", "sent_cts_cnt:", in il3945_ucode_rx_stats_read()
280 " %-30s %10u %10u %10u %10u\n", "bogus_cts:", in il3945_ucode_rx_stats_read()
285 " %-30s %10u %10u %10u %10u\n", "bogus_ack:", in il3945_ucode_rx_stats_read()
290 " %-30s %10u %10u %10u %10u\n", "non_bssid_frames:", in il3945_ucode_rx_stats_read()
297 " %-30s %10u %10u %10u %10u\n", "filtered_frames:", in il3945_ucode_rx_stats_read()
304 " %-30s %10u %10u %10u %10u\n", in il3945_ucode_rx_stats_read()
353 " %-30s %10u %10u %10u %10u\n", "preamble:", in il3945_ucode_tx_stats_read()
358 " %-30s %10u %10u %10u %10u\n", "rx_detected_cnt:", in il3945_ucode_tx_stats_read()
364 " %-30s %10u %10u %10u %10u\n", "bt_prio_defer_cnt:", in il3945_ucode_tx_stats_read()
370 " %-30s %10u %10u %10u %10u\n", "bt_prio_kill_cnt:", in il3945_ucode_tx_stats_read()
376 " %-30s %10u %10u %10u %10u\n", "few_bytes_cnt:", in il3945_ucode_tx_stats_read()
381 " %-30s %10u %10u %10u %10u\n", "cts_timeout:", in il3945_ucode_tx_stats_read()
386 " %-30s %10u %10u %10u %10u\n", "ack_timeout:", in il3945_ucode_tx_stats_read()
391 " %-30s %10u %10u %10u %10u\n", "expected_ack_cnt:", in il3945_ucode_tx_stats_read()
397 " %-30s %10u %10u %10u %10u\n", "actual_ack_cnt:", in il3945_ucode_tx_stats_read()
413 int bufsz = sizeof(struct iwl39_stats_general) * 10 + 300; in il3945_ucode_general_stats_read()
454 " %-30s %10u %10u %10u %10u\n", "burst_check:", in il3945_ucode_general_stats_read()
459 " %-30s %10u %10u %10u %10u\n", "burst_count:", in il3945_ucode_general_stats_read()
464 " %-30s %10u %10u %10u %10u\n", "sleep_time:", in il3945_ucode_general_stats_read()
470 " %-30s %10u %10u %10u %10u\n", "slots_out:", in il3945_ucode_general_stats_read()
475 " %-30s %10u %10u %10u %10u\n", "slots_idle:", in il3945_ucode_general_stats_read()
484 " %-30s %10u %10u %10u %10u\n", "tx_on_a:", in il3945_ucode_general_stats_read()
489 " %-30s %10u %10u %10u %10u\n", "tx_on_b:", in il3945_ucode_general_stats_read()
494 " %-30s %10u %10u %10u %10u\n", "exec_time:", in il3945_ucode_general_stats_read()
499 " %-30s %10u %10u %10u %10u\n", "probe_time:", in il3945_ucode_general_stats_read()