Lines Matching +full:0 +full:x1fc
20 #define MT7601U_EE_MAX_VER 0x0d
26 MT_EE_CHIP_ID = 0x00,
27 MT_EE_VERSION_FAE = 0x02,
28 MT_EE_VERSION_EE = 0x03,
29 MT_EE_MAC_ADDR = 0x04,
30 MT_EE_NIC_CONF_0 = 0x34,
31 MT_EE_NIC_CONF_1 = 0x36,
32 MT_EE_COUNTRY_REGION = 0x39,
33 MT_EE_FREQ_OFFSET = 0x3a,
34 MT_EE_NIC_CONF_2 = 0x42,
36 MT_EE_LNA_GAIN = 0x44,
37 MT_EE_RSSI_OFFSET = 0x46,
39 MT_EE_TX_POWER_DELTA_BW40 = 0x50,
40 MT_EE_TX_POWER_OFFSET = 0x52,
42 MT_EE_TX_TSSI_SLOPE = 0x6e,
43 MT_EE_TX_TSSI_OFFSET_GROUP = 0x6f,
44 MT_EE_TX_TSSI_OFFSET = 0x76,
46 MT_EE_TX_TSSI_TARGET_POWER = 0xd0,
47 MT_EE_REF_TEMP = 0xd1,
48 MT_EE_FREQ_OFFSET_COMPENSATION = 0xdb,
49 MT_EE_TX_POWER_BYRATE_BASE = 0xde,
51 MT_EE_USAGE_MAP_START = 0x1e0,
52 MT_EE_USAGE_MAP_END = 0x1fc,
55 #define MT_EE_NIC_CONF_0_RX_PATH GENMASK(3, 0)
59 #define MT_EE_NIC_CONF_1_HW_RF_CTRL BIT(0)
65 #define MT_EE_NIC_CONF_2_RX_STREAM GENMASK(3, 0)
79 MT_EE_READ = 0,
126 WARN_ON(reg & ~GENMASK(5, 0)); in s6_validate()
127 return reg & GENMASK(5, 0); in s6_validate()
143 if (val < -0x20) in int_to_s6()
144 return 0x20; in int_to_s6()
145 if (val > 0x1f) in int_to_s6()
146 return 0x1f; in int_to_s6()
148 return val & 0x3f; in int_to_s6()