1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/pci-acpi.h>
20 #include <linux/pci-ecam.h>
29 	struct pci_config_window *cfg = bus->sysdata;  in hisi_pcie_rd_conf()
32 	if (bus->number == cfg->busr.start) {  in hisi_pcie_rd_conf()
47 	struct pci_config_window *cfg = bus->sysdata;  in hisi_pcie_wr_conf()
50 	if (bus->number == cfg->busr.start) {  in hisi_pcie_wr_conf()
65 	struct pci_config_window *cfg = bus->sysdata;  in hisi_pcie_map_bus()
66 	void __iomem *reg_base = cfg->priv;  in hisi_pcie_map_bus()
68 	if (bus->number == cfg->busr.start)  in hisi_pcie_map_bus()
78 	struct device *dev = cfg->parent;  in hisi_pcie_init()
91 		return -ENOMEM;  in hisi_pcie_init()
93 	ret = acpi_get_rc_resources(dev, "HISI0081", root->segment, res);  in hisi_pcie_init()
96 		return -ENOMEM;  in hisi_pcie_init()
99 	reg_base = devm_pci_remap_cfgspace(dev, res->start, resource_size(res));  in hisi_pcie_init()
101 		return -ENOMEM;  in hisi_pcie_init()
103 	cfg->priv = reg_base;  in hisi_pcie_init()
121 #include "pcie-designware.h"
129 #define to_hisi_pcie(x)	dev_get_drvdata((x)->dev)
144 /* HipXX PCIe host only supports 32-bit config access */
169 /* HipXX PCIe host only supports 32-bit config access */
200 	regmap_read(hisi_pcie->subctrl, PCIE_SUBCTRL_SYS_STATE4_REG +  in hisi_pcie_link_up_hip05()
201 		    0x100 * hisi_pcie->port_id, &val);  in hisi_pcie_link_up_hip05()
208 	struct dw_pcie *pci = hisi_pcie->pci;  in hisi_pcie_link_up_hip06()
220 	return hisi_pcie->soc_ops->hisi_pcie_link_up(hisi_pcie);  in hisi_pcie_link_up()
231 	struct dw_pcie *pci = hisi_pcie->pci;  in hisi_add_pcie_port()
232 	struct pcie_port *pp = &pci->pp;  in hisi_add_pcie_port()
233 	struct device *dev = &pdev->dev;  in hisi_add_pcie_port()
237 	if (of_property_read_u32(dev->of_node, "port-id", &port_id)) {  in hisi_add_pcie_port()
238 		dev_err(dev, "failed to read port-id\n");  in hisi_add_pcie_port()
239 		return -EINVAL;  in hisi_add_pcie_port()
242 		dev_err(dev, "Invalid port-id: %d\n", port_id);  in hisi_add_pcie_port()
243 		return -EINVAL;  in hisi_add_pcie_port()
245 	hisi_pcie->port_id = port_id;  in hisi_add_pcie_port()
247 	pp->ops = &hisi_pcie_host_ops;  in hisi_add_pcie_port()
264 	struct device *dev = &pdev->dev;  in hisi_pcie_probe()
272 		return -ENOMEM;  in hisi_pcie_probe()
276 		return -ENOMEM;  in hisi_pcie_probe()
278 	pci->dev = dev;  in hisi_pcie_probe()
279 	pci->ops = &dw_pcie_ops;  in hisi_pcie_probe()
281 	hisi_pcie->pci = pci;  in hisi_pcie_probe()
283 	hisi_pcie->soc_ops = of_device_get_match_data(dev);  in hisi_pcie_probe()
285 	hisi_pcie->subctrl =  in hisi_pcie_probe()
286 	    syscon_regmap_lookup_by_compatible("hisilicon,pcie-sas-subctrl");  in hisi_pcie_probe()
287 	if (IS_ERR(hisi_pcie->subctrl)) {  in hisi_pcie_probe()
289 		return PTR_ERR(hisi_pcie->subctrl);  in hisi_pcie_probe()
293 	pci->dbi_base = devm_pci_remap_cfg_resource(dev, reg);  in hisi_pcie_probe()
294 	if (IS_ERR(pci->dbi_base))  in hisi_pcie_probe()
295 		return PTR_ERR(pci->dbi_base);  in hisi_pcie_probe()
315 			.compatible = "hisilicon,hip05-pcie",
319 			.compatible = "hisilicon,hip06-pcie",
328 		   .name = "hisi-pcie",
337 	struct device *dev = &pdev->dev;  in hisi_pcie_almost_ecam_probe()
346 	struct device *dev = cfg->parent;  in hisi_pcie_platform_init()
354 		return -EINVAL;  in hisi_pcie_platform_init()
357 	reg_base = devm_pci_remap_cfgspace(dev, res->start, resource_size(res));  in hisi_pcie_platform_init()
359 		return -ENOMEM;  in hisi_pcie_platform_init()
361 	cfg->priv = reg_base;  in hisi_pcie_platform_init()
377 		.compatible =  "hisilicon,hip06-pcie-ecam",
381 		.compatible =  "hisilicon,hip07-pcie-ecam",
390 		   .name = "hisi-pcie-almost-ecam",